Prosecution Insights
Last updated: August 17, 2026
Application No. 18/338,327

QUASI-RESONANT FLYBACK VOLTAGE REGULATOR SYSTEM

Non-Final OA §103§112
Filed
Jun 20, 2023
Examiner
TORRES-RIVERA, ALEX
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
3 (Non-Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
674 granted / 778 resolved
+18.6% vs TC avg
Moderate +11% lift
Without
With
+11.2%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
28 currently pending
Career history
804
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
54.8%
+14.8% vs TC avg
§102
24.7%
-15.3% vs TC avg
§112
17.1%
-22.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 778 resolved cases

Office Action

§103 §112
DETAILED ACTION This action is in response to the 06/15/2026 Request to Continued Examination (RCE). Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/15/2026 has been entered. Drawings The drawings are objected to under 37 CFR 1.83(a) because they fail to show “In the example of FIG. 3, the primary switch 108 is activated at a time T5” as described in the specification (paragraph 028). Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1 – 8, 21 – 23 and 25 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 1 recites “the primary switch to conduct a primary current in a primary winding of a transformer in response to a switch voltage at a switching terminal falling below a switch voltage threshold”. Said limitation was not described in the original disclosure. The original specifications disclose to activate the primary switch when the switch voltage Vsw decreases to zero, there’s no threshold in which the switching voltage falls below to activate the primary switch. Claims 2 – 8 and 21 are rejected because its inherent dependency on claim 1. Claims 21 and 22 recites “wherein the switch voltage has an amplitude of zero during the ringing of the primary voltage prior to the primary switch being deactivated”. The disclosure, however, states in paragraph 066 “In response to the switch voltage VSW decreasing at the trough of the ringing of the primary voltage VPRI to zero at the time T3, the input controller 610 activates the primary switch NP, as described above.” There’s no support in the original specifications to the claimed “wherein the switch voltage has an amplitude of zero during the ringing of the primary voltage prior to the primary switch being deactivated”. Claim 23 recites “activate the switch responsive to a voltage at the switching terminal falling below a threshold and after the voltage reaches zero and rises from zero at least once”. There’s no support in the original disclosure for said limitation in the claim. Claim 25 is rejected because its inherent dependency on claim 23. Claim(s) 14 – 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Pub. No. 2020/0280263; (hereinafter Lin) in view of US Patent No. 11,588,411; (hereinafter Nayaknur) and further in view of US Pub. No. 2015/0280573; (hereinafter Gong). Regarding claim 14, Lin [e.g. Figs. 2A-3] discloses a system comprising: a transformer [e.g. 10] comprising a primary winding [e.g. W1] and a secondary winding [e.g. W2]; a switching stage comprising a primary switch [e.g. S1] and an input controller [e.g. 80], the input controller being configured to activate the primary switch to conduct a primary current [e.g. Ip] in the primary winding in response to a switch voltage at a switching terminal having an amplitude of zero [e.g. Fig. 2A; paragraph 037 recites “the circulation current Ip at the primary side winding W1 can discharge the parasitic capacitor Cp of the primary side switch S1 substantially to OV, and the charges of the parasitic capacitor Cp will be transferred to an input capacitor CI. Consequently, the primary side switch S1 can achieve zero voltage switching (ZVS) when the primary side switch S1 is turned ON in the next cycle and further cycles”], and to deactivate the primary switch to provide a secondary current [e.g. Fig. 2A; ISR] in the secondary winding [e.g. W2; Fig.3 with respect to S1C and S2C; paragraph 036 recites “When the primary side switch S1 is turned ON and then OFF (as shown by the timing point t1 in FIG. 3), the SR-control pulse PSR controls the synchronous rectifier switch S2 to be ON for an SR time period T_SR, to perform secondary side synchronous rectification. The SR time period T_SR is substantially synchronous with the conduction time of an induction current of the secondary side winding W2. In other words, the SR time period T_SR begins at a timing point (i.e., the timing point t1) when the secondary side winding W2 starts generating the induction current due to energy transferred from the primary side winding W1 to the secondary side winding W2, and the SR time period T_SR ends at a timing point (i.e., as shown by the timing point t2 in FIG. 3) when the induction current of the secondary side winding W2 is reduced to zero”]; and an output stage [e.g. S2, CO, 90] configurable to provide an output voltage [e.g. VO] at an output in response to the secondary current, the output stage comprising a secondary switch [e.g. S2] and an output controller [e.g. 90], the output controller being configurable to activate the secondary switch [e.g. using S2C] in response to an amplitude of the output voltage [e.g. see VO input to 90] and ringing of a primary voltage across the primary winding [e.g. paragraph 041 recites “During the period wherein a ringing current is generated, a signal related to such ringing current can be obtained via a primary side voltage VDS1 and/or a secondary side voltage VDS2”. Paragraph 042 recites “the secondary side controller circuit 90 determines a trigger timing point of the ZVS pulse PZV according to a second waveform characteristic of the ringing signal, to control the synchronous rectifier switch S2 to be turned ON for a predetermined ZVS time period T_ZVS”], and to deactivate the secondary switch to reduce the switch voltage to zero [e.g. paragraph 037 recites “when the synchronous rectifier switch S2 is turned OFF at a timing point (i.e., as shown by the timing point t4 in FIG. 3) at the end of the ZVS pulse PZV, the power transformer 10 will induce a circulation current Ip at the primary side winding W1 (as shown in FIG. 2B). According to the present invention, the circulation current Ip at the primary side winding W1 can discharge the parasitic capacitor Cp of the primary side switch S1 substantially to OV, and the charges of the parasitic capacitor Cp will be transferred to an input capacitor CI. Consequently, the primary side switch S1 can achieve zero voltage switching (ZVS) when the primary side switch S1 is turned ON in the next cycle and further cycles”]. Lin fails to disclose deactivate the primary switch responsive to an amplitude of the first current; and the output controller being configurable to activate the secondary switch in response to an amplitude of the output voltage falling below an output voltage threshold. Emphasis added to the lacking limitation. Nayaknur [e.g. Fig. 1A] teaches deactivate the primary switch [e.g. S1 112] responsive to an amplitude of the first current [e.g. col. 7, lines 31 – 33 recite “The first controller 128 is coupled to receive a current sense signal ISNS 146 representative of the drain current ID 113 of the power switch S1 112”. Col. 7, lines 54 – 58 recite “the first controller 128 outputs the first drive signal DR 144 to turn OFF the power switch S1 112 when the drain current ID 113 provided by the current sense signal ISNS 146 reaches a current limit.” Examiner note: the primary switch current corresponds to the primary winding current]. It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Lin by s deactivate the primary switch responsive to an amplitude of the first current as taught by Nayaknur in order of being able to provide a reliable operation by using a robust controller using multiple electrical parameters. Gong teaches the output controller being configurable to activate the secondary switch in response to an amplitude of the output voltage falling below an output voltage threshold [e.g. paragraph 038 recites “When the output voltage falls below a specified threshold, as described above, the wakeup detection and transmission circuit 300 produces pulse 324 of the gate voltage of the secondary side switching transistor, which produces ringing 326 of the secondary side winding voltage and a corresponding ringing 328 of the auxiliary side winding voltage, as well as the primary side winding voltage (not shown)”]. It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Lin by the output controller being configurable to activate the secondary switch in response to an amplitude of the output voltage falling below an output voltage threshold as taught by Gong in order of being able to reduce power consumption by providing a burst mode. Regarding claim 15, Lin [e.g. Figs. 2A-3] discloses wherein the input controller has inputs coupled to the primary winding [e.g. see input of controller 80 directly connected to resistor having VM and input directly connected to ground; where the primary winding W1 is coupled magnetically to WA and electrically connected via resistor to the input of 80 and ground is coupled to the primary winding W1 via switch S1] and is configurable to monitor the ringing of the primary voltage and to activate the primary switch in response to the switch voltage having an amplitude of approximately zero after at least one trough of the ringing of the primary voltage [e.g. Fig. 3; see time t5. Also, paragraph 040 recites “the present invention can, via a ringing signal which is related to a ringing current of the power transformer 10, synchronize the above-mentioned switching signal S1C and the ZVS pulse PZV, thereby achieving zero voltage switching of the primary side switch S1”. Paragraph 041 recites “During the period wherein a ringing current is generated, a signal related to such ringing current can be obtained via a primary side voltage VDS1 and/or a secondary side voltage VDS2”]. Response to Arguments Applicant's arguments filed 06/15/2026 have been fully considered but they are not persuasive. Applicant(s) argue(s) with respect to the rejection of claims 21 and 22 under 35 USC § 112: “Applicant believes that FIG. 4 and at least paragraphs 0034, 0036, 0039 of the Specification provide support claims 21 and 22.” In response, Fig. 4 shows a switching voltage (Vsw) 404 when it has levels of VMAX, VIN and zero. Fig. 4 does not show “wherein the switch voltage has an amplitude of zero during the ringing of the primary voltage prior to the primary switch being deactivated”. Paragraphs 034, 036, 039 of the Specifications also does not provide support for said limitation. Allowable Subject Matter Claims 1 – 8, 23 and 25 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Claims 16 – 20 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the indication of the allowability of claim 1 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “…; and deactivate the secondary switch responsive to the output voltage exceeding the output voltage threshold”. The primary reason for the indication of the allowability of claim 16 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the input controller is configurable to deactivate the primary switch in response to the primary current exceeding a primary current threshold”. The primary reason for the indication of the allowability of claim 17 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the input controller comprises: a switch comparator configurable to monitor an amplitude of the primary current and to generate a deactivate signal in response to the primary current exceeding a primary current threshold; a switch terminal comparator configurable to monitor an amplitude of the switch voltage and to generate an activate signal in response to the switch voltage decreasing to zero; and an activation latch configurable to control the primary switch, wherein the activate signal is provided to a set input of the activation latch and the deactivate signal is provided to a reset input of the activation latch”. The primary reason for the indication of the allowability of claim 19 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the output controller comprises: a secondary ringing comparator configured to monitor a secondary voltage across a secondary winding and to generate a zero-crossing signal in response to an increasing zero-crossing of the secondary voltage in response to the ringing of the primary voltage; an on-delay element configured to generate a delayed zero-crossing signal by delaying the zero-crossing signal by a quarter of a period of the ringing of the primary voltage; an output voltage comparator configured to monitor an amplitude of the output voltage and to generate an activate signal in response to the output voltage decreasing below an output voltage threshold; and an AND-gate configured to control the secondary switch based on the activate signal and the delayed zero-crossing signal”. The primary reason for the indication of the allowability of claim 23 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “a controller coupled to the switch and configurable to: activate the switch responsive to a voltage at the switching terminal falling below a threshold and after the voltage reaches zero and rises from zero at least once.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Torres-Rivera whose telephone number is (571)272-5261. The examiner can normally be reached M-F 9:00-5:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838
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Prosecution Timeline

Jun 20, 2023
Application Filed
Aug 29, 2025
Non-Final Rejection mailed — §103, §112
Jan 29, 2026
Response Filed
Mar 13, 2026
Final Rejection mailed — §103, §112
Jun 15, 2026
Request for Continued Examination
Jun 18, 2026
Response after Non-Final Action
Jun 26, 2026
Non-Final Rejection mailed — §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
98%
With Interview (+11.2%)
2y 1m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 778 resolved cases by this examiner. Grant probability derived from career allowance rate.

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