DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 4-10, 15, 18-26 and 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi U.S. Patent Publication No. 2008/0042942 (hereinafter Takahashi) in view of Uetake U.S. Patent Publication No. 2015/0145906 (hereinafter Uetake), Kim et al. U.S. Patent Publication No. 2020/0212111 (hereinafter Kim) and Lee et al. U.S. Patent Publication No. 2005/0133802 (hereinafter Lee).
Consider claim 1, Takahashi teaches a pixel structure for a self-luminous display panel (Figures 1-2 and [0052]), the pixel structure comprises: a plurality of subpixels, wherein at least one subpixel in the plurality of subpixels comprises a plurality of sub-subpixels (Figure 2, U1-U3), wherein a partition layer is arranged between two adjacent sub- subpixels in the at least one subpixel (Figure 6, 34), wherein a width of the partition layer increases in a direction from a lower surface of the partition layer to an upper surface of the partition layer (Figure 6, 34 in a direction of the light beam output (see arrows in figure 6)), and wherein light emission of the plurality of sub-subpixels is separately and independently controlled (Figure 2, U1-U3); wherein a first subpixel in the plurality of subpixels comprises a first sub-subpixel, a second sub- subpixel and a third sub-subpixel, a light emitting area of the first sub-subpixel is less than a light emitting area of the second sub-subpixel, a light emitting area of the second sub-subpixel is less than a light emitting area of the third sub-subpixel (Figure 4, E1-E3); and wherein the first sub-subpixel emits light when a display gray scale of the first subpixel is less than a first threshold (Figure 5 and [0058], RL); wherein the second sub-subpixel emits light, when the display gray scale of the first subpixel is greater than or equal to the first threshold and is less than a second threshold wherein the second threshold is greater than the first threshold (Figure 5 and [0058], RM); wherein the third sub-subpixel emits light when the display gray scale of the first subpixel is greater than or equal to the second threshold and is less than a third threshold wherein the third threshold is greater than the second threshold (Figure 5 and [0058], RH), wherein all the first sub-subpixel, the second sub-subpixel, and the third sub-subpixel (Figure 5).
Takahashi does not appear to specifically disclose all emit light when the display gray scale of the first subpixel is greater than or equal to the third threshold.
However, in a related field of endeavor, Uetake teaches an organic EL display device (abstract) and further teaches all emit light when the display gray scale of the first subpixel is greater than or equal to the third threshold ([0045], if the tone exceeds another threshold value D2, the drive transistor DR may allow the current to flow into both of the large light emitting element LL and the small light emitting element SL).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to emit light simultaneously as suggested by Uetake in order to express the brightness corresponding to the tone indicated by image data as suggested in [0045].
Takahashi does not appear to specifically disclose wherein the partition layer is configured to block transverse current crosstalk between the two adjacent sub-subpixels.
However, in a related field of endeavor, Kim teaches a display apparatus (abstract) and further teaches wherein the partition layer is configured to block transverse current crosstalk between the two adjacent sub-subpixels ([0079], banks 5 and 12).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a partition layer as shown by Kim’s figures 1-2, banks 5 and 12 in order to reduce the occurrence of a leakage current as suggested in [0079]. In other words, device should activate LEDs properly.
Takahashi does not appear to specifically disclose wherein a material of the partition layer includes a photoresist.
However, in a related field of endeavor, Lee teaches a display, light-emitting unit and bank (abstract) and further teaches wherein a material of the partition layer includes a photoresist ([0085], bank).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to have photoresist as a material as taught by Lee with the benefit that photosensitive layer 222 is exposed through the pattern mask 20, where the exposed photosensitive layer 222 is developed to form the bank 220 as suggested in [0107-0110] and figures 10b-c.
Consider claim 4, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 1. In addition, Takahashi teaches wherein an included angle between a side surface of the partition layer and a first plane is less than or equal to 90 degrees (Figure 6, 34), and the first plane is parallel to a plane in which a surface of the pixel structure is located (Figure 6, 34 and 35).
Consider claim 5, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 1. In addition, Takahashi teaches wherein each sub-subpixel in the plurality of sub-subpixels comprises an anode layer, an organic light emitting layer, and a cathode layer (Figure 6 and [0065-0067], 33, 35 and 36), and the organic light emitting layer is located between the anode layer and the cathode layer (Figure 6, 33, 35 and 36); the partition layer is arranged between anode layers of two adjacent sub-subpixels and between organic light emitting layers of two adjacent sub-subpixels (Figure 6, 34, 33 and 35); and the plurality of sub-subpixels share the same cathode layer (Figure 6, 36).
Consider claim 6, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 1. In addition, Takahashi teaches wherein the pixel structure further comprises: a drive layer, wherein a drive circuit is arranged on the drive layer (Figure 2, Qdr), each subpixel in the plurality of subpixels corresponds to one drive circuit, and the drive circuit is configured to independently control the plurality of sub-subpixels to emit light (Figure 2, Qdr and respective E1-E3); the drive circuit comprises a plurality of branch switches, a quantity of the plurality of branch switches is equal to a quantity of sub-subpixels comprised in one subpixel, and one branch switch corresponds to one sub-subpixel (Figure 2, three Qdr and E1-E3); and each sub-subpixel in the plurality of sub-subpixels comprises a light emitting diode, and the branch switch is configured to control on or off of a light emitting diode in a corresponding sub-subpixel (Figure 2, Qdr and the respective E1-E3).
Consider claim 7, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 6. In addition, Takahashi teaches wherein the branch switch is connected in series to a branch of a corresponding light emitting diode (Figure 2, Qdr and E1), and wherein the branch switch is configured to receive a control signal to turn on or off the light emitting diode of the branch in which the branch switch is located ([0054] and figure 2).
Consider claim 8, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 6. In addition, Takahashi teaches wherein the plurality of branch switches are connected in parallel (Figure 2, plurality of Qdr are connected in parallel), wherein the drive circuit further comprises a main switch (Figure 2, plurality of Qs1), wherein after being connected in parallel, the plurality of branch switches are connected in series to the main switch (Figure 2, Qsi and Qdr), wherein the main switch is connected to an input end of the drive circuit (Figure 2, Qsi), wherein when a drive voltage is input to the input end, the main switch is turned on (Figure 2, Qsi and S1-S3), and wherein the drive voltage corresponds to a display gray scale of a subpixel corresponding to the drive circuit (Figure 5, S1-S3 and gradation).
Consider claim 9, it includes the limitations of claim 1 and thus rejected by the same reasoning.
Consider claim 10, Takahashi teaches a display control apparatus, wherein the display control apparatus is configured to control a pixel structure in a self-luminous display panel (Figures 1-2 and [0052]), the pixel structure comprises a plurality of subpixels, each subpixel in the plurality of subpixels comprises a plurality of sub-subpixels, a partition layer is arranged between two adjacent sub- subpixels in the at least one subpixel of the plurality of subpixels (Figure 6, 34), a width of the partition layer increases in a direction from a lower surface of the partition layer to an upper surface of the partition layer (Figure 6, 34 in a direction of the light beam output (see arrows in figure 6)), a first subpixel in the plurality of subpixels comprises a first sub-subpixel, a second sub-subpixel and a third sub-subpixel, a light emitting area of the first sub-subpixel is less than a light emitting area of the second sub-subpixel, a light emitting area of the second sub-subpixel is less than a light emitting area of the third sub-subpixel (Figure 4, E1-E3), and the display control apparatus comprises: at least one processor and a transmission interface receiving programming instructions (Figure 1, 20, 22 and 24), wherein the at least one processor executes the programming instructions to: determine a display gray scale of the first subpixel; in response to determining that the display gray scale of the first subpixel is less than a first threshold: generate a first control signal, and control the transmission interface to send the first control signal to the first subpixel, the first control signal indicates to control a first sub- subpixel to emit light (Figure 5 and [0058], RL); in response to determining that the display gray scale of the first subpixel is greater than or equal to the first threshold and is less than a second threshold, generate a second control signal, and control the transmission interface to send the second control signal to the first subpixel, wherein the second control signal indicates to control the second sub-subpixel to emit light, and wherein the second threshold is greater than the first threshold (Figure 5 and [0058], RM); in response to determining that the display gray scale of the first subpixel is greater than or equal to the second threshold and is less than a third threshold, generate a third control signal, and control the transmission interface to send the third control signal to the first subpixel, wherein the third control signal indicates to control the third sub-subpixel to emit light, and wherein the third threshold is greater than the second threshold (Figure 5 and [0058], RH); and, generate a fourth control signal, and control the transmission interface to send the fourth control signal to the first subpixel, wherein the fourth control signal indicates to control the plurality of sub-subpixels to emit light (Figure 5 and [0058]).
Takahashi does not appear to specifically disclose in response to determining that the display gray scale of the first subpixel is greater than or equal to the third threshold, generate a fourth control signal, and control the transmission interface to send the fourth control signal to the first subpixel, wherein the fourth control signal indicates to control the plurality of sub-subpixels to emit light.
However, in a related field of endeavor, Uetake teaches in response to determining that the display gray scale of the first subpixel is greater than or equal to the third threshold, generate a fourth control signal, and control the transmission interface to send the fourth control signal to the first subpixel, wherein the fourth control signal indicates to control the plurality of sub-subpixels to emit light ([0045], if the tone exceeds another threshold value D2, the drive transistor DR may allow the current to flow into both of the large light emitting element LL and the small light emitting element SL).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to emit light simultaneously as suggested by Uetake in order to express the brightness corresponding to the tone indicated by image data as suggested in [0045].
Takahashi does not appear to specifically disclose a pixel definition layer is arranged between two adjacent subpixels in the plurality of subpixels, a partition layer is arranged between two adjacent sub-subpixels in at least one subpixel of the plurality of subpixels, the pixel definition layer is configured to block pixel crosstalk between the two adjacent subpixels, the partition layer is configured to block, the partition laver is configured to block transverse current crosstalk between the two adjacent sub-subpixels.
However, in a related field of endeavor, Kim teaches a display apparatus (abstract) and further teaches a pixel definition layer is arranged between two adjacent subpixels in the plurality of subpixels (Figure 2 shows that the structure is continuous (see for example outer banks in the figure). Thus, the banks can be considered in between pixels and thus in between sub-pixels) a partition layer is arranged between two adjacent sub-subpixels in at least one subpixel of the plurality of subpixels (Figure 2, banks 5 and 12), the pixel definition layer is configured to block pixel crosstalk between the two adjacent subpixels, the partition layer is configured to block ([0079], banks and leakage current), the partition laver is configured to block transverse current crosstalk between the two adjacent sub-subpixels ([0079], banks and leakage current).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a partition layer as shown by Kim’s figures 1-2, banks 5 and 12 in order to reduce the occurrence of a leakage current as suggested in [0079]. In other words, device should activate LEDs properly.
Kim does not appear to specifically disclose a pixel definition layer is arranged between two adjacent subpixels in the plurality of subpixels.
However, Lee teaches a pixel definition layer is arranged between two adjacent subpixels in the plurality of subpixels (Figure 10F, RGB and bank 220).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide definition layer or banks in between pixels and subpixels as taught by Lee since banks prevents the light-emitting material from flowing into neighboring cavities as suggested in [0082].
Consider claim 15, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 10. In addition, Takahashi teaches wherein the first control signal comprises an enable signal for turning on a switch corresponding to the first sub-subpixel, the second control signal comprises an enable signal for turning on a switch corresponding to the second sub-subpixel, the third control signal comprises an enable signal for turning on switches corresponding to the third sub- subpixel (Figure 2, S1-S3 and Qdr), and the fourth control signal comprises a plurality of enable signals for turning on switches corresponding to the plurality of sub-subpixels (Figure 2, S1-S3. Figure 12, S1-S2, G[i]), wherein the plurality of enable signals are in a one-to-one correspondence with the plurality of sub-subpixels (Figure 2, S1-S3 and Qdr).
Consider claim 18, it includes the limitations of claim 4 and thus rejected by the same reasoning.
Consider claim 19, it includes the limitations of claim 5 and thus rejected by the same reasoning.
Consider claim 20, it includes the limitations of claim 6 and thus rejected by the same reasoning.
Consider claim 21, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 9. In addition, Takahashi teaches wherein the self-luminous display panel includes: a micro light emitting diode (Micro LED), display panel, an organic light emitting diode (OLED) display panel, an active matrix organic light emitting diode (AMOLED) display panel, or a passive matrix organic light emitting diode (PMOLED) display panel ([0052] and [0003] and figure 2).
Consider claim 22, it includes the limitations of claim 21 and thus rejected by the same reasoning.
Consider claim 23, it includes the limitations of claim 1 and thus rejected by the same reasoning. In addition, Takahashi teaches a terminal (figures 1-2 100), wherein the terminal comprises a self-luminous display panel (figure 2, E1-E3).
Consider claim 24, it includes the limitations of claim 10 and thus rejected by the same reasoning.
Consider claim 25, it includes the limitations of claim 15 and thus rejected by the same reasoning.
Consider claim 26, it includes the limitations of claim 21 and thus rejected by the same reasoning.
Consider claim 29, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 1. In addition, Takahashi teaches wherein the partition layer has an inverted trapezoidal shape Figure 6, 34 in a direction of the light beam output (see arrows in figure 6)).
Claim(s) 27-28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi in view of Uetake, Kim, Lee and Liu U.S. Patent Publication No. 2021/0217348 (hereinafter Liu).
Consider claim 27, Takahashi teaches the computer or the processor is enabled to perform operations (Figure 1 and [0050], data determining unit 241 and control circuit 20. [0115] and figure 16, computer 2000) to control a pixel structure in a self-luminous display panel, the pixel structure comprising a plurality of subpixels, at least one subpixel in the plurality of subpixels comprising a plurality of sub-subpixels (Figure 2, U1-U3)]), a partition layer being arranged between two adjacent sub-subpixels in the at least one subpixel of the plurality of subpixels (Figure 6, 34), a width of the partition layer increases in a direction from a lower surface of the partition layer to an upper surface of the partition layer (Figure 6, 34 in a direction of the light beam output (see arrows in figure 6)) and the operations comprising: determining a display gray scale of the first subpixel; in response to determining that the display gray scale of the first subpixel is less than the first threshold, generating a first control signal, and controlling the transmission interface to send the first control signal to the first subpixel, the first control signal indicates to control a first sub- subpixel to emit light (Figure 5 and [0058], RL); in response to determining that the display gray scale of the first subpixel is greater than or equal to the first threshold and is less than a second threshold, generating a second control signal, and controlling the transmission interface to send the second control signal to the first subpixel, wherein the second control signal indicates to control the second sub-subpixel to emit light, and wherein the second threshold is greater than the first threshold (Figure 5 and [0058], RM); in response to determining that the display gray scale of the first subpixel is greater than or equal to the second threshold and is less than a third threshold, generating a third control signal, and controlling the transmission interface to send the third control signal to the first subpixel, wherein the third control signal indicates to control the third sub-subpixel to emit light, and wherein the third threshold is greater than the second threshold (Figure 5 and [0058], RH); generating a fourth control signal, and controlling the transmission interface to send the fourth control signal to the first subpixel, wherein the fourth control signal indicates to control the plurality of sub-subpixels to emit light (Figure 5).
Takahashi does not appear to specifically disclose in response to determining that the display gray scale of the first subpixel is greater than or equal to the third threshold, generating a fourth control signal, and controlling the transmission interface to send the fourth control signal to the first subpixel, wherein the fourth control signal indicates to control the plurality of sub-subpixels to emit light.
However, Uetake teaches in response to determining that the display gray scale of the first subpixel is greater than or equal to the third threshold, generating a fourth control signal, and controlling the transmission interface to send the fourth control signal to the first subpixel, wherein the fourth control signal indicates to control the plurality of sub-subpixels to emit light ([0045], if the tone exceeds another threshold value D2, the drive transistor DR may allow the current to flow into both of the large light emitting element LL and the small light emitting element SL).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to emit light simultaneously as suggested by Uetake in order to express the brightness corresponding to the tone indicated by image data as suggested in [0045].
Takahashi does not appear to specifically disclose a pixel definition layer is arranged between two adjacent subpixels in the plurality of subpixels, a partition layer is arranged between two adjacent sub-subpixels in at least one subpixel of the plurality of subpixels, the pixel definition layer is configured to block pixel crosstalk between the two adjacent subpixels, the partition layer is configured to block, the partition laver is configured to block transverse current crosstalk between the two adjacent sub-subpixels.
However, in a related field of endeavor, Kim teaches a display apparatus (abstract) and further teaches a pixel definition layer is arranged between two adjacent subpixels in the plurality of subpixels (Figure 2 shows that the structure is continuous (see for example outer banks in the figure). Thus, the banks can be considered in between pixels and thus in between sub-pixels) a partition layer is arranged between two adjacent sub-subpixels in at least one subpixel of the plurality of subpixels (Figure 2, banks 5 and 12), the pixel definition layer is configured to block pixel crosstalk between the two adjacent subpixels, the partition layer is configured to block ([0079], banks and leakage current), the partition laver is configured to block transverse current crosstalk between the two adjacent sub-subpixels ([0079], banks and leakage current).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a partition layer as shown by Kim’s figures 1-2, banks 5 and 12 in order to reduce the occurrence of a leakage current as suggested in [0079]. In other words, device should activate LEDs properly.
Kim does not appear to specifically disclose a pixel definition layer is arranged between two adjacent subpixels in the plurality of subpixels.
However, Lee teaches a pixel definition layer is arranged between two adjacent subpixels in the plurality of subpixels (Figure 10F, RGB and bank 220).
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide definition layer or banks in between pixels and subpixels as taught by Lee since banks prevents the light-emitting material from flowing into neighboring cavities as suggested in [0082].
Takahashi does not appear to specifically disclose a non-transient computer-readable the non-transient storage medium, wherein the computer-readable storage medium stores instructions, and when the instructions are run on a computer or a processor, the computer or the processor is enabled to perform operations.
However, in a related field of endeavor, Liu teaches a light emitting unit (abstract) and further teaches a non-transient computer-readable storage medium, wherein the non-transient computer-readable storage medium stores instructions, and when the instructions are run on a computer or a processor, the computer or the processor is enabled to perform operations [0096-0097].
Therefore, it would have been obvious to one of the ordinary skill in art before the effective filing date of the claimed invention to provide a storage medium as taught by Liu with the benefit that when the computer-readable storage medium runs on a computer, the computer is caused to execute the driving method of the display panel as suggested in [0096]. In addition, persons of ordinary skill in the art can understand that all or part of the steps can be completed through hardware, or through relevant hardware instructed by applications stored in a non-transitory computer readable storage medium, such as a read-only memory, a disk or a CD as suggested in [0097].
Consider claim 28, it includes the limitations of claim 27 and thus rejected by the same reasoning. In addition, Takahashi teaches a computer program product executable instructions, wherein when the computer program product is run on a computer or a processor, the computer or the processor is enabled to perform operations (Figure 1 and [0050], data determining unit 241 and control circuit 20. [0115] and figure 16, computer 2000).
Claim(s) 30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi, Uetake, Kim and Lee as applied to claim 1 above, and further in view of Kamura et al. U.S. Patent Publication No. 2016/0372528 (hereinafter Kamura).
Consider claim 30, Takahashi, Uetake, Kim and Lee teach all the limitations of claim 1.
Takahashi does not appear to specifically disclose wherein a width of the partition layer is between 1 um and 2 um.
However, in a related field of endeavor, Kamura teaches a display device [0001] and further teaches wherein a width of the partition layer is between 1 um and 2 um [0155].
Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to provide a particular partion layer or bank as taught by Kamura in order to maintain the structure of the bank and display a higher high resolution image as suggested by Kamura in [0155].
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument (see new reference Lee).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ROBERTO W FLORES/Primary Examiner, Art Unit 2621