Prosecution Insights
Last updated: October 27, 2026
Application No. 18/339,583

LIGHT EMITTING ELEMENT, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING THE DISPLAY DEVICE

Final Rejection §102
Filed
Jun 22, 2023
Priority
Aug 10, 2022 — RE 10-2022-0100142
Examiner
MICHAUD, NICHOLAS BRIAN
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Final)
75%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
45 granted / 60 resolved
+7.0% vs TC avg
Strong +30% interview lift
Without
With
+30.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
24 currently pending
Career history
97
Total Applications
across all art units

Statute-Specific Performance

§103
55.2%
+15.2% vs TC avg
§102
18.4%
-21.6% vs TC avg
§112
25.8%
-14.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 60 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Application Claims 1-20 remain pending in this application. Acknowledgement is made of the amendment received 06/23/2026. Claims 1, 2, 6, 13, and 14 are amended. Claims 16-20 remain withdrawn. Claim Rejections - 35 USC § 102 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dimitropoulos et al (US 20200105969 A1, hereafter Dimitropoulos). Regarding claim 1, Dimitropoulos discloses: A light emitting element (Dimitropoulos 2000, fig 1B, 10A, 20, ¶0106) comprising: a first end surface (Dimitropoulos, top surface of 2010) and a second end surface (Dimitropoulos, bottom surface of 2025) opposite to each other (Dimitropoulos fig 20); a first semiconductor layer (Dimitropoulos 2010, ¶0106) disposed at the first end surface (Dimitropoulos fig 20); an active layer (Dimitropoulos 2015, ¶0106) disposed on the first semiconductor layer (Dimitropoulos fig 20); a second semiconductor layer (Dimitropoulos 2020, ¶0106) disposed on the active layer (Dimitropoulos fig 20); and an electrode layer (Dimitropoulos 2025, ¶0106, under a broadest reasonable interpretation (BRI) of “electrode”) disposed on the second semiconductor layer and disposed at the second end surface (Dimitropoulos fig 20, ¶0106), wherein the first semiconductor layer (Dimitropoulos 2010) includes: a first part (Dimitropoulos first part, annotated Dimitropoulos fig 20, provided below, patterned part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117), a second part (Dimitropoulos second part, annotated Dimitropoulos fig 20, top part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117) disposed on the first part and adjacent to the active layer (annotated Dimitropoulos fig 20), and a third part (Dimitropoulos third part, annotated Dimitropoulos fig 20, provided below, middle part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117) disposed between the first part and the second part (annotated Dimitropoulos fig 20), wherein a width of the first part and a width of the second part are different from each other (annotated Dimitropoulos fig 1B, 20, ¶0048, second part is greater than W and first part is less than W), wherein the third part has different widths at different length positions (annotated Dimitropoulos fig 1B, 20, ¶0048, having sloped sidewalls), and each of the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20 above) and the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) has a cylindrical pillar shape (annotated Dimitropoulos fig 20, ¶0050, 0053, given a broadest reasonable meaning of the words in their ordinary usage and consistent with the specification, a pillar is an elongated body; “cylindrical” modifies “pillar” such that is specifies its cross-sectional character, i.e. circular or round as opposed to square or polygonal; ordinary usage requires neither that the body be of a constant diameter along its length, nor that its cross-section be solid or filled. Therefore “cylindrical pillar shape” includes an elongated body having a circular cross-section wherein the diameter varies along its length, as in the first part, and an elongated body having an annular cross-section of a constant outer diameter, as in the second part). PNG media_image1.png 582 627 media_image1.png Greyscale Annotated Dimitropoulos fig 20 Regarding claim 2, Dimitropoulos discloses: The light emitting element of claim 1, wherein the width of the second part is greater than the width of the first part (annotated Dimitropoulos fig 1B, 20, ¶0048, second part is greater than W and first part is less than W). Regarding claim 3, Dimitropoulos discloses: The light emitting element of claim 2, wherein the width of the third part (Dimitropoulos third part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) increases as becoming closer to the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) from the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20)(annotated Dimitropoulos fig 20, ¶0048). Regarding claim 4, Dimitropoulos discloses: The light emitting element of claim 3, wherein the third part (Dimitropoulos third part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) has a truncated cone shape (annotated Dimitropoulos fig 20, ¶0048). Regarding claim 5, Dimitropoulos discloses: The light emitting element of claim 3, wherein a side surface of the third part (Dimitropoulos third part, annotated Dimitropoulos fig 20) has a slope at an angle with respect to the first end surface (Dimitropoulos, top surface of 2010) of the light emitting element (Dimitropoulos 2000)(annotated Dimitropoulos fig 20). Regarding claim 6, Dimitropoulos discloses: The light emitting element of claim 5, wherein the angle is 120 degrees or more (Dimitropoulos ¶0044, 0048, “sloped sidewalls … 160 degrees”). Regarding claim 7, Dimitropoulos discloses: The light emitting element of claim 2, wherein each of the active layer (Dimitropoulos 2015), the second semiconductor layer (Dimitropoulos 2020), and the electrode layer (Dimitropoulos 2025) has a cylindrical pillar shape (Dimitropoulos fig 1B, 13, 20, ¶0050, 0053, under a BRI of “cylindrical pillar”). Regarding claim 8, Dimitropoulos discloses: The light emitting element of claim 7, wherein a width of the active layer (Dimitropoulos 2015), a width of the second semiconductor layer (Dimitropoulos 2020), a width of the electrode layer (Dimitropoulos 2025), and the width of the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) are substantially same as each other (annotated Dimitropoulos fig 20, fig 1B, ¶0048, at least the exterior diameters of each layer has width 2s+W). Regarding claim 9, Dimitropoulos discloses: The light emitting element of claim 1, further comprising: a reflective layer (Dimitropoulos 2030, ¶0056, 0070, 0117, “n-contacts … provide … optical reflection”) surrounding a side surface of the first semiconductor layer (Dimitropoulos 2010), a side surface of the active layer (Dimitropoulos 2015), a side surface of the second semiconductor layer (Dimitropoulos 2020), and a side surface of the electrode layer (Dimitropoulos 2025)(Dimitropoulos fig 20, ¶0070, “entirely surround each LED to provide for optical isolation and/or optical reflection”). Regarding claim 10, Dimitropoulos discloses: The light emitting element of claim 9, wherein the reflective layer (Dimitropoulos 2030) includes a reflective metal material (Dimitropoulos ¶0056, “silver… aluminum or aluminum alloy”). Regarding claim 11, Dimitropoulos discloses: The light emitting element of claim 1, further comprising: an insulative film (Dimitropoulos 2040/2055/2060, 1140, ¶0108, 0117) surrounding a side surface of the first semiconductor layer (Dimitropoulos 2010), a side surface of the active layer (Dimitropoulos 2015), a side surface of the second semiconductor layer (Dimitropoulos 2020), and a side surface of the electrode layer (Dimitropoulos 2025)(Dimitropoulos fig 11A, 20, ¶0108, 0117, “between the epitaxial layers and n-contact 2030, … a dielectric insulator 2040”). Regarding claim 12, Dimitropoulos discloses: The light emitting element of claim 11, wherein the insulative film (Dimitropoulos 2040/2055/2060) exposes the first end surface (Dimitropoulos, top surface of 2010) of the light emitting element (Dimitropoulos 2000) as a lower surface of the first semiconductor layer (Dimitropoulos 2010), and exposes the second end surface (Dimitropoulos, bottom surface of 2025) of the light emitting element as an upper surface of the electrode layer (Dimitropoulos 2025)(Dimitropoulos 20, first and second end surfaces not covered vertically by 2040, therefore meeting a BRI of the insulative film exposes the ends). Regarding claim 13, Dimitropoulos discloses: A display device (Dimitropoulos 585, 1900, 2000, ¶0041, 0080, 0103, fig 19A, 20) comprising: a pixel (Dimitropoulos 585, 1900, 2000, fig 1B, 10A, 20, ¶0066, 0089, 0106) including: a first electrode (Dimitropoulos 2030, ¶0056, 0075, 0078, 0117), a second electrode (Dimitropoulos 585, ¶0073, 0094), and a light emitting element (Dimitropoulos 2000, fig 1B, 10A, 20, ¶0106) including: a first end surface (Dimitropoulos, top surface of 2010) electrically connected to the first electrode (Dimitropoulos, ¶0056, 0075, 0078, 0117), and a second end surface (Dimitropoulos, bottom surface of 2025) electrically connected to the second electrode (Dimitropoulos, ¶0073, 0075, 0094), wherein the light emitting element includes: a first semiconductor layer (Dimitropoulos 2010, ¶0106) disposed at the first end surface (Dimitropoulos fig 20); an active layer (Dimitropoulos 2015, ¶0106) disposed on the first semiconductor layer (Dimitropoulos fig 20); a second semiconductor layer (Dimitropoulos 2020, ¶0106) disposed on the active layer (Dimitropoulos fig 20); and an electrode layer (Dimitropoulos 2025, ¶0106, under a BRI of “electrode”) disposed on the second semiconductor layer and disposed at the second end surface (Dimitropoulos fig 20, ¶0106), the first semiconductor layer (Dimitropoulos 2010) includes: a first part (Dimitropoulos first part, annotated Dimitropoulos fig 20, provided above, patterned part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117), a second part (Dimitropoulos second part, annotated Dimitropoulos fig 20, top part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117) disposed on the first part and adjacent to the active layer (annotated Dimitropoulos fig 20), and a third part (Dimitropoulos third part, annotated Dimitropoulos fig 20, middle part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117) disposed between the first part and the second part (annotated Dimitropoulos fig 20), wherein a width of the first part and a width of the second part are different from each other (annotated Dimitropoulos fig 1B, 20, ¶0048, second part is greater than W and first part is less than W), wherein the third part has different widths at different length positions (annotated Dimitropoulos fig 1B, 20, ¶0048, having sloped sidewalls), and wherein each of the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20 above) and the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) has a cylindrical pillar shape (annotated Dimitropoulos fig 20, ¶0050, 0053, given a broadest reasonable meaning of the words in their ordinary usage and consistent with the specification, a pillar is an elongated body; “cylindrical” modifies “pillar” such that is specifies its cross-sectional character, i.e. circular or round as opposed to square or polygonal; ordinary usage requires neither that the body be of a constant diameter along its length, nor that its cross-section be solid or filled. Therefore “cylindrical pillar shape” includes an elongated body having a circular cross-section wherein the diameter varies along its length, as in the first part, and an elongated body having an annular cross-section of a constant outer diameter, as in the second part Regarding claim 14, Dimitropoulos discloses: The display device of claim 13, wherein the width of the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) is greater than the width of the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20 above)(annotated Dimitropoulos fig 1B, 20, ¶0048, second part is greater than W and first part is less than W). Regarding claim 15, Dimitropoulos discloses: The display device of claim 14, wherein the width of the third part (Dimitropoulos third part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) increases as becoming closer to the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) from the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20)(annotated Dimitropoulos fig 20, ¶0048). Response to Arguments Applicant’s arguments filed 06/23/2026, with respect to the specification has been fully considered and is persuasive. The objection to the specification has been withdrawn. Applicant’s arguments filed 06/23/2026, with respect to claim 6 has been fully considered and is persuasive. The 35 USC § 112 rejections of claims 6 has been withdrawn. Applicant’s arguments filed 06/23/2026, with respect to claims 1 and 13 have been fully considered and are not persuasive. Regarding claims 1 and 13, the applicant alleges at pages 10 and 11: The alleged first and second parts are not "cylindrical parts." In FIG. 20 of Dimitropoulos, the alleged first part has a truncated cone shape and the alleged second part has an empty inner side. The alleged first and second parts in Dimitropoulos fail to read on "wherein each of the first part and the second part of the first semiconductor layer has a cylindrical pillar shape" recited in claim 1. For at least the foregoing reasons, claim 1 is patentable over Dimitropoulos. Accordingly, the rejection of claim 1 and its dependent claims should be withdrawn. Claim 13 is recited above but is not repeated. Dimitropoulos fails to disclose or render obvious claim 13. … Accordingly, the rejection of claim 13 and its dependent claims should be withdrawn. Examiner’s response: The Examiner respectfully disagrees. Applicant’s argument appears to rest on an interpretation of “cylindrical pillar shape” requiring a constant diameter and/or a solid cross-section. However, the specification does not define the term as such. It appears that each use of the term in the specification is exemplary or permissive (spec ¶0076, 0082), and the words of the claim are accordingly given their broadest reasonable meaning in their ordinary usage consistent with the specification (see MPEP 2111.01). Applicant’s specification further qualifies “cylindrical pillar shape” to further limit the characteristics for particular embodiments (spec ¶0082, “the shape of a cylindrical pillar having the same sectional area along the length direction”), a qualification that would not be necessary if the term itself required the same sectional area along the length direction. Similarly, the specification does not appear to condition “cylindrical pillar shape” as having a solid or filled inner side. The interpretation applied is set forth in the above rejections. Therefore, it is noted that the features upon which applicant appears to rely on (i.e., a constant diameter and/or solid cross-section) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS B. MICHAUD whose telephone number is (703)756-1796. The examiner can normally be reached Monday-Friday, 0800-1700 Eastern Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at (571) 272-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NICHOLAS B. MICHAUD/ EXAMINER Art Unit 2818 /BRIAN TURNER/Examiner, Art Unit 2818
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Prosecution Timeline

Jun 22, 2023
Application Filed
Mar 25, 2026
Non-Final Rejection mailed — §102
Jun 23, 2026
Response Filed
Sep 28, 2026
Final Rejection mailed — §102 (current)

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Prosecution Projections

3-4
Expected OA Rounds
75%
Grant Probability
99%
With Interview (+30.0%)
3y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 60 resolved cases by this examiner. Grant probability derived from career allowance rate.

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