DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to communication from applicant received May 21, 2026.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 21, 2026 has been entered. Claim 23 has been canceled. Claim 24 has been added. Claims 1-14, 19-20, 22 and 24 are allowed. Claims 15-16 are rejected herein.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Osqueizadeh et al. (Hereinafter Osqueizadeh, U.S. Publication No. 2018/0349057) in view of Bolkhovitin et al. (Hereinafter Bolkhovitin, U.S. Publication No. 2018/0341606) in view of Kachare et al. (Hereinafter Kachare, U.S. Publication No. 2021/0281639).
Regarding claim 15, Osqueizadeh teaches:
A computational storage device comprising:
a non-volatile memory device configured to store first data (See Figure 6, Non-volatile memory NVM 635.sub.1.) used in execution of a first program offloaded from a host device (See [0045] “Embedded controller 610 enables offloading high-throughput work from the host CPUs and enables dGPU 630.sub.1 to 630m to dispatch requests to NVM 635.sub.1 to 635k at a file system level, with embedded controller 610 managing the file system. In particular, embedded controller 610 can run NVMs 635.sub.1 to 635k as raw RAID storage array on SSG board 600 and provide a single linear addressed storage array view to other components. In an implementation, embedded controller 610 can be implemented or emulated on a dedicated host CPU thread or offloaded to a dedicated embedded system or CPU, (e.g. a field-programmable gate array (FPGA)), without a change to the application visible functionality. Offloading can improve performance and system throughput.”);
a local memory configured to store the first data read from the non-volatile memory device (See Figure 6, local memory 632.sub.1. See Figure 1 in which element 142 depicts data transfer from local memory to non-volatile memory, and element 140 depicts data transfer from non-volatile memory to local memory, as supported in paragraph [0018].), and store second data that are used in execution of the first program and transferred from another computational storage device (See Figure 6, local memory 632.sub.1. See Figure 1 in which element 142 depicts data transfer from local memory to non-volatile memory, and element 140 depicts data transfer from non-volatile memory to local memory, as supported in paragraph [0018].); and
a compute engine including an accelerator (See graphics processing units (accelerators) dGPU 130.sub.1 depicted in Figure 1. See graphics processing units (accelerators) dGPU 430.sub.1 depicted in Figure 4. See [0046] “accelerators like dGPU 630.sub.1 to 630m”).) configured to execute the first program offloaded from the host…(See [0045] “Embedded controller 610 enables offloading high-throughput work from the host CPUs and enables dGPU 630.sub.1 to 630m to dispatch requests to NVM 635.sub.1 to 635k at a file system level, with embedded controller 610 managing the file system. In particular, embedded controller 610 can run NVMs 635.sub.1 to 635k as raw RAID storage array on SSG board 600 and provide a single linear addressed storage array view to other components. In an implementation, embedded controller 610 can be implemented or emulated on a dedicated host CPU thread or offloaded to a dedicated embedded system or CPU, (e.g. a field-programmable gate array (FPGA)), without a change to the application visible functionality. Offloading can improve performance and system throughput.”)
wherein the computational storage device is configured to transfer the first data from the non-volatile memory device to the local memory (See Figure 6, local memory 632.sub.1. See Figure 1 in which element 142 depicts data transfer from local memory to non-volatile memory, and element 140 depicts data transfer from non-volatile memory to local memory, as supported in paragraph [0018].),
Osqueizadeh does not explicitly disclose what Bolkhovitin teaches:
a compute engine… configured to execute the first program offloaded from the host device (See Offload Services Module(s) 322-1 – 322-m depicted in Figure 3. See [0102] “With the support provided by their respective offload services modules 322, the SSDs 304 handle the offloaded operations in response to host commands, in accordance with some embodiments.”) using a plurality of data comprising the first data and the second data … the first data comprising data that is read from the non-volatile memory device, and the second data comprising data that is read from the another computational storage device and brought into the local memory of the computational storage device (See [0118] “sends one or more subsequent commands, also using a command module (e.g., module 252-3), to the first storage device and/or the second storage device to perform a peer-to-peer transfer of the write data from the second controller memory buffer to the first controller memory buffer and to perform a parity computation at the first storage device on the set of write data in the first controller memory buffer, as shown in 484” See [0119] “Two examples are provided for further illustration. In a first example, the one or more subsequent commands are a peer-to-peer transfer command to the second storage device to send the write data to the first storage device, and a parity computation command that is set to the first storage device after the peer-to-peer transfer is completed. In a second example, the one or more subsequent commands are combined transfer and parity computation command sent to the first storage device to pull in a copy of the write data from the second controller memory buffer and then to compute or update parity using the transferred copy of the write data.” See [0120] “Further, in some such embodiments, if any parity information has already been written to the memory block in the first storage device, it is updated with the write data in the first controller memory buffer. Also, in some embodiments, after sending the write and parity computation commands, the main controller subsystem receives one or more finished notifications from the first storage device and the second storage device” Parity computation is executed/updated on the first storage device by using write data (first data) brought from the second storage device and by using parity data (second data) stored on the first storage device. See Abstract, Figure 4H and Figure 4I, [0107] and [0117]-[0120] for full context of offloading data writes to multiple storage devices for data computation(s).),
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the storage system of Osqueizadeh with the data management function offload method of Bolkhovitin to improve the performance of non-volatile memory storage by offloading data management functions to one or more storage devices in a multi-device storage environment (See [0016] of Bolkhovitin).
Osqueizadeh and Bolkhovitin do not explicitly disclose what Kachare teaches:
and transfer the second data from a shared memory space of the another computational storage device to the local memory (See [0046] “In some embodiments, one or more storage devices may use peer-to-peer data transfers to implement computational storage and/or otherwise offload computation and/or bandwidth loads from one or more hosts and/or host interfaces. For example, in some embodiments, one or more storage devices in a group or subgroup of devices having a peer-to-peer channel configured between them may be designated to perform data compression, encryption, and/or the like for the other storage devices in the group, subgroup, storage system, and/or the like. As another example, in some embodiments, one or more storage devices may use peer-to-peer channels to transfer intermediate calculation results between devices for further calculations without having to send and/or receive the intermediate results to and/or from a host.”), wherein the shared memory space and the local memory each comprise volatile memory (While the prior art does not explicitly disclose the shared memory and local memory to comprise volatile memory, memory can either be volatile or non-volatile. Therefore, it would have obvious to try, choosing from a finite number of identified, predictable memory technology types (i.e. such as non-volatile and volatile memory), with a reasonable expectation of success. That is, memory can be either volatile or non-volatile, with one of ordinary skilled in the art choosing between the two based on the limitations and advantages/disadvantages between the two memory technologies.);
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the storage system of Osqueizadeh and the data management function offload method of Bolkhovitin with the offload method of Kachare to transfer intermediate calculation results between devices for further calculations without having to send and/or receive the intermediate results to and/or from a host, thus enabling faster access/use of the calculated data.
Regarding claim 16, Bolkhovitin teaches:
The computational storage device of claim 15,
wherein the computational storage device is further configured to execute the first program in response to a program execution command transmitted by the host device (See Offload Services Module(s) 322-1 – 322-m depicted in Figure 3. See [0102] “With the support provided by their respective offload services modules 322, the SSDs 304 handle the offloaded operations in response to host commands, in accordance with some embodiments.”), and
Bolkhovitin does not explicitly disclose what Kachare teaches:
wherein the compute engine is further configured to directly transfer the second data from the shared memory space of the another computational storage device to the local memory of the computational storage device (See [0046] “In some embodiments, one or more storage devices may use peer-to-peer data transfers to implement computational storage and/or otherwise offload computation and/or bandwidth loads from one or more hosts and/or host interfaces. For example, in some embodiments, one or more storage devices in a group or subgroup of devices having a peer-to-peer channel configured between them may be designated to perform data compression, encryption, and/or the like for the other storage devices in the group, subgroup, storage system, and/or the like. As another example, in some embodiments, one or more storage devices may use peer-to-peer channels to transfer intermediate calculation results between devices for further calculations without having to send and/or receive the intermediate results to and/or from a host.”);
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the storage system of Osqueizadeh and the data management function offload method of Bolkhovitin with the offload method of Kachare to transfer intermediate calculation results between devices for further calculations without having to send and/or receive the intermediate results to and/or from a host, thus enabling faster access/use of the calculated data.
Allowable Subject Matter
Claims 1-14, 19-20, 22 and 24 are allowed.
Response to Arguments
Due to amendments filed on May 21, 2026, claims 1-14, 19-20, 22 and 24 are allowed, as the prior art does not teach the totality of the claimed limitations. Applicant's arguments filed May 21, 2026 in regards to newly filed amendments for claim 15 have been fully considered and are not persuasive. On page 13 of applicant’s arguments, Applicant submitted that amendments to claim 15 filed on May 21, 2026 is patentable over the cited art. Examiner respectfully disagrees, and submits that Bolkhovitin teaches the amendments filed on May 21, 2026 (see rejection of claim 15.). On page 14 of applicant’s arguments, applicant submitted that the Office Action failed to establish a prima facie case of obviousness and submitted that the Office Action has not met the evidentiary burden necessary to support an obvious rejection. Applicant further submitted that the cited portion of Kachare does not indicate a reasonable expectation of success that the concept provided in the cited portion of Kachare could be applied to transfers between volatile memory. Examiner respectfully disagrees and maintains that examiner’s obviousness rationale and motivation are proper in the combination of the cited art for claim 15. Furthermore, examiner submits that data transfer between volatile memories and nonvolatile memories is a simple concept to one of ordinary skilled in the art, and thus the citations provided in Kachare are sufficient to support the combination of the cited art. Due to applicant’s arguments for claim 15 not being persuasive, claim 15 and claim 16 remain rejected herein.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL L WESTBROOK whose telephone number is (571)270-5028. The examiner can normally be reached Mon-Fri 9am-5pm.
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/MICHAEL L WESTBROOK/Examiner, Art Unit 2139
/REGINALD G BRAGDON/Supervisory Patent Examiner, Art Unit 2139
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