DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The Information Disclosure Statements filed on June 28, 2023 and September 12, 2024 have been considered. Initialed copies of the Form 1449 are enclosed herewith.
Claim Rejections - 35 USC § 101
35 U.S.C. § 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. § 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Step 1 – “Statutory Category Identification”
Claim 1 is directed to “a computer-implemented method” (i.e. a process), claim 10 is directed to “a computer system” (i.e. a machine), and claim 19 is directed to “a computer program product” (i.e. a machine), hence the claims are directed to one of the four statutory categories (i.e. process, machine, manufacture, or composition of matter). In other words, Step 1 of the subject-matter eligibility analysis is “Yes.”
Step 2A, Prong 1 “Abstract Idea Identification”
However, the claims are drawn to the abstract idea of “a training simulation,” in the form of “certain methods of organizing human activity,” in terms of managing personal behavior or relationships or interactions between people (including social activities, teaching and following rules or instructions), or reasonably in the form of “mental processes,” in terms of processes that can be performed in the human mind (including an observation, evaluation, judgement or opinion). Regardless, the claims are reasonably understood as either “certain methods of organizing human activity” or “mental processes,” which require the following limitations:
Per claim 1:
“generating, based at least in part on user interaction with the training simulation, a plurality of running simulation threads that could arrive as part of the training simulation for the user;
dynamically incorporating a running simulation thread of the plurality of running simulation threads into the training simulation for the user based on the user’s interaction with the training simulation; and
updating the plurality of running simulation threads that could arrive as part of the training simulation for the user, based on the user’s interaction with the training simulation.”
Per claim 10:
“initiating a training simulation for a user to complete a task, the training simulation lacking step-by-step guidance to the user on how to complete the task of the training simulation; and
generating, based at least in part on user interaction with the training simulation, a plurality of running simulation threads that could arrive as part of the training simulation for the user;
dynamically incorporating, a running simulation thread of the plurality of running simulation threads into the training simulation for the user based on the user’s interaction with the training simulation; and
updating the plurality of running simulation threads that could arrive as part of the training simulation for the user, based on the user’s interaction with the training simulation.”
Per claim 19:
“generating, based at least in part on user interaction with the training simulation, a plurality of running simulation threads that could arrive as part of the training simulation for the user;
dynamically incorporating a running simulation thread of the plurality of running simulation threads into the training simulation for the user based on the user’s interaction with the training simulation; and
updating the plurality of running simulation threads that could arrive as part of the training simulation for the user, based on the user’s interaction with the training simulation.”
These limitations simply describe a process of data gathering and manipulation, which is partially analogous to “collecting information, analyzing it, and displaying certain results of the collection analysis” (i.e. Electric Power Group, LLC, v. Alstom, 830 F.3d 1350, 119 U.S.P.Q.2d 1739 (Fed. Cir. 2016)). Hence, these limitations are akin to an abstract idea which has been identified among non-limiting examples to be an abstract idea. In other words, Step 2A, Prong 1 of the subject-matter eligibility analysis is “Yes.”
Step 2A, Prong 2 – “Practical Application”
Furthermore, the claims do not include additional elements that either alone or in combination are sufficient to claim a practical application because to the extent that, e.g., “a memory” and “at least one processor,” are claimed, as these are merely claimed to generally link the use of a judicial exception to a particular technological environment or field of use. In other words, the claimed “a training simulation,” is not providing a practical application, thus Step 2A, Prong 2 of the subject-matter eligibility analysis is “No.”
Step 2B – “Significantly More”
Likewise, the claims do not include additional elements that either alone or in combination are sufficient to amount to significantly more than the judicial exception because to the extent that, e.g. “a memory” and “at least one processor,” are claimed, these are generic, well-known, and conventional elements. As evidence that these are generic, well-known, and a conventional elements (or an equivalent term), as a commercially available product, or in a manner that indicates that the additional elements are sufficiently well-known, the Applicant’s specification discloses these in a manner that indicates that the additional elements are sufficiently well-known that the specification does not need to describe the particulars of such additional elements to satisfy 35 U.S.C. § 112(a), per MPEP § 2106.07(a) III (a). As such, this satisfies the Examiner’s evidentiary burden requirement per the Berkheimer memo.
Moreover, the element of “a memory,” is best described in paras. [0024] and [0030] as follows:
“A “storage device” is any tangible device that can retain and store instructions for use by a computer processor. Without limitation, the computer readable storage medium may be an electronic storage medium, a magnetic storage medium, an optical storage medium, an electromagnetic storage medium, a semiconductor storage medium, a mechanical storage medium, or any suitable combination of the foregoing. Some known types of storage devices that include these mediums include: diskette, hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or Flash memory), static random access memory (SRAM), compact disc read-only memory (CD-ROM), digital versatile disk (DVD), memory stick, floppy disk, mechanically encoded device (such as punch cards or pits/lands formed in a major surface of a disc) or any suitable combination of the foregoing.”
“[0030] Volatile memory 112 is any type of volatile memory now known or to be developed in the future. Examples include dynamic type random access memory (RAM) or static type RAM. Typically, the volatile memory is characterized by random access, but this is not required unless affirmatively indicated. In computer 101, the volatile memory 112 is located in a single package and is internal to computer 101, but, alternatively or additionally, the volatile memory may be distributed over multiple packages and/or located externally with respect to computer 101.
This element is reasonably interpreted as a generic, well-known, and as a commercially available product which provides no details of anything beyond ubiquitous standard off-the-shelf equipment.
Likewise, the element of “at least one processor,” is best described in para. [0027] as follows:
“[0027] Processor set 110 includes one, or more, computer processors of any type now known or to be developed in the future. Processing circuitry 120 may be distributed over multiple packages, for example, multiple, coordinated integrated circuit chips. Processing circuitry 120 may implement multiple processor threads and/or multiple processor cores. Cache 121 is memory that is located in the processor chip package(s) and is typically used for data or code that should be available for rapid access by the threads or cores running on processor set 110. Cache memories are typically organized into multiple levels depending upon relative proximity to the processing circuitry. Alternatively, some, or all, of the cache for the processor set may be located “off chip.” In some computing environments, processor set 110 may be designed for working with qubits and performing quantum computing.”
This element is also reasonably interpreted as a generic, well-known, and as a commercially available product which provides no details of anything beyond ubiquitous standard off-the-shelf equipment.
Therefore, the Applicant’s own specification discloses ubiquitous standard equipment that is (1) generic, routine, conventional, and/or commercially available; and (2) does not provide anything significantly more. Thus, Step 2B, of the subject-matter eligibility analysis is “No.”
In addition, dependent claims 2-9, 11-18 and 20 do not provide a practical application and are insufficient to amount to significantly more than the judicial exception. As such, dependent claims 2-9, 11-18 and 20 are also rejected under 35 U.S.C. § 101, based on their respective dependencies to claim 1, 10 or 19. Therefore, claims 1-20 are rejected under 35 U.S.C. § 101 as being directed to non-statutory subject matter.
Claims 19-20 are further rejected under 35 U.S.C. § 101 because the claimed invention is directed to non-statutory subject matter.
Claim 19 recites “a computer program product.” The specification as originally filed does not provide that “a computer program product” can only be of a non-transitory embodiment. Though one of ordinary skill in the art would recognize that this limitation includes elements such as a hard-drive, the limitation also encompasses transitory elements such as data signals and carrier waves, which are non-statutory per se. As the broadest reasonable interpretation of the claim includes non-statutory embodiments, the claim is rejected as being non-statutory subject matter. Therefore, claim 19 is rejected under 35 U.S.C. § 101 as being non-statutory subject matter. Claim 20 is also rejected under 35 U.S.C. § 101 as being non-statutory subject matter, based on its respective dependency to claim 19.
Allowable Subject Matter
Claims 1-20 contain allowable subject matter. The closest prior art of record is U.S. PG Pub. 2011/0021180 to Ray and U.S. Pat. 6,340,977 to Lui, et al. (herein referred to as “Lui”). However, Ray and Lui do not explicitly teach:
“the training simulation lacking step-by-step guidance to the user on how to complete the task of the training simulation,”
per claim 1, and substantially similar limitations in claims 10 and 19. Therefore, claims 1-20 are allowable subject matter, if no other statutory rejections remain. In the present case, claims 1-20 stand rejected under 35 U.S.C. §101.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT P. BULLINGTON whose telephone number is (313) 446-4841. The examiner can normally be reached on Monday through Friday from 8 A.M. to 4 P.M. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Peter Vasat, can be reached on (571) 270-7625. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/Robert P Bullington, Esq./ Primary Examiner, Art Unit 3715