Prosecution Insights
Last updated: May 29, 2026
Application No. 18/343,531

BUCK-BOOST CONVERTER REDUCING INDUCTOR CURRENT

Non-Final OA §102§103
Filed
Jun 28, 2023
Priority
Jun 28, 2022 — RE 10-2022-0078743
Examiner
TORRES-RIVERA, ALEX
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Hangzhou Silicon-Magic Semiconductor Technology Co. Ltd.
OA Round
4 (Non-Final)
86%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
661 granted / 766 resolved
+18.3% vs TC avg
Moderate +12% lift
Without
With
+11.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
27 currently pending
Career history
787
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
81.8%
+41.8% vs TC avg
§102
9.4%
-30.6% vs TC avg
§112
7.9%
-32.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 766 resolved cases

Office Action

§102 §103
DETAILED ACTION This action is in response to the amendment 01/27/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Objections Claim(s) 3 is/are objected to because of the following informalities: Claim(s) 3 recite(s) “122” at the end of the claim. Appropriate correction is required. Response to Arguments Applicant's arguments filed 02/04/2026 have been fully considered but they are not persuasive. Applicant(s) argue(s) with respect to claims 1 and 5 in pages 10 - 11: “Somani's "negative node 118" is merely a negative node, but is not obtained by inverting and is not an inverting input voltage. …Somani's 116/118 is not an inverted voltage, and Somani's 108/109 is an inverted output rather than inverted input. As such, Somani fails to disclose any terminal that constantly carries an inverted input voltage, and necessarily cannot disclose at least the above-referenced limitations” In response, Somani discloses that negative node 118 is -Vin or ground, e.g. paragraph 020 recites “A second line (or ground) 116 runs from a negative node 118 (or ground) of the voltage source input 102 to a second node 120 (or ground) of the first voltage output 108”. Somani explicitly discloses that the node 118 is a negative node corresponding to -Vin line. A voltage measurement at the voltage at node 118, inverting the measuring device across the input (-/+) voltage source (104), is equal to the inverted input voltage (-Vin). Node 118 does constantly carry an inverted input voltage -Vin, as stated above in Somani’s paragraph 020. The rejection is maintained. Claim Rejections – 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by US Pub. No. 2021/0391794; (hereinafter Somani). Regarding claim 1, Somani [e.g. Fig. 1] discloses a buck-boost converter comprising: a first switch [e.g. S1] connected between an input terminal [e.g. 112] to which an input voltage [e.g. +Vin] is input and a first terminal of an inductor [e.g. L+]; a second switch [e.g. S7] connected between the first terminal of the inductor and an output terminal [e.g. 108] that outputs an output voltage [e.g. VOUT1_POS or VOUT1_NEG]; a third switch [e.g. S3] connected between a second terminal of the inductor [e.g. L-] and a ground terminal [e.g. 118], wherein the third switch receives a voltage substantially equal to the voltage at the ground terminal [e.g. paragraph 020 recites “a second line (or ground) 116 runs from a negative node 118 (or ground) of the voltage source input 102 to a second node 120 (or ground) of the first voltage output 108”]; and a fourth switch [e.g. S6] connected between the second terminal of the inductor and an inverting input terminal [e.g. 116/118] to which an inverted input voltage [e.g. -Vin] obtained by inverting the input voltage is input [e.g. paragraph 020 recites “The second node 126 of the second voltage output 109 also connects to the second line 116 due to common ground”]; wherein the output voltage is generated according to the input voltage, the inverted input voltage, and status of the first switch, the second switch, the third switch, and the fourth switch [e.g. the output voltage at 108 depends on the input voltage Vin, -Vin at line 116/118 and operation of each of the switches S1, S3, S6, S7]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Somani in view of US Patent No. 9,595,871; (hereinafter Bayer) Regarding claim 5, Somani [e.g. Fig. 1] discloses a buck-boost converter comprising: a first switch [e.g. S1] connected between an input terminal [e.g. 112] to which an input voltage [e.g. +Vin] is input and a first terminal of an inductor [e.g. L+]; a second switch [e.g. S7] connected between the first terminal of the inductor and an output terminal [e.g. 108] that outputs an output voltage [e.g. VOUT1_POS or VOUT1_NEG]; a third switch [e.g. S3] connected between a second terminal of the inductor [e.g. L-] and a ground terminal [e.g. 118], wherein the third switch receives a voltage substantially equal to the voltage at the ground terminal [e.g. paragraph 020 recites “a second line (or ground) 116 runs from a negative node 118 (or ground) of the voltage source input 102 to a second node 120 (or ground) of the first voltage output 108”]; a fourth switch [e.g. S6] connected between the second terminal of the inductor and an inverting input terminal [e.g. 116/118] to which an inverted input voltage [e.g. -Vin] obtained by inverting the input voltage is input [e.g. paragraph 020 recites “The second node 126 of the second voltage output 109 also connects to the second line 116 due to common ground”]; wherein the output voltage is generated according to the input voltage, the inverted input voltage, and status of the first switch, the second switch, the third switch, and the fourth switch [e.g. the output voltage at 108 depends on the input voltage Vin, -Vin at line 116/118 and operation of each of the switches S1, S3, S6, S7]. Somani fails to disclose a controller configured to control a rising slope and a falling slope of an inductor current by adjusting operating timings of the third switch and the fourth switch according to a comparison result of the input voltage and an absolute value of the output voltage. Bayer [e.g. Figs. 2 - 3] teaches a controller configured to control a rising slope and a falling slope of an inductor current [e.g. Fig. 3; IL] by adjusting operating timings of the third switch [e.g. Figs. 2-3; S3] and the fourth switch [e.g. Figs. 2-3; S4] according to a comparison result of the input voltage and an absolute value of the output voltage [e.g. col. 6, lines 2 – 6 recite “the control circuit 120 compares an absolute value of the FBC output voltage signal with the input voltage signal via FBA to determine whether the output voltage amplitude (|VO|) exceeds the input voltage signal VI”; col. 6, line 21 – 42 recite “The control circuit 120 operates in the first mode OP-MODE-1 when |VO| is less than VTH (e.g., less than VI) to turn off the switches S3 and S4 of the second converter stage 102, and provides pulse width modulated switching control signals SC1 and SC2 on lines 121 and 122 to the switches S1 and S2 in alternating fashion to regulate the output voltage signal VO according to a setpoint signal SP. In the second mode OP-MODE-2 when |VO| is greater than the threshold VTH (e.g., greater than VI) the control circuit 120 turns off the second switch S2 (e.g., sets SC2 low) and provides pulse width modulated switching control signals SC1, SC3 and SC4 to switches S1, S3 and S4 to regulate VO according to the setpoint signal SP. In the illustrated example, moreover, the control circuit 120 operates in the second mode OP-MODE-2 to provide the switching control signals to S1, S3 and S4 in alternating first and second states. In the first state of the second mode OP-MODE-2, the control circuit 120 turns off S2 and S4, and turns on S1 and S3 to charge the capacitor CF. In the second state of the second mode OP-MODE-2, the control circuit 120 turns off S1-S3 and turns S4 on in order to couple CF in series with the inductor L between GND and VO”]. It would have been obvious to one having ordinary skill in the art before the effective filing date to modify Somani by a controller configured to control a rising slope and a falling slope of an inductor current by adjusting operating timings of the third switch and the fourth switch according to a comparison result of the input voltage and an absolute value of the output voltage as taught by Bayer in order of being able to reduce inductor losses and converter switching losses. Examiner's Note Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Allowable Subject Matter Claims 11 – 14 are allowed. Claims 2 – 4 and 6 – 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the indication of the allowability of claim 2 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein during a first time, an inductor current in the inductor gradually rises, when the first switch and the third switch are turned on, the second switch and the fourth switch are turned off, a voltage of the first terminal of the inductor rises to the input voltage, and a voltage of the second terminal of the inductor is maintained at a ground level, and during a second time following the first time, the inductor current gradually falls, when the second switch and the fourth switch are turned on, the first switch and the third switch are turned off, the voltage of the first terminal of the inductor falls to the output voltage, and the voltage of the second terminal of the inductor falls to the inverted input voltage”. The primary reason for the indication of the allowability of claim 6 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the controller comprises: a comparator configured to output a comparison result signal of the input voltage and an absolute value of the output voltage, an OR operation device configured to output a value, obtained by performing an OR operation of a control signal of the first switch and the comparison result signal, as a control signal of the third switch, and an AND operation device configured to output a value, obtained by performing an AND operation of a control signal of the second switch and an inverted comparison result signal obtained by inverting the comparison result signal, as a control signal of the fourth switch”. The primary reason for the indication of the allowability of claim 9 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein when the input voltage is greater than the absolute value of the output voltage, during a third time, the inductor current gradually rises, when the controller turns on the first switch and the third switch and turns off the second switch and the fourth switch, a voltage of the first terminal of the inductor rises to the input voltage, and a voltage of the second terminal of the inductor is maintained at a ground level, and during a fourth time following the third time, the inductor current gradually falls, when the controller turns on the second switch and the third switch and turns off the first switch and the fourth switch, the voltage of the first terminal of the inductor falls to the output voltage, and the voltage of the second terminal of the inductor is maintained at a ground level”. The primary reason for the indication of the allowability of claim 10 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein when the input voltage is less than the absolute value of the output voltage, during a fifth time, the inductor current gradually rises, when the controller turns on the first switch and the third switch and turns off the second switch and the fourth switch, a voltage of the first terminal of the inductor rises to the input voltage, and a voltage of the second terminal of the inductor rises to a ground level, and during a sixth time following the fifth time, the inductor current gradually falls, when the controller turns on the second switch and the fourth switch and turns off the first switch and the third switch, the voltage of the first terminal of the inductor falls to the output voltage, and the voltage of the second terminal of the inductor falls to the inverted input voltage”. The primary reason for the indication of the allowability of claim 11 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “a buck-boost converter comprising: a first switch connected between an input terminal that receives an input voltage and a first terminal of an inductor; a second switch connected between the first terminal of the inductor and an output terminal that outputs an output voltage; a third switch and a fourth switch connected in series between the input terminal and a ground terminal; a charge pump capacitor connected between a third terminal, which is positioned between the third switch and the fourth switch, and a second terminal of the inductor; a charge pump switch connected between the second terminal of the inductor and a ground terminal; and a controller configured to control a rising slope and a falling slope of an inductor current by adjusting operating timings of the third switch, the fourth switch, and the charge pump capacitor according to a comparison result of the input voltage and an absolute value of the output voltage”. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alex Torres-Rivera whose telephone number is (571)272-5261. The examiner can normally be reached M-F 9:00-5:30 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838
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Prosecution Timeline

Show 7 earlier events
Oct 27, 2025
Non-Final Rejection mailed — §102, §103
Jan 27, 2026
Response Filed
Feb 12, 2026
Final Rejection mailed — §102, §103
Mar 10, 2026
Interview Requested
Mar 17, 2026
Examiner Interview Summary
Mar 17, 2026
Applicant Interview (Telephonic)
Apr 13, 2026
Response after Non-Final Action
May 12, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
86%
Grant Probability
98%
With Interview (+11.8%)
2y 1m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 766 resolved cases by this examiner. Grant probability derived from career allowance rate.

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