DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims1-10, 12, and 19-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yoo et al. (US 8,547,177).
Regarding claim 1, Yoo et al. (Figs. 1, 5, and 6) discloses a capacitive digital-to-analog converter (CDAC) (500 of Fig. 5 which converts a digital input signal Bin(A) to analog output signal at terminal 516) comprising:
a plurality of circuits (502) configured to receive a digital signal (Bin(A)) to be converted into an analog signal (via binary-to-thermometer converter 522B), wherein each circuit (502A) of the plurality of circuits comprises:
a variable capacitive element (“Each storage element 106 may take various forms. In one example, each storage element 106 may be a capacitor, such as a CMOS capacitor. Other examples are possible as well”; 106 of Fig. 1 or 506 of Fig. 5 or 606 of Fig. 6; col. 5, lines 53-56; and col. 8, lines 1-14); and
a driver (508 and 510) configured to cause the variable capacitive element (506) to be charged or discharged to convert the digital signal into the analog signal (col. 9, lines 7-33).
Regarding claim 2, Yoo et al. (Figs. 1, 5, and 6) discloses the CDAC of claim 1, wherein each circuit further comprises a logic component (522A-B; col. 8, lines 10-25) configured to provide received digital signal to a signal path (path 514[Wingdings font/0xE0]506) coupled to the driver based on a received control signal.
Regarding claim 3, Yoo et al. (Figs. 1, 5, and 6) discloses the CDAC of claim 1, wherein the CDAC comprises an output terminal (516) coupled to the variable capacitive element (106/506/606) of each circuit (502A), wherein the variable capacitive element is a voltage-variable capacitive element (i.e., CMOS capacitor).
Regarding claim 4, Yoo et al. (Figs. 1, 5, and 6) discloses the CDAC of claim 3, wherein a capacitance of the voltage-variable capacitive elements is controlled by a voltage applied to the output terminal (col. 9, lines 7-33).
Regarding claim 5, Yoo et al. (Figs. 1, 5, and 6) discloses the CDAC of claim 4, wherein the driver comprises an inverter, wherein the inverter is configured to provide an inverted digital signal varying between an upper voltage level and a lower voltage level, wherein the voltage applied to the output terminal is at the upper voltage level.
Regarding claim 6, Yoo et al. (Figs. 1, 5, and 6) discloses the CDAC of claim 4, wherein the driver comprises an inverter (610A), wherein the inverter is configured to provide an inverted digital signal varying between an upper voltage level and a lower voltage level, wherein the voltage applied to the output terminal is at the lower voltage level (col. 8, lines 66-67).
Regarding claim 7, Yoo et al. (Figs. 1, 5, and 6) discloses the CDAC of claim 3, wherein the voltage-variable capacitive element (106/506/606) comprises a metal oxide semiconductor (MOS) varactor (“Each storage element 106 may take various forms. In one example, each storage element 106 may be a capacitor, such as a CMOS capacitor. Other examples are possible as well”; 106 of Fig. 1 or 506 of Fig. 5 or 606 of Fig. 6; col. 5, lines 53-56; and col. 8, lines 1-14).
Regarding claim 8, Yoo et al. (Figs. 1, 5, and 6) discloses an apparatus of a digital communication circuit (100), the apparatus comprising:
a controller (122 of Fig. 1 or 522A-B of Fig. 5); and a capacitive digital-to-analog converter (CDAC) (500 of Fig. 5 which converts a digital input signal Bin(A) to analog output signal at terminal 516) comprising:
a plurality of circuits (502) configured to receive a digital signal (Bin(A)) to be converted into an analog signal (via binary-to-thermometer converter 522B), wherein each circuit (502A) of the plurality of circuits comprises:
a variable capacitive element (“Each storage element 106 may take various forms. In one example, each storage element 106 may be a capacitor, such as a CMOS capacitor. Other examples are possible as well”; 106 of Fig. 1 or 506 of Fig. 5 or 606 of Fig. 6; col. 5, lines 53-56; and col. 8, lines 1-14); and
a driver (508 and 510) configured to cause the variable capacitive element (506) to be charged or discharged to convert the digital signal into the analog signal (col. 9, lines 7-33).
wherein the controller is configured activate or deactivate each circuit of the plurality of circuits (col. 8, lines 15-29).
Regarding claim 9, Yoo et al. (Figs. 1, 5, and 6) discloses the apparatus of claim 8, wherein the controller is configured to activate or deactivate each circuit of the plurality of circuits based on amplitude control information (col. 8, lines 15-43).
Regarding claim 10, Yoo et al. (Figs. 1, 5, and 6) discloses the apparatus of claim 8, further comprising: a digital front end (522A) configured to provide the amplitude control information based on baseband signals (col. 8, lines 15-29).
Regarding claim 12, Yoo et al. (Figs. 1, 5, and 6) discloses the apparatus of claim 8, wherein the variable capacitive element is a voltage-variable capacitive element (i.e., CMOS capacitor 506), wherein the voltage-variable capacitive elements of the plurality of circuits (502) are coupled to an output terminal (516), wherein the apparatus further comprises a transformer-based matching network (518) comprising a transformer with a primary winding (Lp) coupled to the output terminal (col. 8, lines 8-9).
Regarding claim 19, Yoo et al. (Figs. 1, 5, and 6) discloses the apparatus of claim 8, further comprising an antenna port (120 of Fig. 1) configured to receive output signals of the CDAC (100 or 500).
Regarding claim 20, Yoo et al. (Figs. 1, 5, and 6) discloses the apparatus of claim 8, wherein the apparatus is a digital polar transmitter (Fig. 1; col. 6, lines 4-14).
Allowable Subject Matter
Claims 11 and 13-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 11, Yoo et al. is not seen to disclose all limitations of claim 11.
Regarding claims 13-18, Yoo et al. is not seen to disclose all limitations defined by claims 13-18.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAI M NGUYEN whose telephone number is (571)272-1809. The examiner can normally be reached Mon-Fri: 8:00 am - 4:30pm.
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/KHAI M NGUYEN/Primary Examiner, Art Unit 2845
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