Prosecution Insights
Last updated: April 19, 2026
Application No. 18/345,400

PATCH ANTENNAS IN PACKAGES

Non-Final OA §103
Filed
Jun 30, 2023
Examiner
PHAN, STEVE QUOC
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant

Examiner Intelligence

Grants only 0% of cases
0%
Career Allow Rate
0 granted / 0 resolved
-68.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
13 currently pending
Career history
13
Total Applications
across all art units

Statute-Specific Performance

§103
88.9%
+48.9% vs TC avg
§102
7.4%
-32.6% vs TC avg
§112
3.7%
-36.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 20220320020 A1) in view of Tseng et al. (US 20200227365 A1) and Chiang et al. (US 20180269139 A1). Regarding claim 1, Hsu et al. discloses a semiconductor package, comprising a conductive layer (210) positioned above the semiconductor substrate (202) (Fig 8); a patch antenna (200) coupled to the conductive layer (210) and to the device side of the semiconductor substrate (202) (paragraph 38, Fig. 8); and a mold compound (202) covering the patch antenna (200), the mold compound having a relative permittivity ranging from 3.4 to 3.5 (paragraph 38). However, Hsu et al. do not disclose a semiconductor substrate including a device side having circuitry formed therein. On the other hand, Tseng et al. disclose a semiconductor substrate (11) may include a chip having circuitry formed therein (paragraph 35). Neither Hsu et al. nor Tseng et al. disclose a mold compound having a loss tangent ranging from 0.0025 to 0.013. On the other hand, Chiang et al. disclose a mold compound (130) may have a loss tangent less than 0.01 (paragraph 18). Chiang et al. is within the range. "[A]nticipation under § 102 can be found only when the reference discloses exactly what is claimed and that where there are differences between the reference disclosure and the claim, the rejection must be based on § 103 which takes differences into account." Titanium Metals Corp. v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu et al. according to the teachings of Tseng et al. and Chiang et al. so that the chip contains circuitry formed therein and the mold compound has a loss tangent in the range of 0.0025 and 0.013. Doing so would enable complex logic data processing for the chip and minimize signal attenuation of the antenna, respectively. Regarding claim 2, Hsu et al. disclose the mold compound has a relative permittivity of approximately 3.4 (paragraph 38) but does not disclose a loss tangent of approximately 0.0025. However, Chiang et al. disclose a mold compound has a low loss tangent of below 0.01 (paragraph 18). “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu et al. according to the teaching of Chiang et al. such that the loss tangent is approximately 0.0025. Doing so would improve antenna efficiency and affect the gain. Regarding claim 5, Hsu et al. disclose the mold compound has a relative permittivity of approximately 3.5 but does not disclose a loss tangent of approximately 0.013. However, Chiang et al. disclose a mold compound has a low loss tangent of below 0.01 (paragraph 18). “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu et al. according to the teaching of Chiang et al. such that the loss tangent is approximately 0.013. Doing so would improve antenna efficiency and affect the gain. Claim(s) 3-4, 6-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 20220320020 A1), in view of Tseng et al. (US 20200227365 A1) and Chiang et al. (US 20180269139 A1) as applied to claim 2 and 5 above, and further in view of Ohuchi (US 6181003 B1) and Primeaux (US 5331205 A). Regarding claim 3, none of the prior references disclose the mold compound has a vertical thickness ranging from 0.13 mm to 0.25 mm. However, Primeaux discloses an encapsulating compound has a thickness in a range of 0.1mm to 1.5mm (see claim 4 of Primeaux). Ohuchi also discloses the thickness of the mold in the vertical direction is 0.3 to 0.4mm (paragraph 5). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Ohuchi and Primeaux so that the mold compound has a vertical thickness ranging from 0.13 mm to 0.25mm. Doing so would control electromagnetic fields, optimizing bandwidth, efficiency, and radiation patterns. Regarding claim 4, none of the prior references disclose the mold compound has a vertical thickness ranging from 0.4 mm to 0.53 mm. However, Primeaux discloses an encapsulating compound has a thickness in a range of 0.1mm to 1.5mm (see claim 4 of Primeaux). Ohuchi also discloses the thickness of the mold in the vertical direction is 0.3 to 0.4mm (paragraph 5). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Ohuchi and Primeaux so that the mold compound has a vertical thickness ranging from 0.4 mm to 0.54 mm. Doing so would control electromagnetic fields, optimizing bandwidth, efficiency, and radiation patterns. Regarding claim 6, none of the prior references disclose the mold compound has a vertical thickness ranging from 0 mm to 0.16 mm. However, Primeaux discloses an encapsulating compound has a thickness in a range of 0.1mm to 1.5mm (see claim 4 of Primeaux). Ohuchi also discloses the thickness of the mold in the vertical direction is 0.3 to 0.4mm (paragraph 5). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Ohuchi and Primeaux so that the mold compound has a vertical thickness ranging from 0 mm to 0.16 mm. Doing so would control electromagnetic fields, optimizing bandwidth, efficiency, and radiation patterns. Regarding claim 7, none of the prior references disclose the mold compound has a vertical thickness ranging from 0.16 mm to 0.3 mm. However, Primeaux discloses an encapsulating compound has a thickness in a range of 0.1mm to 1.5mm (see claim 4 of Primeaux). Ohuchi also discloses the thickness of the mold in the vertical direction is 0.3 to 0.4mm (paragraph 5). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Ohuchi and Primeaux so that the mold compound has a vertical thickness ranging from 0.16 mm to 0.3 mm. Doing so would control electromagnetic fields, optimizing bandwidth, efficiency, and radiation patterns. Regarding claim 8, none of the prior references disclose the mold compound has a vertical thickness ranging from 0.425 mm to 0.56 mm. However, Primeaux discloses an encapsulating compound has a thickness in a range of 0.1mm to 1.5mm (see claim 4 of Primeaux). Ohuchi also discloses the thickness of the mold in the vertical direction is 0.3 to 0.4mm (paragraph 5). ““[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Ohuchi and Primeaux so that the mold compound has a vertical thickness ranging 0.425 mm to 0.56 mm. Doing so would control electromagnetic fields, optimizing bandwidth, efficiency, and radiation patterns. Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 20220320020 A1), Tseng et al. (US 20200227365 A1) and Chiang et al. (US 20180269139 A1) as applied to claim 1 above, and further in view of Edwards et al. (US 20190312347 A1). Regarding claim 9, none of the prior references disclose the mold compound has a vertical thickness of one-quarter of a wavelength of a signal that the patch antenna is configured to radiate. However, Edwards et al. disclose a thickness (144) of dielectric cover layer (130) may be selected to be between 0.15 and 0.25 times the effective wavelength of operation of phased antenna array (60) (paragraph 104). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Edwards et al. such that the thickness of the mold compound is approximately a quarter of a wavelength of a signal emitted by the patch antenna. Doing so would allow for effective impedance. Claim(s) 10-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 20220320020 A1) in view of Tseng et al. (US 20200227365 A1), Bakshi et al. (H. S. Bakshi et al., "Low-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna," in IEEE Antennas and Wireless Propagation Letters, vol. 18, no. 11, pp. 2444-2448, Nov. 2019, doi: 10.1109/LAWP.2019.294337), Yoko et al (JP 2006229871A), and Edwards et al. (US 20190312347 A1). Regarding claim 10, Hsu et al. disclose a semiconductor package, comprising: and a mold compound (202) covering the patch antenna (200), the mold compound having a relative permittivity ranging from 3.4 to 3.5 (paragraph 38). However, Hsu et al. do not disclose a semiconductor substrate including a device side having circuitry formed therein. On the other hand, Tseng et al. disclose a semiconductor substrate (11) may include a chip having circuitry formed therein (paragraph 35). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu et al. according to the teachings of Tseng et al. so that the semiconductor chip includes circuity formed therein. Doing so would allow for miniaturization of the device and improve functionality. None of the above references disclose multiple conductive layers positioned above the semiconductor substrate, each of the multiple conductive layers coupled to another one of the multiple conductive layers by a different via, the multiple conductive layers including a top conductive layer positioned farthest from the semiconductor substrate. However, Bakshi et al. disclose first six metal layers, M1-M6, above the substrate, each of the conductive layers are coupled to another one of the multiple conductive layers by a different via (page 2444-2445, Fig. 1b), including a top conductive layer positioned farthest away from the semiconductor substrate (page 2444, Fig. 1b) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Bakshi et al. such that the metal-via stack is above the semiconductor substrate. Doing so would enable efficient radiation and improve gain. None of the references above disclose a ground member in a cavity of the top conductive layer, the ground member coupled to a ground connection in the circuitry by way of the vias, and a patch antenna in the cavity. However, Yoko et al. disclose a ground member (16) in a cavity (15) coupled to ground connection (62) by way of via (64) (Fig. 5b). Yoko et al. also discloses a patch antenna (23) in the cavity (12) (paragraph 11, Fig 1b). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Yoko et al. such that the patch antenna is in a cavity, and the ground member in the cavity of the top conductive layer is connected to the ground member by way of vias. Doing so would widen bandwidth, and increase gain and efficiency. None of the prior references disclose a thickness from the patch antenna to a top surface of the mold compound that is approximately one-fourth of a wavelength of a wireless signal to be emitted by the patch antenna. However, Edwards et al. disclose a thickness (144) of dielectric cover layer (130) may be selected to be between 0.15 and 0.25 times the effective wavelength of operation of phased antenna array (60) (paragraph 104). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Edwards et al. such that the thickness of the mold compound is approximately a quarter of a wavelength of a signal emitted by the patch antenna. Doing so would allow for effective impedance. Regarding claim 11, Hsu, Tseng, Bakshi, and Edwards do not disclose a ground member is included in a floor of the cavity. However, Yoko et al. disclose a ground member (16) in a cavity (15) (Fig. 5b). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the above references according to the teachings of Yoko et al. such that the ground member is included in the floor of the cavity. Doing so would widen bandwidth, and increase gain and efficiency. Regarding claim 12, Hsu, Tseng, Bakshi, and Edwards do not disclose the ground member covers multiple walls of the cavity. However, Yoko et al. disclose a cavity (15) and the surface of the second semiconductor substrate (14) including the bottom surface of the cavity (15) is covered with a ground (conductor) 16 (paragraph 11, Fig. 1a, 1b) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the above references. according to the teachings of Yoko et al. such that the ground member is included in the floor of the cavity. Doing so would widen bandwidth, and increase gain and efficiency. Regarding claim 13, none of the above references disclose the mold compound has a relative permittivity of approximately 3.4. However, Edwards et al. disclose a dielectric cover layer (130) may have a dielectric constant (relative permittivity) between 3.0 and 10.0 (paragraph 104). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Edwards et al. such that the mold compound has a relative permittivity of approximately 3.4. Doing so would enable faster signal speeds and minimize signal loss. Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 20220320020 A1), Tseng et al. (US 20200227365 A1), Bakshi et al. (H. S. Bakshi et al., "Low-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna," in IEEE Antennas and Wireless Propagation Letters, vol. 18, no. 11, pp. 2444-2448, Nov. 2019, doi: 10.1109/LAWP.2019.294337), Yoko et al (JP 2006229871A), and Edwards et al. (US 20190312347 A1) as applied to claim 10 above, and further in view of Chiang et al. (US 20180269139 A1). Regarding claim 14, none of the prior references disclose the mold compound has a loss tangent of approximately 0.0025 On the other hand, Chiang et al. disclose a mold compound (130) may have a loss tangent less than 0.01 (paragraph 28). ““[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Chiang et al. such that the loss tangent is approximately 0.0025. Doing so would enable better signal integrity and higher frequencies. Claim(s) 15-16, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 20220320020 A1) in view of Tseng et al. (US 20200227365 A1), Bakshi et al. (H. S. Bakshi et al., "Low-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna," in IEEE Antennas and Wireless Propagation Letters, vol. 18, no. 11, pp. 2444-2448, Nov. 2019, doi: 10.1109/LAWP.2019.294337), Yoko et al (JP 2006229871A), Edwards et al. (US 20190312347 A1), and Chiang et al. (US 20180269139 A1). Regarding claim 15, Hsu et al. disclose a semiconductor package, comprising: and a mold compound (202) covering the patch antenna (200), the mold compound having a relative permittivity ranging from 3.4 to 3.5 (paragraph 38). However, Hsu et al. do not disclose a semiconductor substrate including a device side having circuitry formed therein. On the other hand, Tseng et al. disclose a semiconductor substrate (11) may include a chip having circuitry formed therein (paragraph 35). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu et al. according to the teachings of Tseng et al. so that the semiconductor chip includes circuity formed therein. Doing so would allow for miniaturization of the device and improve functionality. None of the above references disclose multiple conductive layers positioned above the semiconductor substrate, each of the multiple conductive layers coupled to another one of the multiple conductive layers by a different via, the multiple conductive layers including a top conductive layer positioned farthest from the semiconductor substrate. However, Bakshi et al. disclose first six metal layers, M1-M6, above the substrate, each of the conductive layers are coupled to another one of the multiple conductive layers by a different via (page 2444-2445, Fig. 1b), including a top conductive layer positioned farthest away from the semiconductor substrate (page 2444, Fig. 1b) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Bakshi et al. such that the metal-via stack is above the semiconductor substrate. Doing so would enable efficient radiation and improve gain. None of the references above disclose a ground member in a cavity of the top conductive layer, the ground member coupled to a ground connection in the circuitry by way of the vias, the ground member included in a floor of the cavity and a wall of the cavity, and a patch antenna in the cavity. However, Yoko et al. disclose a ground member (16) in a cavity (15) coupled to ground connection (62) by way of via (64) (Fig. 5b), a ground member (16) in a cavity (15) (Fig. 5b), a cavity (15) and the surface of the second semiconductor substrate (14) including the bottom surface of the cavity (15) is covered with a ground (conductor) 16 (paragraph 11, Fig. 1a, 1b). Yoko et al. also discloses a patch antenna (23) in the cavity (12) (paragraph 11, Fig 1b). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Yoko et al. such that the patch antenna is in a cavity, and the ground member in the cavity of the top conductive layer is connected to the ground member by way of vias. Doing so would widen bandwidth, and increase gain and efficiency. None of the above references disclose a mold compound having a loss tangent ranging from 0.0025 to 0.013. On the other hand, Chiang et al. disclose a mold compound (130) may have a loss tangent less than 0.01 (paragraph 28). “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu et al. according to the teachings of Chiang et al. so that the mold compound has a loss tangent in the range of 0.0025 and 0.013. Doing so would enable better signal integrity and higher frequencies. Regarding claim 16, Hsu, Tseng, Bakshi, and Edwards do not disclose the ground member covers all walls of the cavity However, Yoko et al. disclose a cavity (15) and the surface of the second semiconductor substrate (14) including the bottom surface of the cavity (15) is covered with a ground (conductor) 16 (paragraph 11, Fig. 1a, 1b) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the above references. according to the teachings of Yoko et al. such that the ground member is included in the floor of the cavity. Doing so would widen bandwidth, and increase gain and efficiency. Regarding claim 17, Hsu et al. does not disclose a distance between an edge of the patch antenna and a closest wall of the cavity is between 20 and 30 microns. However, Bakshi et al. disclose the separation between the wall and patch is 25 μm (page 2445). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Bakshi et al. such that the distance between an edge of the patch antenna and a closest wall of the cavity is between 20 and 30 microns. Doing so would control the resonant frequency, impedance matching, and radiation pattern. Regarding claim 18, Hsu discloses the mold compound has a relative permittivity of approximately 3.4 (paragraph 38), but does not disclose a loss tangent of approximately 0.0025. However, Chiang et al. disclose a mold compound (130) may have a loss tangent less than 0.01 (paragraph 28). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu et al. according to the teachings of Chiang et al. so that the mold compound has a loss tangent of approximately 0.0025. Doing so would enable better signal integrity and higher frequencies. Regarding claim 20, Hsu discloses the mold compound has a relative permittivity of approximately 3.5 (paragraph 38), but does not disclose a loss tangent of approximately 0.013. However, Chiang et al. disclose a mold compound (130) may have a loss tangent less than 0.01 (paragraph 28). “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Hsu et al. according to the teachings of Chiang et al. so that the mold compound has a loss tangent of approximately 0.013. Doing so would enable better signal integrity and higher frequencies. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 20220320020 A1) in view of Tseng et al. (US 20200227365 A1), Bakshi et al. (H. S. Bakshi et al., "Low-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna," in IEEE Antennas and Wireless Propagation Letters, vol. 18, no. 11, pp. 2444-2448, Nov. 2019, doi: 10.1109/LAWP.2019.294337), Yoko et al (JP 2006229871A), Edwards et al. (US 20190312347 A1), and Chiang et al. (US 20180269139 A1) as applied to claim 15 and 18 above, and further in view of Ohuchi (US 6181003 B1) and Primeaux (US 5331205 A). Regarding claim 19, none of the prior references disclose the mold compound has a vertical thickness ranging from 0.13 mm to 0.25 mm. However, Primeaux discloses an encapsulating compound has a thickness in a range of 0.1mm to 1.5mm (see claim 4 of Primeaux). Ohuchi also discloses the thickness of the mold in the vertical direction is 0.3 to 0.4mm (paragraph 5). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to the teachings of Ohuchi and Primeaux so that the mold compound has a vertical thickness ranging from 0.13 mm to 0.25mm. Doing so would control electromagnetic fields, optimizing bandwidth, efficiency, and radiation patterns. Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVE Q PHAN whose telephone number is (571)272-1227. The examiner can normally be reached Monday - Friday 8am - 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at (571) 272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /STEVE PHAN/Examiner, Art Unit 2817 /MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817
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Prosecution Timeline

Jun 30, 2023
Application Filed
Jan 15, 2026
Non-Final Rejection — §103 (current)

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