Prosecution Insights
Last updated: August 17, 2026
Application No. 18/345,695

COMPLIANT INSERTS FOR PIN DIPPING PROCESSES

Non-Final OA §102§112§Other
Filed
Jun 30, 2023
Examiner
SAAD, ERIN BARRY
Art Unit
Tech Center
Assignee
Intel Corporation
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
920 granted / 1274 resolved
+12.2% vs TC avg
Moderate +12% lift
Without
With
+11.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
42 currently pending
Career history
1316
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
45.7%
+5.7% vs TC avg
§102
19.6%
-20.4% vs TC avg
§112
27.3%
-12.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1274 resolved cases

Office Action

§102 §112 §Other
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 17-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 17 recites the limitation “including means for" in line 1. There is insufficient antecedent basis for this limitation in the claim. There is no previous mention of means for interfacing. The claim should read “a means”. Claim limitation “means for retaining the adjusting means in a compressed state” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. The current specification does not state what the structure is for retaining the adjusting means in a compressed state. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Applicant may: (a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph; (b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)). If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either: (a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 7-9, 14, 16-19, 21-22 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Silbert et al. (2013/0017128A1). Regarding claim 1, Silbert discloses an apparatus comprising: a pin array 68 (below the collar 144 that extends outside of 139) to transfer material to a package substrate of an integrated circuit package; and a cover plate 140; and an elastic insert 152 to be disposed between the cover plate and the pin array (below the collar 144) (figures 6, 6A, 17-19). Regarding claim 2, Silbert discloses that the cover plate 140 includes a through hole (where in the top of the pin extends) (figure 6, 17-19). Regarding claim 3, Silbert discloses an interface plate 300 disposed between the elastic insert and the pin array (figures 18-19). Regarding claim 4, Silbert discloses that the interface plate includes a through hole (where pins extend through) (figures 18-19). Regarding claim 7, Silbert discloses wherein the interface plate 300 is to abut a first side of the elastic insert (contacts the collar 144 of the spring 152) and the cover plate 140 to abut a second side of the elastic insert (shown in figures 17, 19), the second side opposite the first side (figures 6, 6A, 17-19). Regarding claim 8, Silbert discloses that the elastic insert 152 has an unloaded thickness greater than a distance between the interface plate 300 and the cover plate 140 (figures 6, 6A, 17-19). Regarding claim 9, Silbert discloses a frame 136 defining a plurality of cells (a small grouping of the pin array can be considered a cell) including a first cell, and wherein the pin array, compliant insert, and the interface plate are disposed within the first cell (figures 6, 6A, 17-19). Regarding claim 14, Silbert discloses wherein (1) the pin array includes first pins and second pins (any pins can be considered first and second pins) and (2) the elastic insert is configured to elastically compress into a loaded profile to enable the first pins to abut an elevated region of the package substrate and the second pins to abut a depressed region of the package substrate (shown in figures 17-19 the pins can be extended at different distances). The substrate is material worked upon and does not further limit the apparatus. Silbert is capable of performing the claimed function. Regarding claim 16, Silbert discloses an apparatus comprising: means for transferring flux to a pad of an integrated circuit package (pins) 68; and means for adjusting a profile of the means for transferring flux (elastic insert) 152 (figures 6, 6A, Regarding claim 17, Silbert discloses a means for interfacing the transferring means with the adjusting means (plate 300), the interfacing means disposed between the transferring means and the adjusting means (figures 18-19). Regarding claim 18, Silbert discloses a means for retaining the adjusting means in a compressed state (top plate140) (figures 6, 6A, 17-19). Regarding claim 19, Silbert discloses a means for dividing a first section from a second section, the transferring means and the adjusting means to be disposed within the first section (frame 136) (figures 6, 6A, 17-19). Regarding claim 21, Silbert discloses an apparatus comprising: an array of pins 68, the pins having first ends and second ends opposite the first ends, the first ends of the pins to transfer flux to pads on an integrated circuit package; and a compliant insert 152 to be positioned adjacent the second ends of the pins (figures 6, 6A, 17-19). The flux and pads on a package are material worked upon and do not further limit the structure of the apparatus. Regarding claim 22, Silbert discloses a tooling rig 139 to support the pins (figure 6). Claim(s) 1, 13, 21-24 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Lee et al. (2023/0007787A). Regarding claim 1, Lee discloses an apparatus comprising: a pin array 120 to transfer material to a package substrate of an integrated circuit package; and a cover plate (top of 110); and an elastic insert 130 to be disposed between the cover plate and the pin array (figures 1A-1B). Regarding claim 13, Lee discloses further including a tooling rig (bottom of 110 where pins go through the holes), wherein the pin array includes a pin having a flange 121, the flange to abut an interior surface of the tooling rig (figure 1B). Regarding claim 21, Lee discloses an apparatus comprising: an array of pins 120, the pins having first ends and second ends opposite the first ends, the first ends of the pins to transfer flux to pads on an integrated circuit package; and a compliant insert 130 to be positioned adjacent the second ends of the pins (figures 1A-1B). The flux and pads on a package are material worked upon and do not further limit the structure of the apparatus. Regarding claim 22, Lee discloses a tooling rig to support the pins (bottom of 110) (figures 1A-1B). Regarding claim 23, Lee discloses that the second ends of the pins 120 abut the compliant insert 130 (figures 1A-1B). Regarding claim 24, Lee discloses an interface plate (bottom of 110) disposed between the complaint insert 130 and the array of pins (bottom of array of pins), the second ends of the pins abutting the compliant insert (figure 1B). Allowable Subject Matter Claims 10-11, 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Prior art was not found that taught or suggested wherein the interface plate is a first interface plate, the elastic insert is a first elastic insert, the pin array is a first pin array, and the apparatus further includes: a second pin array disposed in a second cell of the plurality of cells; a second interface plate disposed in the second cell; and a second compliant insert disposed in the second cell. Prior art was not found that taught or suggested wherein the dividing means includes means for guiding a cleaning fluid through the apparatus. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIN B SAAD whose telephone number is (571)270-3634. The examiner can normally be reached Monday-Thursday 7:30a-6p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Keith Walker can be reached at 571-272-3458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIN B SAAD/Primary Examiner, Art Unit 1735
Read full office action

Prosecution Timeline

Jun 30, 2023
Application Filed
Nov 20, 2023
Response after Non-Final Action
Jul 30, 2026
Non-Final Rejection mailed — §102, §112, §Other (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
72%
Grant Probability
84%
With Interview (+11.5%)
2y 6m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1274 resolved cases by this examiner. Grant probability derived from career allowance rate.

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