DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Elections/Restrictions
Applicant’s election of Group I and Species 1 (Claims 1-2, 5-8 and 13-15) in the reply filed on 06/02/2026 is acknowledged. However, since applicant did not distinctly indicate whether election is with or without traverse and did not point out any supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.03(a) and 818.03(c)).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-2, 5 and 13 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-2, 9 and 18 over US Patent No. 12,267,958 B2.
Although the claims at issue are not identical, they are not patentably distinct from each other because the claims 1-2, 5 and 13 of Application No. 18345745 are anticipated by claims 1-2, 9 and 18 of US Patent No. 12,267,958 B2.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Allowable Subject Matter
Claims 1-2, 5-8 and 13-15 are allowed
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 1, the references of the Prior Art of record and considered pertinent to the applicant's disclosure and to the examiner’s knowledge does not teach or render obvious, at least to the skilled artisan, the instant invention regarding: a glass substrate having a main body and a protrusion, the main body including a top surface, a bottom surface, and a first side surface connecting the bottom surface and the top surface to each other, the first side surface of the main body including the protrusion; a colored insulation layer on at least the first side surface of the main body; and a through-conductor within the main body and extending through the top surface and the bottom surface, as recited in claim 1, in combination with the remaining features of claim 1.
The most relevant prior art references are as follows:
(i) Ito (US 20130222101 A1) substantially teaches (see fig. 1) the coil component 10 according to the first embodiment includes an insulating substrate 11, a first spiral conductor 12 formed on one main surface (upper surface 11a) of the insulating substrate 11, a second spiral conductor 13 formed on the other main surface (back surface 11b) of the insulating substrate 11, insulating resin layers 14a and 14b covering the first and second spiral conductors 12 and 13, respectively, an upper core 15 covering an upper surface 11a side of the insulating substrate 11, a lower core 16 covering a back surface 11b side of the insulating substrate 11, and a pair of terminal electrodes 17a and 17b. The insulating substrate 11 serves as a base layer for forming the first and second spiral conductors 12 and 13. The insulating substrate 11 is formed into a rectangular shape and has, at a center portion thereof, a circular opening 11h. The insulating substrate 11 is preferably formed of a common printed board material obtained by impregnating a glass fiber cloth with an epoxy resin. For example, a BT base material, an FR4 base material, an FR5 base material, or the like may be used. In a case where the printed board material is used, the spiral conductor can be formed by plating, not by sputtering in so-called a thin film method, so that a thickness of the conductor can be made sufficiently large. In order to avoid an increase in floating capacitance, a dielectric constant of the insulating substrate 11 is preferably equal to or less than 7 (.mu..ltoreq.7). Although not especially limited, a dimension of the insulating substrate 11 can be set to, e.g., 2.5 mm.times.2.0 mm.times.0.3 mm. {See Para [0075-0076]}.
(ii) Ito (US 20150334823A1) Hu substantially teaches (see fig. 1v) a substrate component for packaging IC chips according to an embodiment of the present invention. Referring to FIG. 1A, a glass substrate 110, preferable a 20″×20″ inch square plate served as a core base of the package is provided. Alternative substrates can be comprised of ceramic, quartz, epoxy fiber-glass or polymer with fillers. The glass substrate 110 includes electrical connections 115 such as through-glass via interconnects through the glass substrate, connecting contact pads 132 and conductive traces formed on one or more surfaces of the glass substrate. The contact pads 132 configured to electrically connect the electrical connections 115 are formed on both sides of the glass substrate 110. The formation of through-glass interconnects and other metal components of a package in a single plating process stage can reduce costs per package. Through-glass via interconnects can be formed by machine drilling, laser, plasma etching, or similar methods. The glass substrate is preferably subdivided into an array of packaging areas with predetermined kerf lines 112 spreading therebetween. dry films 120a, 120b or photoresist layers are formed on both sides of the glass substrate. Subsequently, the dry films are patterned creating a grid of openings which exposes the kerf line regions. Trenches or recesses 125R are formed by etching and thinning the glass substrate, as shown in FIG. 1C. The shape of trenches or recesses 125R includes curved, stepped or wedged shapes (see para 0016-0017).
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. A list of pertinent prior art is attached in form 892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kazi Hossain whose telephone number is 571-272-8182. The examiner can normally be reached on Monday-Thursday from Monday to Thursday 8:00 AM to 4:30 PM (EST).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Shawki Ismail can be reached on 571-272-3985. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KAZI HOSSAIN/
Examiner, Art Unit 2837
/SHAWKI S ISMAIL/Supervisory Patent Examiner, Art Unit 2837
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