Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 3, 10 objected to because of the following informalities:
Claim 3 limitations appears similar to those in parent claim 1 due to amendment. Appropriate correction is required.
Claim 10 limitations appears similar to those in parent claim 9 due to amendment. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Narayan (US 20020084504 A1) in view of Chang et al. (US 20230366739 A1) hereafter referred to as Chang
In regard to claim 1 Narayan teaches a [see Fig. 1B “FIGS. 1A, B are schematic diagrams illustrating top-contacting and bottom-contacting configurations of a photoFET structure”] light sensing transistor, comprising:
a substrate [“insulating polymer layer 10” “insulator medium for the insulating layer 10 can be polymeric media such as PMMA or PVA, or conventional insulator media such as SiO.sub.2”];
a metal layer [16, 18 see “metal electrodes 14, 16, 18”], having a first metal structure [see Fig. 1B] and a second metal structure; and
a semiconductor layer [“semiconducting-photoconducting polymer layer 12”] disposed on the metal layer, wherein both of the first metal structure and the second metal structure are in direct contact [see Fig. 1B] with the semiconductor layer.
but does not teach “wherein the metal layer includes titanium or molybdenum” and “wherein the semiconductor layer includes silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiNxOy)”.
See Narayan paragraph 0038 “Gold electrodes, 3 mm wide with an inter-electrode spacing of 70 microns, forming the channel length, was deposited on the P3OT layer 12 to form the source electrode 18 and drain electrode 16”.
See Chang teaches absorbing infrared, see Fig. 1, see paragraph 0016-0018 “the absorber layer 22 may include silicon oxide, silicon nitride or silicon oxynitride, but the present disclosure is not limited thereto” “the first semiconductor layer 18 and the second semiconductor layer 24 may include silicon germanium (SiGe), but the present disclosure is not limited thereto” , see electrodes “the metal layer 16 may include molybdenum, aluminum, copper, titanium or a combination thereof, such as molybdenum/aluminum/molybdenum, titanium/aluminum/titanium or titanium/aluminum/molybdenum, but the present disclosure is not limited thereto”, see the electrodes contact the SiGe.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Narayan to include “wherein the metal layer includes titanium or molybdenum” and “wherein the semiconductor layer includes silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiNxOy)”.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is metals such as titanium or molybdenum are lower cost than gold and are known to give good results as electrode and that including silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiNxOy) in the semiconductor helps absorb infrared to obtain better range of absorption.
In regard to claim 2 Narayan and Chang as combined teaches wherein a first surface is between the substrate and the metal layer [see Fig. 1B] and a second surface is between the metal layer [see Fig. 1B] and the semiconductor layer, and the first metal structure and the second metal structure are in direct contact [see Fig. 1B] with the semiconductor layer on the second surface.
In regard to claim 3 Narayan and Chang as combined teaches wherein the first metal structure and the second metal structure include [see combination Chang] titanium or molybdenum.
Claim(s) 4-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Narayan and Chang as combined and further in view of Shang et al. (US 20220390623 A1) hereafter referred to as Shang.
In regard to claim 4 Narayan and Chang as combined does not specifically teach comprising a tunnel region between the first metal structure and the second metal structure, and a sensing current is conducted between the first metal structure and the second metal structure when a light is emitted to the light sensing transistor.
However it is noted that Fowler-Nordheim (FN) tunneling is understood by a person of ordinary skill in the art and according to the FN equation tunneling current reduces as distance increases, however according to the equation it is not zero even as distance increases, thus inherently the FN equation tunneling current in the device of Narayan is not zero.
See Shang explain this fact, see paragraph 0060 “Metal-semiconductor-metal (MSM) flat panel detector receives light to reduce the resistance of semiconductor layer, thus forming a metal-insulator-semiconductor (MIS) structure, which generates a tunneling current because of electron tunneling under high voltage. A display image is obtained by collecting and detecting the tunneling current. However, the MSM flat panel detector has large dark current, low detection quantum efficiency (DQE) and low modulation transfer function (MTF)”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Narayan to include comprising a tunnel region between the first metal structure and the second metal structure, and a sensing current is conducted between the first metal structure and the second metal structure when a light is emitted to the light sensing transistor.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that Fowler-Nordheim (FN) tunneling current naturally occurs and is useful for Narayan to use it as part of detection current in the device of Narayan.
In regard to claim 5 Narayan, Chang and Shang as combined teaches wherein the sensing current is caused by [see combination Chang, see Narayan Fig. 1B see “incident light 6” from top and bottom, see paragraph 0031 “light 6 incident from the gate electrode 14 side of the FET 2, thereby increasing the sensitivity of the device” “partially transparent gate metal electrode 14” , thus partially means some light is blocked. The Examiner notes that the claim does not state that causation is only by the light from the top, nor is it clear if the specification can support such an amendment] the light emitted to the light sensing transistor from a top side.
In regard to claim 6 Narayan, Chang and Shang as combined teaches further comprising a gate structure disposed under [see Narayan Fig. 1B see “gate electrode 14”] the substrate, the gate structure overlapping with the tunnel region in a vertical projection direction.
In regard to claim 7 Narayan, Chang and Shang as combined teaches wherein the gate structure shields [see combination Chang, see Narayan Fig. 1B see “incident light 6” from top and bottom, see paragraph 0031 “light 6 incident from the gate electrode 14 side of the FET 2, thereby increasing the sensitivity of the device” “partially transparent gate metal electrode 14” , thus partially means some light is blocked] at least part of a light emitted to the tunnel region of the light sensing transistor from a back side.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Narayan, Chang and Shang as combined and further in view of Kim et al. (US 20180129043 A1) hereafter referred to as Kim
In regard to claim 8 Narayan, Chang and Shang as combined does not teach further comprising a gap region between the gate structure and the second metal structure in the vertical projection direction.
See Kim teaches, see Fig. 1, Fig. 3, Fig. 4 see “non-overlapping regions 141” “channel region 240 includes non-overlapping regions 241 that do not overlap with the gate electrode 220”, see in Fig. 4 “Referring to FIG. 4, a non-overlapping region 341 of an optical amplification phototransistor 300 may be formed in a lateral direction of any one of source and drain electrodes 350S and 350D, or may be formed in a lateral direction of each of the source and drain electrodes 350S and 350D”, see the purpose is “As illustrated in FIG. 2, when light is not applied to the non-overlapping regions 141 of the optical amplification phototransistor 100, the non-overlapping regions 141 function as an external series resistor although a bias is applied to a gate electrode. However, when light is applied to the non-overlapping regions 141, the non-overlapping regions 141 may function a photoconductor for amplifying photoconductivity because resistance is decreased and conductivity increases”, Kim also teaches more material choices, see paragraph 0135 “upper local gate electrode 220 and the source and drain electrodes 250S and 250D may be formed of any one material of metallic materials and transparent conductive materials. The metallic material may be any one of Au, Ti, Al, and Pd, but the present invention is not limited thereto and metallic materials useable in the art to which the present invention pertains are preferred. In addition, the transparent conductive material may be at least one material of an amorphous oxide, a crystalline oxide, graphene, and a polymeric organic substance In accordance with an embodiment, the upper local gate electrode 220 and the source and drain electrodes 250S and 250D may be formed of a transparent conductive material. Here, the transparent conductive material may be IZO, ITO, or graphene”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Narayan to include further comprising a gap region between the gate structure and the second metal structure in the vertical projection direction.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to increase light based control and reduce gate based control of the device.
Claim(s) 9, 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Narayan (US 20020084504 A1) in view of Chang et al. (US 20230366739 A1) hereafter referred to as Chang
In regard to claim 9 Narayan teaches a [see Fig. 1A “FIGS. 1A, B are schematic diagrams illustrating top-contacting and bottom-contacting configurations of a photoFET structure”] a light sensing transistor, comprising:
a substrate [“insulating polymer layer 10” “insulator medium for the insulating layer 10 can be polymeric media such as PMMA or PVA, or conventional insulator media such as SiO.sub.2”];
a semiconductor layer [“semiconducting-photoconducting polymer layer 12”] disposed on the substrate; and
a metal layer [16, 18 see “metal electrodes 14, 16, 18”] disposed on the semiconductor layer, the metal layer having a first metal structure [see Fig. 1A] and a second metal structure;
wherein both of the first metal structure and the second metal structure are in direct contact [see Fig. 1A] with the semiconductor layer.
but does not teach “wherein the semiconductor layer includes silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiNxOy)” and “wherein the metal layer includes titanium or molybdenum”.
See Narayan paragraph 0038 “Gold electrodes, 3 mm wide with an inter-electrode spacing of 70 microns, forming the channel length, was deposited on the P3OT layer 12 to form the source electrode 18 and drain electrode 16”.
See Chang teaches absorbing infrared, see Fig. 1, see paragraph 0016-0018 “the absorber layer 22 may include silicon oxide, silicon nitride or silicon oxynitride, but the present disclosure is not limited thereto” “the first semiconductor layer 18 and the second semiconductor layer 24 may include silicon germanium (SiGe), but the present disclosure is not limited thereto” , see electrodes “the metal layer 16 may include molybdenum, aluminum, copper, titanium or a combination thereof, such as molybdenum/aluminum/molybdenum, titanium/aluminum/titanium or titanium/aluminum/molybdenum, but the present disclosure is not limited thereto” , see the electrodes contact the SiGe.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Narayan to include “wherein the semiconductor layer includes silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiNxOy)” and “wherein the metal layer includes titanium or molybdenum”.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is metals such as titanium or molybdenum are lower cost than gold and are known to give good results as electrode and that including silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiNxOy) in the semiconductor helps absorb infrared to obtain better range of absorption.
In regard to claim 10 Narayan and Chang as combined teaches wherein the first metal structure and the second metal structure include [see combination Chang] titanium or molybdenum.
Claim(s) 11-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Narayan and Chang as combined and further in view of Shang et al. (US 20220390623 A1) hereafter referred to as Shang.
In regard to claim 11 Narayan and Chang as combined does not specifically teach comprising a tunnel region between the first metal structure and the second metal structure, and a sensing current is conducted between the first metal structure and the second metal structure when a light is emitted to the light sensing transistor.
However it is noted that Fowler-Nordheim (FN) tunneling is understood by a person of ordinary skill in the art and according to the FN equation tunneling current reduces as distance increases, however according to the equation it is not zero even as distance increases, thus inherently the FN equation tunneling current in the device of Narayan is not zero.
See Shang explain this fact, see paragraph 0060 “Metal-semiconductor-metal (MSM) flat panel detector receives light to reduce the resistance of semiconductor layer, thus forming a metal-insulator-semiconductor (MIS) structure, which generates a tunneling current because of electron tunneling under high voltage. A display image is obtained by collecting and detecting the tunneling current. However, the MSM flat panel detector has large dark current, low detection quantum efficiency (DQE) and low modulation transfer function (MTF)”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Narayan to include comprising a tunnel region between the first metal structure and the second metal structure, and a sensing current is conducted between the first metal structure and the second metal structure when a light is emitted to the light sensing transistor.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that Fowler-Nordheim (FN) tunneling current naturally occurs and is useful for Narayan to use it as part of detection current in the device of Narayan.
In regard to claim 12 Narayan, Chang and Shang as combined teaches wherein the sensing current is caused by the light [see combination Chang , see Narayan Fig. 1A see “incident light 6” from top and bottom, see paragraph 0031 “light 6 incident from the gate electrode 14 side of the FET 2, thereby increasing the sensitivity of the device” “partially transparent gate metal electrode 14” . The Examiner notes that the claim does not state that causation is only by the light from the back, nor is it clear if the specification can support such an amendment] emitted to the light sensing transistor from a back side.
In regard to claim 13 Narayan, Chang and Shang as combined teaches further comprising a gate structure disposed under [see Narayan Fig. 1A see “gate electrode 14”] the substrate, the gate structure overlapping with the tunnel region in a vertical projection direction.
In regard to claim 14 Narayan, Chang and Shang as combined teaches wherein the gate structure shields [see combination Chang , see Narayan Fig. 1A see “incident light 6” from top and bottom, see paragraph 0031 “light 6 incident from the gate electrode 14 side of the FET 2, thereby increasing the sensitivity of the device” “partially transparent gate metal electrode 14” , thus partially means some light is blocked] at least part of the light emitted to the tunnel region of the light sensing transistor from the back side.
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Narayan, Chang and Shang as combined and further in view of Kim et al. (US 20180129043 A1) hereafter referred to as Kim
In regard to claim 15 Narayan, Chang and Shang as combined does not teach further comprising a gap region between the gate structure and the second metal structure in the vertical projection direction.
See Kim teaches, see Fig. 1, Fig. 3, Fig. 4 see “non-overlapping regions 141” “channel region 240 includes non-overlapping regions 241 that do not overlap with the gate electrode 220”, see in Fig. 4 “Referring to FIG. 4, a non-overlapping region 341 of an optical amplification phototransistor 300 may be formed in a lateral direction of any one of source and drain electrodes 350S and 350D, or may be formed in a lateral direction of each of the source and drain electrodes 350S and 350D”, see the purpose is “As illustrated in FIG. 2, when light is not applied to the non-overlapping regions 141 of the optical amplification phototransistor 100, the non-overlapping regions 141 function as an external series resistor although a bias is applied to a gate electrode. However, when light is applied to the non-overlapping regions 141, the non-overlapping regions 141 may function a photoconductor for amplifying photoconductivity because resistance is decreased and conductivity increases”, Kim also teaches more material choices, see paragraph 0135 “upper local gate electrode 220 and the source and drain electrodes 250S and 250D may be formed of any one material of metallic materials and transparent conductive materials. The metallic material may be any one of Au, Ti, Al, and Pd, but the present invention is not limited thereto and metallic materials useable in the art to which the present invention pertains are preferred. In addition, the transparent conductive material may be at least one material of an amorphous oxide, a crystalline oxide, graphene, and a polymeric organic substance In accordance with an embodiment, the upper local gate electrode 220 and the source and drain electrodes 250S and 250D may be formed of a transparent conductive material. Here, the transparent conductive material may be IZO, ITO, or graphene”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Narayan to include further comprising a gap region between the gate structure and the second metal structure in the vertical projection direction.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to increase light based control and reduce gate based control of the device.
Response to Arguments
Applicant's arguments filed 12/3/2025 have been fully considered but they are not persuasive.
On page 2 the Applicant argues that the new limitations are not taught by the prior art.
The Examiner responds that the amended rejections teaches the new materials of the new limitations to be obvious in view of the prior art.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM.
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/SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893