DETAILED ACTION
1. This action is in response to the amendment filed on 8/7/25.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
2. Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection.
Claim Rejections - 35 USC § 103
3. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Shao (US 20130169246) in view of Lu et al. (US 20190384337) and Huang Jiuzhou (CN 111290463. Also, see English translation).
Regarding claim 1: Shao discloses a power supply system (i.e. figures 1-4) comprising:
a plurality of linear power supply devices (i.e. 11, 12),
each of the plurality of learn power supply devices includes
an output transistor (i.e. P1, N1) having a first main electrode that is connectable to an application terminal of an input voltage (i.e. Vin) and a second main electrode that is connectable to a first feedback resistor (i.e. R1, R2), the first feedback resistor (i.e. R1, R2) being connected a second feedback resistor (i.e. R3, R4),
an error amplifier (i.e. 110, 120) to which a reference voltage (i.e. Vref1, Vref2) and a feedback voltage (i.e. from R1, R2 and R3, R4) that is generated at a node to which the first feedback resistor (i.e. R1, R2) and the second feedback resistor (i.e. R3, R4) are connected are input, the error amplifier (i.e. 110, 120) being capable of driving a control terminal of the output transistor (i.e. P1, N1),
an output terminal (i.e. terminal to COM), and
the output terminal (i.e. terminals of 11, 12) of each the plurality of linear power supply devices (i.e. 11, 12) is connectable in common to a load (i.e. 10),
but does not specifically disclose each off the plurality of linear power supply devices is a semiconductor integrated circuit package having a same configuration; an electrode pad, the electrode pad is connected to a node to which the second main electrode and the first feedback resistor are connected, the electrode pad is connected the output terminal by a wire.
Lu et al. disclose a voltage regulator comprising (i.e. figures 1 and 2) each off the plurality of linear power supply devices (i.e. LDO of figure 1 and/or 2) is a semiconductor integrated circuit package (i.e. ¶ 18) having a same configuration (i.e. see LDO of figure 1 and/or 2).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shao’s invention with the regulator as disclose by Lu et al., because LDO regulators may provide benefits over a single LDO regulator, including distributing the heat and power loss across multiple LDO regulator packages in high loads. Also, paralleling LDO regulators can improve dropout voltage and improve power supply rejection ratio (PSRR) performance because each LDO regulator operates in a lower current condition when compared to a single LDO regulator.
Jiuzhou discloses a voltage regulator (i.e. figure 1) comprising an electrode pad (i.e. VOUTpad), the electrode pad (i.e. VOUTpad) is connected to a node to which the second main electrode and the first feedback resistor (i.e. R1) are connected, the electrode pad (i.e. VOUTpad) is connected the output terminal (i.e. VOUT) by a wire (i.e. Rw3).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shao’s invention with the regulator as disclose by Jiuzhou for the plurality of linear power supply devices to have an electrode pad, the electrode pad being connected to a node to which the second main electrode and the first feedback resistor are connected, the electrode pad and the output terminal being connected to each other by a wire, because it provides the voltage value accuracy within the full load range can be maintained unchanged.
5. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Shao (US 20130169246) in view of Lu et al. (US 20190384337) and Huang Jiuzhou (CN 111290463. Also, see English translation) and further in view of Lo et al. (US 7336058).
Regarding claim 2: Shao disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the plurality of linear power supply devices further includes a first reference voltage terminal and a second reference voltage terminal each of the first reference voltage terminal and the second reference voltage terminal is connected to an application terminal of the reference voltage, and the first reference voltage terminal is externally connectable to the second reference voltage terminal.
Lo et al. disclose a voltage regulator (i.e. figure 2) comprising the plurality of linear power supply devices (i.e. 202-208) further includes a first reference voltage terminal (i.e. terminal for Vref of 202) and a second reference voltage terminal (i.e. terminal for Vref of 204), each of the first reference voltage terminal and the second reference voltage terminal is connected to an application terminal of the reference voltage (i.e. Vref), and the first reference voltage terminals are externally connectable to the second reference voltage terminal (i.e. terminal for Vref of 202 and 204) (i.e. see Vref of 202-208).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shao’s invention with the regulator as disclose by Lo et al. to improve voltage regulation over a broad range of operating frequency.
6. Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Shao (US 20130169246) in view of Lu et al. (US 20190384337) and Huang Jiuzhou (CN 111290463. Also, see English translation) and further in view of Lenz (US 9064713).
Regarding claims 3-4: Shao disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the wire includes an Au wire or a Cu wire.
Lenz discloses a regulator comprising the wire includes an Au wire or a Cu wire (i.e. Col. 3, lines 25-40).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shao’s invention with the regulator as disclose by Lenz to provide a very low resistivity such that current may flow in and out of the chip/IC with as little losses as possible.
7. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Shao (US 20130169246) in view of Lu et al. (US 20190384337) and Huang Jiuzhou (CN 111290463. Also, see English translation) and further in view of Chen et al. (US 20120119716).
Regarding claim 5: Shao discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the wire includes wires connected in parallel to the electrode pad and the output terminal.
Chen et al. discloses a power supply circuit comprising the wire includes wires connected in parallel (i.e. ¶ 5).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shao’s invention with the circuit as disclose by Chen et al. to have the wire includes wires connected in parallel to the electrode pad and the output terminal, because it reduces an effect of the bonding wire and the substrate wiring on the output voltage, and further improve the load regulation of the power supply chip.
8. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Shao (US 20130169246) in view of Lu et al. (US 20190384337) and Huang Jiuzhou (CN 111290463. Also, see English translation) and further in view of Liu (US 20120025798).
Regarding claim 6: Shao disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the reference voltage is able to be adjusted by a voltage dividing resistor to which a fuse that is able to be blown by a laser is connected in parallel.
Liu discloses a circuit (i.e. figure 1) comprising the reference voltage is able to be adjusted by a voltage dividing resistor (i.e. 11) to which a fuse (i.e. 112) that is able to be blown is connected in parallel (i.e. ¶ 8-13).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shao’s invention with the circuit as disclose by Liu, for the electric power that can be maintained within the range of the required voltage values.
Furthermore, it would have been an obvious matter of design choice to have a fuse that is able to be blown by a laser in maintain the output voltage within the range, since applicant has not discloses that a fuse that is able to be blown by a laser solve any stated problem or is for any particular purpose and it appears that the invention would perform equally well with Liu’s invention.
9. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Shao (US 20130169246) in view of Lu et al. (US 20190384337) and Huang Jiuzhou (CN 111290463. Also, see English translation) and further in view of Levinson (US 5852360).
Regarding claim 7: Shao disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the reference voltage is able to be adjusted by switching a bypass switch connected in parallel to a voltage dividing resistor, according to data written in a one time programmable memory.
Levinson disclose a voltage generator (i.e. figure 1) comprising the reference voltage is able to be adjusted by switching a bypass switch (i.e. M) connected in parallel to a voltage dividing resistor (i.e. R2, R3), according to data written in a one time programmable memory (i.e. 100).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shao’s invention with the generator as disclose by Levinson, because it is desirable to provide a reference voltage that is stable over variations in temperature.
10. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Shao (US 20130169246) in view of Huang Jiuzhou (CN 111290463. Also, see English translation).
Regarding claim 8: Shao discloses a power supply system (i.e. figures 1-4) comprising:
a plurality of linear power supply devices (i.e. 11, 12), each of which includes
an output transistor (i.e. P1, N1) having a first main electrode that is connectable to an application terminal of an input voltage (i.e. Vin) and a second main electrode that is connectable to a first feedback resistor (i.e. R1, R2), the first feedback resistor (i.e. R1, R2) and a second feedback resistor (i.e. R3, R4) being connected to each other in series,
an error amplifier (i.e. 110, 120) to which a reference voltage (i.e. Vref1, Vref2) and a feedback voltage (i.e. from R1, R2 and R3, R4) that is generated at a node to which the first feedback resistor (i.e. R1, R2) and the second feedback resistor (i.e. R3, R4) are connected are input, the error amplifier (i.e. 110, 120) being capable of driving a control terminal of the output transistor (i.e. P1, N1),
an output terminal (i.e. terminal to COM), and
wherein the output terminals (i.e. terminals of 11, 12) of the linear power supply devices (i.e. 11, 12) are connectable in common to a load (i.e. 10),
but does not specifically disclose an electrode pad, wherein the electrode pad being connected to a node to which the second main electrode and the first feedback resistor are connected, the electrode pad is connected the output by a plurality of wires, the plurality of wires is connected in parallel between the output terminal and the electrode pad to which the second main electrode and the first feedback resistor are connected.
Jiuzhou discloses a voltage regulator (i.e. figure 2) comprising an electrode pad (i.e. VOUTpad), wherein the electrode pad (i.e. VOUTpad) being connected to a node to which the second main electrode and the first feedback resistor (i.e. R1) are connected, the electrode pad is connected the output by a plurality of wires (i.e. Rw3, Rw4), the plurality of wires (i.e. Rw3, Rw4) is connected in parallel between the output terminal (i.e. Voutpad) and the electrode pad (i.e. Voutspad) to which the second main electrode and the first feedback resistor (i.e. R1) are connected.
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shao’s invention with the regulator as disclose by Jiuzhou for the plurality of linear power supply devices to have an electrode pad, the electrode pad being connected to a node to which the second main electrode and the first feedback resistor are connected, the electrode pad and the output terminal being connected to each other by a wire, because it provides the voltage value accuracy within the full load range can be maintained unchanged.
Conclusion
11. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
12. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Nguyen Tran/Primary Examiner, Art Unit 2838