DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Examiner acknowledges and accepts the amendment filed on 04/25/26.
Claims 1, 7, 8, 12 and 15 are amended; and
Claims 1-20 are currently pending.
Response to Arguments
Applicant’s arguments with respect to claims 1-11 and 13-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1 and 7 are rejected under 35 U.S.C. 102a1 as being anticipated by KESLER et al. (US PG Pub 2022/0209506 A1).
Regarding claim 1, KESLER discloses a vertical-cavity surface-emitting laser (VCSEL) array (500, FIG. 5, [0081]-[0082]), comprising:
a substrate (504, FIG. 5, [0081]);
an active layer (514, FIG. 5, [0081]) formed between a lower mirror (506, FIG. 5, [0081]) and an upper mirror (516, FIG. 5, [0081]);
a contact layer (a tunnel junction layer 508 equivalent to a contact layer, FIG. 5, [0081]) formed between the active layer and the substrate; and
an isolation trench (see annotated FIG. 5 below) extending through the contact layer between a first VCSEL (see annotated FIG. 5 below) and a second VCSEL (see annotated FIG. 5 below) of the VCSEL array,
wherein the isolation trench is filled with a filler (520, FIG. 5, [0082]) having a T-shape in a cross-sectional view and made of metal, polymer, or a combination thereof (520 has a T-shape and is made of a metal, [0082]).
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Regarding claim 7, KESLER discloses a bottom surface of the isolation trench is substantially level with a top surface of the substrate (FIG. 5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-2, 4-5, 8-11, 13, 15, 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kageyama et al. (US PG Pub 2009/0245312 A1) in view of CN112382926A (hereafter CN’926, machine translation is attached).
Regarding claim 1, Kageyama discloses a vertical-cavity surface-emitting laser (VCSEL) array (200, FIG. 4, [0070]), comprising:
a substrate (201, FIG. 4, [0070]);
an active layer (206, FIG. 4, [0072]) formed between a lower mirror (203, FIG. 4, [0070]) and an upper mirror (212, FIG. 4, [0070]);
a contact layer (205, FIG. 4, [0070]) formed between the active layer and the substrate (205 is formed between 206/201, FIG. 4); and
an isolation trench (g, FIG. 4, [0070]) extending through the contact layer between a first VCSEL (D21, FIG. 4, [0070]) and a second VCSEL (D22, FIG. 4, [0070]) of the VCSEL array,
wherein the isolation trench is filled with a filler (g is filled with air, FIG. 4).
Kageyama does not disclose the filler having a T-shape in a cross-sectional view and made of metal, polymer, or a combination thereof.
CN’926 discloses an isolation trench (2b, FIG. 1) filled with a filler (4, FIG. 1) having a T-shape (see annotated FIG. 1 below) in a cross-sectional view and made of a polymer (4 is an organic polymer) (see underlined portions on page 4).
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It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the filler of Kageyama with the filler having a T-shape in a cross-sectional view and made of polymer in order to obtain desired electrical isolation between adjacent VCSELs, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 2, Kageyama discloses an isolation layer (202, FIG. 4, [0070]) formed between the substrate and the contact layer (202 is formed between 201/205, FIG. 4).
Regarding claim 4, Kageyama discloses a bottom surface of the filler is lower than the isolation layer (g is extended beyond 202, FIG. 4).
Regarding claim 5, Kageyama discloses the isolation trench has a tapered sidewall (g has a tapered sidewall toward the bottom, FIG. 4).
Regarding claim 8, Kageyama discloses a vertical-cavity surface-emitting laser (VCSEL) array (200, FIG. 4, [0070]), comprising:
a lower mirror (203, FIG. 4, [0070]) with an isolation layer (202, FIG. 4, [0070]) formed over a substrate (201, FIG. 4, [0070]);
an active layer (206, FIG. 4, [0072]) formed over the lower mirror;
an upper mirror (212, FIG. 4, [0070]) formed over the active layer;
a contact layer (205, FIG. 4, [0070]) formed over the isolation layer;
a first electrode (210, FIG. 4, [0070]) formed over the upper mirror;
a second electrode (215, FIG. 4, [0070]) formed over the contact layer;
an isolation trench (g, FIG. 4, [0070]) surrounding a VCSEL of the VCSEL array (g surrounds D21, FIG. 4); and
a dielectric layer (204, FIG. 4, where a portion of 204 is formed above 215, [0070]) formed over the second electrode,
wherein the isolation trench is filled with a filler (air, FIG. 4) made of a material different from that of the dielectric layer (air is different from 204 which is made of SiO2, [0072]).
Kageyama does not disclose the filler having a T-shape in a cross-sectional view and made of metal, polymer, or a combination thereof.
CN’926 discloses an isolation trench (2b, FIG. 1) filled with a filler (4, FIG. 1) having a T-shape (see annotated FIG. 1 above) in a cross-sectional view and made of a polymer (4 is an organic polymer) (see underlined portions on pages 3-4).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the filler of Kageyama with the filler having a T-shape in a cross-sectional view and made of polymer in order to obtain desired electrical isolation between adjacent VCSELs, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 9, Kageyama discloses an insulating layer lining the isolation trench (another portion of 204 covers g, FIG. 4).
Regarding claim 10, Kageyama discloses the filler is electrically isolated from the contact layer by the insulating layer (FIG. 4).
Regarding claim 11, Kageyama discloses a top portion of the filler laterally extends out of the isolation trench (see annotated FIG. 4 above).
Regarding claim 13, Kageyama discloses the substrate is n-type doped or p-type doped (201 is n-type, [0070]).
Regarding claim 15, Kageyama discloses a method for forming a VCSEL array (200, FIG. 4, [0070]), comprising:
forming a lower mirror (203, FIG. 4, [0070]) and a contact layer (205, FIG. 4, [0070]) over a substrate (201, FIG. 4, [0070]);
forming an active layer (206, FIG. 4, [0072]) over the lower mirror;
forming an upper mirror (212, FIG. 4, [0070]) over the active layer;
patterning the upper mirror, the active layer, and the lower mirror to form a mesa (M21, FIG. 4, [0070]) over the contact layer;
forming a first electrode (210, FIG. 4, [0070]) over the mesa;
forming a second electrode (215, FIG. 4, [0070]) over the contact layer;
forming an isolation trench (g, FIG. 4, [0070]) in the contact layer and the lower mirror; and filling the isolation trench with a filler (air, FIG. 4).
Kageyama does not disclose the filler having a T-shape in a cross-sectional view and made of metal, polymer, or a combination thereof.
CN’926 discloses an isolation trench (2b, FIG. 1) filled with a filler (4, FIG. 1) having a T-shape (see annotated FIG. 1 above) in a cross-sectional view and made of a polymer (4 is an organic polymer) (see underlined portions on pages 3-4).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the filler of Kageyama with the filler having a T-shape in a cross-sectional view and made of polymer in order to obtain desired electrical isolation between adjacent VCSELs, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Regarding claim 19, Kageyama discloses the first electrode and the second electrode are formed on the same side of the substrate (FIG. 4).
Regarding claim 20, Kageyama discloses the substrate is a n-type substrate ([0070]).
Claims 3, 6 and 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Kageyama et al. and CN’926 as applied to claims 1 and 15 above, and further in view of Jikutani et al. (US PG Pub 2005/0100068 A1).
Regarding claim 3, the combination has disclosed the VCSEL array outlined in the rejection to claim 2 above except the isolation layer is inserted into the lower mirror. Jikutani discloses forming an isolation layer (104, FIG. 1, [0254]) within a lower DBR (103, FIG. 1, [0254]) of a VCSEL (FIG. 1). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the isolation layer of the combination with formed within the lower mirror as taught by Jikutani in order to obtain desired current confinement effect.
Regarding claim 6, the combination has disclosed the VCSEL array outlined in the rejection to claim 1 above except the lower mirror is un-doped. Jikutani discloses “With a partially or totally non-doped distributed Bragg reflector, regardless of the conductivity type, the absorption loss of oscillation light can be reduced.” ([0111]) It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the lower mirror of the combination with being un-doped as taught by Jikutani in order to minimize light absorption.
Regarding claim 16, the combination has disclosed the isolation layer and the method outlined in the rejections to claim 3 and 15 above except forming the isolation layer by implantation. It would have been an obvious matter of design choice before the effective filing date of the claimed invention to form the isolation layer by implantation in order to obtain precise formation of the isolation layer since forming an isolation layer by implantation is considered well known in the art.
Regarding claim 17, the combination has disclosed the method outlined in the rejection to claim 15 above except the active layer comprises multiple junction layers with a tunneling junction layer sandwiched between active junction layers. Jikutani discloses the active layer comprises multiple junction layers with a tunneling junction layer sandwiched between active junction layers (“The tunnel junction 217 formed by a p++-GaAs layer and an n++-GaAs layer is interposed between the p-GaAs upper semiconductor distributed Bragg reflector high refraction layer 210b and the n-GaAs upper semiconductor distributed Bragg reflector high refraction layer 208b,” FIG. 2, [0278]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the active layer of the combination with comprising multiple junction layers with a tunneling junction layer sandwiched between active junction layers as taught by Jikutani in order to obtain improved electrical characteristics.
Regarding claim 18, the combination, as modified, discloses the active junction layers comprise an un-doped semiconductor layer (207, FIG. 2, [0272] of Jikutani) sandwiched between a p-type doped semiconductor layer (210b, FIG. 2, [0276] of Jikutani) and an n-type doped semiconductor layer (203a, FIG. 2, [0276] of Jikutani).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kageyama et al. and CN’926 as applied to claim 8 above, and further in view of KESLER et al.
Regarding claim 14, the combination has disclosed the method outlined in the rejection to claim 8 above except the substrate is a semi-insulating substrate. KESLER discloses the substrate is a semi-insulating substrate ([0053]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the substrate of the combination with a semi-insulating substrate in order to minimize parasitic capacitance, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Allowable Subject Matter
Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YUANDA ZHANG whose telephone number is (571)270-1439. The examiner can normally be reached M-F 10:30 AM - 6:30 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MINSUN HARVEY can be reached at (571)272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/YUANDA ZHANG/Primary Examiner, Art Unit 2828
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