Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5, 9-12, 15-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xue US 2022/0343145.
As per claim 1. Xue teaches A method of operating a data processing system, the data processing system comprising: a processor that is configured to perform neural network processing, the processor comprising: one or more execution units configured to perform processing operations for neural network processing; and a control circuit configured to distribute processing tasks to the execution unit or units to cause the execution units to perform processing operations for neural network processing in response to indications of neural network processing to be performed provided to the control circuit; [0005][0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, including execution units, teaches ) (teaches dividing up the GNN processing to multiple accelerator processors which may be GPUs)
Xue teaches the data processing system further comprising a graphics processor, the graphics processor comprising a programmable execution unit operable to execute processing programs to perform processing operations; the method comprising: the control circuit of the processor that is configured to perform neural network processing, in response to an indication of neural network processing to be performed, causing the programmable execution unit of the graphics processor to execute a program to perform the indicated neural network processing. [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor)
As per claim 2. The method of claim 1, Xue teaches comprising the control circuit of the processor that is configured to perform neural network processing that is configured to distribute processing tasks to the execution unit or units of the neural processor to cause the execution units to perform processing operations for neural network processing: subdividing an overall neural network processing task to be performed into a plurality of smaller blocks of neural network processing; and causing the execution unit(s) to execute the neural network processing operations for the blocks individually. [0005][0049][0059] (dividing operations into submatrix tiles in order for more efficient execution distributed to accelerator cores by instruction execution units)
As per claim 3. The method of claim 1, Xue teaches wherein the indications of the neural network processing to be performed are in the form of one or more sets of neural network processing information, with each such set of information indicating a sequence of one or more processing operations to be performed for the neural network processing, an indication of data inputs and outputs for operation(s) in the sequence indicated by the set of information, and an indication of the location in memory of the initial input to the sequence of operations and/or of where the output from the sequence of operations should be stored. [0044][0052] [0056] (teaches scheduling from scheduler, to command processor to distributed accelerator core memories storing in cache.)
As per claim 4. The method of claim 1, Xue teaches wherein the indications of neural network processing to be performed that are provided to the control circuit of the processor configured to perform neural network processing can indicate that a neural network processing operation should be performed by the programmable execution unit of the graphics processor executing a program to perform that neural network processing operation; and the method comprises: the control circuit of the processor that is configured to perform neural network processing in response to an indication of a neural network processing operation(s) to be performed by execution of a program by the programmable execution unit of the graphics processor, causing the programmable execution unit of the graphics processor to execute a program to perform the neural network processing operation(s). [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor)
As per claim 5. The method of claim 1, Xue teaches wherein the graphics processor comprises a control circuit operable to control the execution of programs to perform processing operations by the execution unit of the graphics processor, and the control circuit of the processor configured to perform neural network processing causes the programmable execution unit of the graphics processor to execute a program to perform a processing operation(s) for neural network processing by communicating with the control circuit of the graphics processor, to thereby cause the program execution to be performed. [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor)
As per claim 9. Xue teaches A data processing system, the data processing system comprising: a processor that is configured to perform neural network processing, the processor comprising: one or more execution units configured to perform processing operations for neural network processing; and a control circuit configured to distribute processing tasks to the execution unit or units to cause the execution units to perform processing operations for neural network processing in response to indications of neural network processing to be performed provided to the control circuit; the data processing system further comprising a graphics processor, the graphics processor comprising a programmable execution unit operable to execute processing programs to perform processing operations; wherein: the control circuit of the processor that is configured to perform neural network processing is configured to: in response to an indication of particular neural network processing to be performed, cause the programmable execution unit of the graphics processor to execute a program to perform the indicated neural network processing.
[0005][0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, including execution units, teaches ) (teaches dividing up the GNN processing to multiple accelerator processors which may be GPUs)
As per claim 10. The system of claim 9, Xue teaches wherein the control circuit of the processor that is configured to perform neural network processing that is configured to distribute processing tasks to the execution unit or units of the neural processor to cause the execution units to perform processing operations for neural network processing is configured to: subdivide an overall neural network processing task to be performed into a plurality of smaller blocks of neural network processing; and cause the execution unit(s) to execute the neural network processing operations for the blocks individually. [0005][0049][0059] (dividing operations into submatrix tiles in order for more efficient execution distributed to accelerator cores by instruction execution units)
As per claim 11. The system of claim 9, Xue teaches wherein the indications of neural network processing to be performed that are provided to the control circuit of the processor configured to perform neural network processing can indicate that a neural network processing operation should be performed by the programmable execution unit of the graphics processor executing a program to perform that neural network processing operation; and the control circuit of the processor that is configured to perform neural network processing is configured to, in response to an indication of a neural network processing operation(s) to be performed by execution of a program by the programmable execution unit of the graphics processor, cause the programmable execution unit of the graphics processor to execute a program to perform the neural network processing operation(s). [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor)
As per claim 12. The system of claim 9, Xue teaches wherein the graphics processor comprises a control circuit operable to control the execution of programs to perform processing operations by the execution unit of the graphics processor; and the control circuit of the processor configured to perform neural network processing is configured to cause the programmable execution unit of the graphics processor to execute a program to perform a processing operation(s) for neural network processing by communicating with the control circuit of the graphics processor, to thereby cause the program execution to be performed. [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor)
As per claim 15. The system of any one of claim 9, Xue teaches wherein: the processor configured to perform neural network processing comprises local storage for storing data locally while an execution unit or units of the processor is performing neural network processing; and the graphics processor comprises local storage for storing data for use by the programmable execution unit of the graphics processor when executing a program; and the graphics processor further comprises a load/store circuit having: an interface to a memory system of the data processing system, whereby it may transfer data between the local storage for the programmable execution unit of the graphics processor and the memory system of the data processing system; and a separate interface with the processor that is configured to perform the neural network processing, whereby it may transfer data between the local storage of the processor that is configured to perform neural network processing and the local storage for the programmable execution unit of the graphics processor. [0042][0044][0046]-[0052][0055][0056] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, teaches shared caches, teaches a shared memory of the data processing system, teaches separate interfaces between said systems Figure 2A)
As per claim 16. The system of claim 9, wherein: Xue teaches the graphics processor comprises an execution core, and the processor that is configured to perform neural network processing comprises a neural processor that is associated with and coupled to the execution core; and the execution core and neural processor share a cache of a memory system hierarchy of the data processing system, via which they are operable to read data from, and write data to, memory of the data processing system. [0042][0044][0046]-[0052][0055][0056] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, teaches shared caches, teaches a shared memory of the data processing system)
As per claim 17. The system of claim 9, Xue teaches further comprising: a control unit operable to receive indications of processing tasks to be performed from a processor, and configured to, in response to such indications distribute processing tasks either to the control circuit of the processor configured to perform neural network processing or to a control circuit of the graphics processor. [0005][0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, including execution units, teaches ) (teaches dividing up the GNN processing to multiple accelerator processors which may be GPUs)
As per claim 18. Xue teaches A graphics processor, the graphics processor comprising: a programmable execution unit operable to execute processing programs to perform processing operations; and local storage configured to store data for use by the programmable execution unit of the graphics processor when executing a program; wherein: the programmable execution unit is configured to: in response to an instruction in a program being executed by the programmable execution unit, cause data to be loaded from local storage of a processor configured to perform neural network processing to the local storage of the graphics processor for use by the programmable execution unit of the graphics processor when executing further instructions in the program being executed; and/or in response to an instruction in a program being executed by the programmable execution unit, cause data stored in the local storage for the programmable execution unit of the graphics processor during execution of the program by the programmable execution unit of the graphics processor to be written to local storage of a processor configured to perform neural network processing. [0005][0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, including execution units, teaches ) [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, Xue teaches using the GPU for neural processing for efficiency, teaches transferring execution units from first cache to second cache in a graphics processor and back)
As per claim 19 Xue teaches A non-transitory computer program comprising computer software code for performing the method of claim 1 when the program is run on one or more data processors.
[0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6, 7, 8, 13, 14, is/are rejected under 35 U.S.C. 103 as being unpatentable over Xue US 2022/0343145 in view of Feng US 20180322383
As per claim 6. The method of claim 1, wherein: Xue teaches the processor configured to perform neural network processing comprises local storage that is used for storing data locally while an execution unit or units of the processor are performing neural network processing; and the graphics processor comprises local storage for storing data for use by the programmable execution unit of the graphics processor when executing a program; and the method comprises: when the programmable execution unit of the graphics processor is to execute or is executing a program to perform a processing operation for neural network processing under the control of the control circuit of the processor configured to perform neural network processing: loading data directly from the local storage of the processor configured to perform neural network processing to local storage of the graphics processor for use when the programmable execution unit of the graphics processor is executing the program to perform a processing operation for neural network processing; and/or storing data generated by the execution of a program by the programmable execution unit of the graphics processor to perform a processing operation(s) for neural network processing directly from the local storage of the graphics processor to the local storage of the processor configured to perform neural network processing. [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor) (teaches loading data directly from cache 0221 to the command processor, to gpu accelerators)
Feng supplementally teaches loading data directly from the local storage of the processor configured to perform neural network processing to local storage of the graphics processor for use when the programmable execution unit of the graphics processor is executing the program to perform a processing operation for neural network processing; and/or storing data generated by the execution of a program by the programmable execution unit of the graphics processor to perform a processing operation(s) for neural network processing directly from the local storage of the graphics processor to the local storage of the processor configured to perform neural network processing [0065][0067] (teaches sending the instructions directly from the CPU to GPU)
As per claim 7. The method of claim 6, comprising at least one of: Xue teaches loading data from the local storage of the processor configured to perform neural network processing to the local storage for the programmable execution unit of the graphics processor before execution of a program to perform an operation or operations for neural network processing is begun; and writing data from the local storage for the programmable execution unit of the graphics processor that has executed the program to perform the processing operation(s) for the neural network processing to the local storage of the processor configured to perform neural network processing after execution of a program to perform an operation or operations for neural network processing has been completed.
Feng supplementally teaches loading data directly from the local storage of the processor configured to perform neural network processing to local storage of the graphics processor for use when the programmable execution unit of the graphics processor is executing the program to perform a processing operation for neural network processing; and/or storing data generated by the execution of a program by the programmable execution unit of the graphics processor to perform a processing operation(s) for neural network processing directly from the local storage of the graphics processor to the local storage of the processor configured to perform neural network processing [0065][0067] (teaches sending the instructions directly from the CPU to GPU)
As per claim 8. The method of claim 1, wherein: Xue teaches the processor configured to perform neural network processing comprises local storage that is used for storing data locally while an execution unit or units of the processor is performing neural network processing; and the graphics processor comprises local storage for storing data for use by the programmable execution unit of the graphics processor when executing a program; and the method comprises at least one of: when the programmable execution unit of the graphics processor is executing a program to perform a processing operation for performing neural network processing, the programmable execution unit in response to an instruction in the program being executed, causing data to be loaded from the local storage of the processor that is configured to perform neural network processing to local storage for the programmable execution unit for use when executing the program to perform the processing operation(s) for neural network processing; and when the programmable execution unit of the graphics processor is executing a program to perform a processing operation for performing neural network processing, the programmable execution unit in response to an instruction in the program being executed, causing data to be written from the local storage for the programmable execution unit into the local storage of the processor that is configured to perform neural network processing. [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, Xue teaches using the GPU for neural processing for efficiency, teaches transferring execution units from first cache to second cache in a graphics processor and back)
Feng supplementally teaches loading data directly from the local storage of the processor configured to perform neural network processing to local storage of the graphics processor for use when the programmable execution unit of the graphics processor is executing the program to perform a processing operation for neural network processing; and/or storing data generated by the execution of a program by the programmable execution unit of the graphics processor to perform a processing operation(s) for neural network processing directly from the local storage of the graphics processor to the local storage of the processor configured to perform neural network processing [0065][0067] (teaches sending the instructions directly from the CPU to GPU)
It would have been obvious to one of ordinary skill in the art before the priority date of the instant application to use the teaching of Feng with the prior art because it is more efficient.
As per claim 13. The system of claim 9, wherein: Xue teaches the processor configured to perform neural network processing comprises local storage for storing data locally while an execution unit or units of the processor are performing neural network processing; and the graphics processor comprises local storage for storing data for use by the programmable execution unit of the graphics processor when executing a program; and the graphics processor comprises: a local storage pre-load/post-store circuit that is configured to transfer data directly between the local storage of the processor configured to perform neural network processing and the local storage of the graphics processor. [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor) (teaches loading data directly from cache 0221 to the command processor, to gpu accelerators)
Feng supplementally teaches loading data directly from the local storage of the processor configured to perform neural network processing to local storage of the graphics processor for use when the programmable execution unit of the graphics processor is executing the program to perform a processing operation for neural network processing; and/or storing data generated by the execution of a program by the programmable execution unit of the graphics processor to perform a processing operation(s) for neural network processing directly from the local storage of the graphics processor to the local storage of the processor configured to perform neural network processing [0065][0067] (teaches sending the instructions directly from the CPU to GPU)
As per claim 14. The system of claim 9, wherein: Xue teaches the processor configured to perform neural network processing comprises local storage for storing data locally while an execution unit or units of the processor is performing neural network processing; and the graphics processor comprises local storage for storing data for use by the programmable execution unit of the graphics processor when executing a program; and the programmable execution unit of the graphics processor is configured to, in response to an instruction in a program being executed by the programmable execution unit that indicates that data should be loaded from local storage of a processor configured to perform neural network processing to local storage for the programmable execution unit, cause data to be loaded from local storage of the processor configured to perform neural network processing to the local storage for the programmable execution unit; and/or the programmable execution unit of the graphics processor is configured to, in response to an instruction in a program being executed by the programmable execution unit that indicates that data should be stored into local storage of a processor configured to perform neural network processing from local storage for the programmable execution unit, cause data to be stored into local storage for the processor configured to perform neural network processing from the local storage of the programmable execution unit. [0042][0046]-[0052] (teaches scheduling a neural network operation to be performed by the accelerator/GPU via a processor controller/scheduler/command processor, Xue teaches using the GPU for neural processing for efficiency, teaches transferring execution units from first cache to second cache in a graphics processor and back)
Feng supplementally teaches loading data directly from the local storage of the processor configured to perform neural network processing to local storage of the graphics processor for use when the programmable execution unit of the graphics processor is executing the program to perform a processing operation for neural network processing; and/or storing data generated by the execution of a program by the programmable execution unit of the graphics processor to perform a processing operation(s) for neural network processing directly from the local storage of the graphics processor to the local storage of the processor configured to perform neural network processing [0065][0067] (teaches sending the instructions directly from the CPU to GPU)
It would have been obvious to one of ordinary skill in the art before the priority date of the instant application to use the teaching of Feng with the prior art because it is more efficient.
Conclusion
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/CHRISTOPHER J BROWN/Primary Examiner, Art Unit 2439