Prosecution Insights
Last updated: August 17, 2026
Application No. 18/349,699

SYSTEMS AND METHODS FOR EARLY DETECTION OF NETWORK FRAUD EVENTS

Final Rejection §101
Filed
Jul 10, 2023
Priority
Dec 28, 2018 — continuation of 10/937,030 +1 more
Examiner
POINVIL, FRANTZY
Art Unit
3693
Tech Center
3600 — Transportation & Electronic Commerce
Assignee
Mastercard International Incorporated
OA Round
6 (Final)
79%
Grant Probability
Favorable
7-8
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
757 granted / 957 resolved
+27.1% vs TC avg
Strong +16% interview lift
Without
With
+15.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
35 currently pending
Career history
1007
Total Applications
across all art units

Statute-Specific Performance

§101
40.2%
+0.2% vs TC avg
§103
24.8%
-15.2% vs TC avg
§102
16.6%
-23.4% vs TC avg
§112
6.6%
-33.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 957 resolved cases

Office Action

§101
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 4/29/2026 have been fully considered but they are not persuasive. The rejection of Claims 1-20 under the judicially created doctrine of obvious-type double patenting as being unpatentable over Claims 1-20 of U.S. Patent No. 11,741,474 remains outstanding. Applicant argues that the recitations of "dropping" malicious data packets in real-time and "blocking future traffic" from a malicious source address, with respect to the question of patent eligibility. Specifically, the claimed computing system is configured to automatically intercept messages that include an account number within an account range that is part of a detected active fraud event, and to automatically apply feature inputs to train at least one model to automatically reweight further scoring of incoming messages to account for the detected active fraud event (e.g., to score certain messages as more likely to depict fraudulent data patterns based on the detected active fraud event, thereby preventing processing of - or blocking - certain likely-fraudulent transactions). Applicant’s representative then states the pending claims are patent eligible for at least the same reasons as Sample Claim 3 of Example 47 of the 2024 Updated PEG. In response, in reviewing the claims as amended, it is noted that the claims are not amended in the format of Example 47, claim 3 found in the 2024 Updated PEG. Example claim 3 is directed to a method of suing an artificial neural network to detect malicious network packets using a trained neural network by detecting a source address associated with one or more malicious network packets, dropping the one or more malicious network packets in real time, and blocking future traffic from the source address. The Applicant’s independent claims 1, 8 and 15 recite the additional elements of a “processor with a memory” performing generic functions of “receiving data of incoming electronic transaction authorization request messages and provide a score to each of those messages using a fraud pattern score. The claims further now recite a “ration striping engine” to receive from the profiling engine to further score the electronic request messages. The claims further recite a calculating function and a “sort” or “sorting”, “index” or “indexing” and “detect” or “detecting” of fraud events. These claimed functions are also not similar to the claimed functions found in Example 3 which calls for dropping one or more malicious network packets in real time and block future traffic from a source address. The claims as currently amended still do not provide sufficient details to transform the abstract idea into patent eligible subject matter. See, e.g. Alice, 134 S. Ct. at 2360 (explaining that claims that “amount to ‘nothing significantly more’ than an instruction to apply the abstract idea…using some unspecified, generic computer” is not ‘enough’ to transform an abstract idea into a patent-eligible invention” (quoting Mayo, 566, U.S. at 77, 79)); Intellectual Ventures LLC v. Capital One Fin.Corp., 850 F. 3d 1332, 1342 (Fed. Cir. 2017) (“The claim language here provides only a result-oriented-solution with insufficient detail for how a computer accomplishes it”). The claims still do not effect an improvement to another technology or technical field; the claims do not amount to an improvement to the functioning of a computer itself; and the claims do not move beyond a general link of the use of an abstract idea to a particular technological environment. There appears to lack a specific arrangement detecting malicious network packets and blocking traffic from a source address as noted or required in the Example 47, claim 3 which the applicant is referring to. As such, the applicant’s arguments are not convincing. Applicant's then states that the specification and the claims recite and contain specific technological improvements in the technical field of electronic network message processing. Applicant’s representative also states “In summary, the claims at issue here are not "directed to" a judicial exception. Accordingly, Applicant respectfully requests that the Section 101 rejection be withdrawn because Claims 1, 8, and 15 and their respective dependent claims are not directed to an abstract idea”. In response, under Step 2A, Prong Two: The judicial exception is not integrated into a practical application, In particular, the clams recite a “payment card network” having a computing system for receiving, sorting and calculation a for a scored electronic transaction authorization request messages within each fraud score range. The computing device in a payment card network being as the only recited element beyond the abstract idea, but it does not integrate the abstract idea into a practical application in examining each claim as a whole. The independent claims do not improve the functioning of the computing device, and the processor with a memory, the ration striping engine or payment card network nor do they effect an improvement in any other technology or technical field. The claims amount to nothing significantly more than an instruction to apply the abstract idea using generic computer components performing routine functions. That is not enough to transform an abstract idea into a patent-eligible invention. See Alice, 573 US. at 225-26; see also Inventor Holdings, LLC v. Bed Bath & Beyond, Inc., 876 F.3d 1372, 1378 (Fed. Cir. 2017) (sequence of receiving, analyzing, modifying, generating, displaying, and transmitting data recited an abstraction). The claimed computing device, processor, memory in a payment network are interpreted as being recited at a high level of generality and even if the claims recited in the affirmative, having a computing device the generic computer functions of receiving data, calculating data, sorting data and detecting data do not amount to a significantly more than the abstract idea. Even the applicant’s specification does not provide any improved computer or technology rather generically applies the abstract idea to a generic computer. A statutory claim would recite an automated machine implemented method or system with specific structures for performing the claimed invention so as to provide an improvement to another technology or technical field, an improvement to the functioning of the computer itself, or meaningful limitations beyond generally linking the use of an abstract idea to a particular technological environment. Each claim as a whole, does not amount to significantly more than the abstract idea itself. This is because each claim does not effect an improvement to another technology or technical field; each claim does not amount to an improvement to the functioning of a computer itself; and each claim does not move beyond a general link of the use of an abstract idea to a particular technological environment. The use of a computing device with a processor and memory in a generalized fashion to increase efficiency does not meaningfully limit those otherwise abstract claims. See, e.g.. Ex. 1003, col. 5, II. 21-22; See Bancorp Servs., LLC v. Sun Life Assurance Co. of Can., 687 F.3d 1266,1278, (Fed. Cir. 2012) ("[T]he fact that the required calculations could be performed more efficiently via a computer does not materially alter the patent eligibility of the claimed subject matter.") at 1279; Gottschalk, 409 U.S. at 67. See also Alice Corp. 134 S.Ct. at 2358 ("[T]he mere recitation of a generic computer cannot transform a patent-ineligible abstract idea into a patent-eligible invention... Given the ubiquity of computers, wholly generic computer implementation is not generally the sort of additional feature[s] that provides any practical assurance that the process is more than a drafting effort designed to monopolize the [abstract] itself.") and Bancorp Servs., L.L.C.v. Sun Life Assurance Co., 687 F.3d 1266, 1280 (Fed. Cir. 2012). The claims do not recite or show the additional elements improve (1) the computer itself, or (2) another technology or technical field. See Guidance, 84 Fed. Reg. at 55 (citing MPEP § 2106.05(a)). Rather, the above-noted additional elements merely (1) apply the abstract idea on a computer; (2) include instructions to implement the abstract idea on a computer; or (3) use the computer as a tool to perform the abstract idea. See Guidance, 84 Fed. Reg. at 55 (citing MPEP § 2106.05(f)). Accordingly, the recited additional elements do not integrate the abstract idea into a practical application. In particular the claimed “computing device” and “payment network card” are recited at a high-level of generality (i.e., as a generic processor performing a generic computer function of ranking information based on a determined amount of use) such that they amount no more than mere instructions to apply the exception using a generic computer component. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. With respect to integration of the abstract idea into a practical application, the additional elements amount to no more than mere instructions to apply the exception using a generic computer component. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. Under the Alice/Mayo step two, the additional recited elements, namely the recited (1) computing device, processor with a memory, the striping engine (2) payment network card when considered individually and as an ordered combination do not provide an inventive concept such that these additional elements amount to significantly more than the abstract idea as similarly noted in Alice, 573 U.S. at 221; see also Guidance, 84 Fed. Reg. at 56. As noted above, the claimed invention merely uses generic computing components to implement the recited abstract idea and thus fails to recite a statutory subject matter. The limitations of performing steps of detecting fraud amount to instructions to implement an abstract idea on a computer or merely using a computer as a tool to perform an abstract idea (see MPEP 2106.05(1)), also see applicant's specification for guiding interpretation of these claim features, describing implementation with generic commercially available devices or any machine capable of executing a set of instructions, similarly describing usage of general and special purpose computer and any kind of digital computer including generic commercially available devices. The claimed “computing system”, “processor”, “memory” and “payment card network” are similarly understood in light of applicant's specification as mere usage of any arrangement of computer software or hardware intermediate components potentially using networks to communicate with instructions are properly understood to be mere instructions to apply the abstraction using a computer or device or computer system. Performing steps by a generic machine, such as a transaction server or computer with one or more processors with memories merely limits the abstraction to computer field by execution by generic computers. See MPEP 2106.05. As noted in MPEP 2106.04(d), limitations which amount to instructions to implement an abstract idea on a computer or merely using a computer as a tool, limitations which amount to insignificant extra-solution activity, and limitations which amount to generally linking to a particular technological environment do not integrate a practical exception into a practical application. Accordingly, the applicant’s arguments are not persuasive. A rejection of the claims as currently amended is found below. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Subject Matter Eligibility Standard When considering subject matter eligibility under 35 U.S.C. 101, it must be determined whether the claim is directed to one of the four statutory categories of invention, i.e., process, machine, manufacture, or composition of matter. Specifically, claim 1 is directed to a system. Claims 8 and 15 are directed to a method. Each of the claims falls under one of the four statutory classes of invention. If the claim does fall within one of the statutory categories, it must then be determined whether the claim is directed to a judicial exception (i.e., law of nature, natural phenomenon, and abstract idea). Claims 1 and 15 as an example recite: fraudulent network events in a payment card network, said computing system comprising at least one memory storing computer-executable instructions that, upon execution by at least one processor, cause the at least one processor to implement: first data pattern detection model for processing electronic messages at an individual level, to the first data pattern detection model configured to: continuously receive a plurality of incoming electronic transaction authorization request messages, each including a respective account number; and preliminarily score each of the plurality of electronic transaction authorization request messages to generate a plurality of scored electronic transaction authorization request messages, each including the respective account number and a respective fraud score, wherein the respective fraud score is proportional to indicia of fraud present in an individual transaction corresponding to the respective electronic transaction authorization request message being scored; and a ratio striping engine for processing electronic transaction messages at an account-range level, the ratio striping engine configured to: receive, from at least one of the first data pattern detection model or an intermediate data pattern detection model implemented by the at least one processor to further score the plurality of electronic transaction authorization request messages, the plurality of scored electronic transaction authorization request messages; electronically sort the scored electronic transaction authorization request messages into a plurality of account ranges, wherein each of the account ranges includes the scored electronic transaction request messages having the account number within the account range; electronically index the scored electronic transaction authorization request messages within a table, stored in the at least one memory, for each of the account ranges into a plurality of fraud score range stripes based on the corresponding fraud pattern score; calculate, for the scored electronic transaction authorization request messages within each fraud score pattern range stripe within each account range stored in the table, a ratio of i) a cumulative metric for a first time period to ii) the cumulative metric for a second time period; automatically detect, in near real-time relative to the first or second time periods and based on the calculated ration for one of the fraud pattern score range stripes within the first account range satisfying a condition, an active fraud event associated with a first account range of the account ranges; in response to automatically detecting the active fraud event, automatically intercept one or more incoming electronic transaction authorization request messages any account number within the first account range for implementing additional real-time fraud pattern detection operations by a dedicated fraud pattern detection computing device thereby causing additional real-time fraud pattern detection operations to be strategically deployed on the intercepted one or more incoming transaction authorization request messages identified as being a part of a pattern of the active fraud event; and in response to automatically detecting the fraud active event, automatically apply one or more feature inputs to train at least one data pattern detection model to automatically reweight further scoring of incoming electronic transaction authorization request messages to account for the active fraud event. Claim 2 recites wherein the first time period and the second time period extend back from a common starting point, and wherein the at least one processor is further configured to set the common starting point to be one of a present time and a timestamp associated with the most recently received one of the scored electronic transaction authorization request messages. Accordingly, claim 2 recites a particular type of data to be applied for the processing of claim 1 Claim 3 recites to: provide, by the ratio striping engine, the ratios for each fraud score range stripe within each account range as the feature inputs to the at least one data pattern decision model; and execute the at least one data pattern detection model. Accordingly, claim 3 describes data to be inputted to process the method of claim 1. Claim 4 recites: wherein the at least one data pattern detection model is at least one of the first data pattern detection model or the intermediate data pattern decision model. Accordingly, claim 4 also describes data to be inputted to process or perform a mathematical function in the method of claim 1. Claim 5 recites: wherein the at least one processor is further configured to determine at least one of the plurality of account ranges based on a corresponding bank identification number (BIN). Accordingly, the determining of bank identification number which accordingly can be done mentally/manually and/or with a minimum search query or computer function. Claims 6 and 13 recite: wherein the at least one processor is further configured to output a potential fraud attack alert associated with all account numbers within the first account range. Accordingly, functions of outputting data involve an insignificant post solution activity. Claims 7 and 14 recite: wherein the cumulative metric is i) a tally of the scored electronic transaction authorization request messages within the respective time period, or ii) a cumulative total of transaction amounts within the respective time period. Accordingly, claims 7 and 14 recite a particular type of data which is neither a function, structure or means for performing any functions. Claim 8 recites: (currently amended) A computer-implemented method for detecting a pattern of fraudulent network events in a payment card network implemented using a computing device, said computing device including at least one memory storing computer-executable instructions that, upon execution by at least one processor, cause the at least one processor to implement first data pattern detection model for processing electronic transaction messages at an individual level and a ratio stripping engine for processing electronic transaction messages at n account-range level a merchant profiling engine and a ratio striping engine, said method comprising: continuously receiving, at the first data pattern detection model, a plurality of incoming electronic transaction authorization request messages, each including a respective account number; preliminarily scoring, by the merchant profiling engine each of the plurality of electronic transaction authorization request messages to generate a plurality of scored electronic transaction authorization request messages, each including the respective account number and a respective fraud score, wherein the respective fraud score is proportional to indicia of fraud present in an individual transaction corresponding to the respective electronic transaction authorization request message being scored; receiving, from at least one of the first data pattern detection model or an intermediate data pattern detection model implemented by the at least one processor to further score the plurality of electronic transaction authorization request messages, the plurality of scored electronic transaction authorization request messages; electronically sorting, by the ratio striping engine, the scored electronic transaction authorization request messages into a plurality of account ranges, wherein each of the account ranges includes the scored electronic transaction authorization request messages having the account number within the corresponding account range; electronically indexing, by the ratio striping engine, the scored electronic transaction authorization request messages within a table, stored in the at least one memory, for each of the account ranges into a plurality of fraud score range stripes based on the corresponding fraud score; calculating, for the scored electronic transaction authorization request messages within each fraud score range stripe within each account range stored in the table, a ratio of i) a cumulative metric for a first time period to ii) the cumulative metric for a second time period; automatically detecting, by the at least one processor, in near real-time relative to the first or second time periods and based on the calculated ratio for one of the fraud pattern score range stripes within the first account range satisfying a condition an active fraud event associated with a first account range of the account ranges; and in response to automatically detecting the active fraud event, automatically intercepting by the ratio striping engine, one or more incoming electronic transaction authorization request messages that include any account number within the first account range for implementing additional real-time fraud pattern detection operations by a dedicated fraud pattern detection computing device thereby causing additional real-time fraud detection operations to be strategically deployed on the intercepted one or more incoming transaction authorization request messages identified as being a part of a pattern of fraudulent network events; and in response to automatically detecting the active fraud event, automatically applying by the ratio striping engine, one or more feature inputs to train at least one data pattern detection model to automatically reweight further scoring of incoming electronic transaction authorization request messages to account for the active fraud event. Claims 9 and 16 recite wherein the first time period and the second time period extend back from a common starting point, and further comprising setting, by the at least one processor the common starting point to be one of a present time and a timestamp associated with the most recently received one of the scored electronic transaction authorization request messages. Accordingly, claims 9 and 16 recite a particular type of data to be applied for the processing of claim 8 and 15. Claims 10 and 17 recite: providing, by the at least one processor, the ratios for each fraud score pattern range stripe within each account range as the feature inputs to the at least one data pattern detection model; and executing, by the at least one processor, the at least one data pattern detection model. Claims 11 and 18 recite: further comprising calculating by the at least one processor, the ratios for each fraud pattern score range stripe within each account range, the feature inputs; and executing by the at least one processor, the at least one data pattern detection model. Accordingly, claims 10, 11, 17 and 18 describe data to be inputted to process or to perform a mathematical function in the method of claims 1 and 15. Claims 12 and 19 recite determining, by at least one processor, at least one of the plurality of account ranges based on a corresponding bank identification number (BIN). Accordingly, claims 12 and 19 merely recite the determining of bank identification number which accordingly can be done mentally/manually and/or with a minimum search query or computer function. Claims 13 and 20 recite outputting, by the at least one processor, a potential fraud attack alert associated with all account numbers within the first account range. Accordingly, functions of outputting data involve an insignificant post solution activity. The claimed concept as found in the amended claims still falls into the category of functions of organizing human activities such as managing commercial or legal interactions (including agreements in the form of contracts; legal obligations; advertising, marketing or sales activities or behaviors; business relations). The broadest reasonable interpretation (BRI) of these claims involves or describes a system and method for detecting a pattern of fraudulent events associated with one of a plurality of account ranges as determined for processing transaction. Step 2A, Prong Two: The judicial exception is not integrated into a practical application. In particular, the clams recite the above noted bolded limitations understood to be the additional limitations. In particular, the claimed “device”, “ratio stripping engine”, “processor” and “memory” are recited at a high level of generality such that they amount to no more than mere instructions to apply the exception using a generic component. Performing steps by a generic machine, computing device or one or more processors with memories merely limit the abstraction to a computer field by execution by generic computers. See MPEP 2106.05 (h). As noted in MPEP 2106.04(d), limitations which amount to instructions to implement an abstract idea on a computer or merely using a computer as a tool, limitations which amount to insignificant extra-solution activity, and limitations which amount to generally linking to a particular technological environment do not integrate a practical exception into a practical application. Consideration of these steps as a combination does not change the analysis as they do not add anything compared to when the steps are considered separately. The claims recite a particular sequence of functions for detecting a pattern of fraudulent events associated with one of a plurality of account ranges and in response to detecting the active fraud event, applying one or more feature inputs to train at least one data pattern detection model to reweight further scoring of incoming transaction authorization request messages to account for the active fraud event. Performance of these steps or functions technologically may present a meaningful limit to the scope of the claims does not reasonably integrate the abstraction into a practical application. Step 2B: The elements discussed above with respect to the practical application in Step 2A, prong 2 are equally applicable to consideration of whether the claims amount to significantly more. Accordingly, the claims fail to recite additional elements which, when considered individually and in combination, amount to significantly more. Reconsideration of these elements identified as insignificant extra-solution activity as part of Step 2B does not change the analysis. The functions of “receive” or “receiving”, and “apply” or “applying” and storing or retrieving of data have been recognized by the courts as routine, and conventional (See MPEP 2106.05(d)UD, citing Symantec, 835 F.3d at 1321, 120 OSPQ2d at 1362 (Utilizing an intermediary computer to forward information); TL Communications LEC v. AV Auto. LLC, 823 F.3d 607, G10, L18 USPO2d 1744, 1748 (ed. Cir. 2016) Casing a telephone for image transmission); OFF Techs., fac. v. Amazon.com, fic., 788 B.Ad 1359, 1363, Lis USPO2d 1090, 1093 (ed, Cir. 2015) (sending messages over a network}, buySAFE, fic. v. Google, Inc.. 768 F.3d 1350, 1355, 112 USPQ2d 1093, 1996 (Pod, Cyr. 2014) (computer receives and sends information over a network). Positively reciting a “processor” and a “memory” does not change the analysis as these aspects are properly considered as additional elements which amount to instructions to apply them with a computer. These claimed elements also as found in the dependent claims are also recited at a high level of generality such that they amount to no more than mere instructions to apply the exception using a generic component. In processing the claims, it is noted that the recitation of these additional elements does not impact the analysis of the claims because these elements in combination are noted only to be a general purpose computer for performing basic or routine computer functions. These claimed elements are noted to a be a generic computer for receiving data and performing routine and conventional functions. These additional elements do not overcome the analysis as these elements are merely considered as additional elements which amount to instructions to be applied to the generic computer. Applicant is reminded that a statutory claim would recite an automated machine implemented method or system with specific structures for performing the claimed invention so as to provide an improvement to another technology or technical field, an improvement to the functioning of the computer itself, or meaningful limitations beyond generally linking the use of an abstract idea to a particular technological environment. Each of independent claims 1, 8 and 15 as a whole, does not amount to significantly more than the abstract idea itself. This is because each claim does not effect an improvement to another technology or technical field; each claim does not amount to an improvement to the functioning of a computer itself; and each claim does not move beyond a general link of the use of an abstract idea to a particular technological environment. The judicial exception is not integrated into a practical application. In particular, the claimed “processors”, “memory”, “device” and “ratio striping engine” are recited at a high level of generality such they amount to no more than mere instructions to apply the exception using generic components. Accordingly, the additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. Accordingly, claims 1, 8 and 15 are directed to an abstract idea. The dependent claim(s) when analyzed and each taken as a whole are held to be patent ineligible under 35 U.S.C. 101 because the additional recited limitation(s) fail(s) to establish that the claim(s) is/are not directed to an abstract idea. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRANTZY POINVIL whose telephone number is (571)272-6797. The examiner can normally be reached M-Th 7:00AM to 5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Anderson can be reached at 571-270-0508. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /fp/ /FRANTZY POINVIL/Primary Examiner, Art Unit 3693 May 15, 2026
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Prosecution Timeline

Show 11 earlier events
Oct 13, 2025
Interview Requested
Oct 20, 2025
Applicant Interview (Telephonic)
Oct 24, 2025
Examiner Interview Summary
Nov 12, 2025
Request for Continued Examination
Nov 21, 2025
Response after Non-Final Action
Feb 09, 2026
Non-Final Rejection mailed — §101
Apr 29, 2026
Response Filed
Jun 29, 2026
Final Rejection mailed — §101 (current)

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Prosecution Projections

7-8
Expected OA Rounds
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Grant Probability
95%
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2y 11m (~0m remaining)
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