Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Non-Final Office Action
DETAILED ACTION
Examiner’s Notes
(a) Claim date: 07/11/2023.
(b) Priority date: 05/01/2023.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102 of this title, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the manner in which the invention was made.
Claims 1-6, 11-16, are rejected under 35 U.S.C. § 103 as being unpatentable over Goldie (US20210334445) in view of Ren (US20220027546).
(As to claim 1, 11, Goldie in view of Ren discloses)
1. (Original) An apparatus with circuit designing, comprising:
one or more processors configured to [Goldie, [0141], “processor”]:
generate an initial solution set based on nodes and edges comprised in a graph corresponding to a circuit to be optimized [ [0019]–[0021], FIG. 1: Goldie generates an initial placement of nodes on the surface of the chip (initial placement 132), disclosing generating an initial solution set based on nodes and edges of a graph corresponding to a circuit to be optimized];
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generate a crossover solution by performing a crossover operation based on a plurality of solutions comprised in the initial solution set [Ren, FIG. 6: discloses a genetic routing algorithm that performs a crossover operation to generate a descendant solution; it would have been obvious to apply this crossover operation to select a portion of solutions from the initial solution set and generate a crossover solution therefrom];
perform a first change of positions of nodes comprised in the crossover solution by performing a mutation operation on the crossover solution [Ren, [0062], FIG. 6: discloses a mutation operator that randomly selects a region in a candidate solution and modifies the routes therein; it would have been obvious to apply this mutation operation to change positions of nodes in the crossover solution]; and
generate a target circuit structure by performing a second change of the positions of the first changed nodes based on lengths of the edges connecting the nodes [Goldie, [0101]–[0103]; Ren, [0034]: Goldie disclosing performing a positional change based on wire lengths; Ren further discloses function may include total wiring cost; it would have been obvious to perform a local optimization step that changes node positions based on edge lengths to generate the target circuit structure].
(As to claim 2, 12, Goldie in view of Ren discloses)
2. (Original) The apparatus of claim 1, wherein the nodes comprised in the graph correspond to elements comprising the circuit, and the edges comprised in the graph correspond to wires connecting the elements
[Goldie, [0020]: disclosing that nodes correspond to circuit elements and edges correspond to wires connecting those elements].
(As to claim 3, 13, Goldie in view of Ren discloses)
3. (Original) The apparatus of claim 1, wherein, for the generating of the crossover solution, the one or more processors are configured to: select a portion of solutions from among the plurality of solutions comprised in the initial solution set; and generate the crossover solution by performing a crossover operation on the portion of solutions [Ren, [0056]–[0057], FIG. 6: discloses that candidate solutions with the highest fitness in generating a crossover solution by performing a crossover operation thereon; it would have been obvious to perform crossover on the portion of solutions (as disclosed earlier)].
(As to claim 4, 14, Goldie in view of Ren discloses)
4. (Original) The apparatus of claim 1, wherein, for the performing of the first change, the one or more processors are configured to:
randomly set node values for the nodes comprised in the crossover solution; and perform the first change of the positions of the nodes by comparing the node values to a threshold [Ren, [0062]; Goldie, [0083]: Ren discloses a mutation operator that randomly (with a probability) selects a region in the candidate layout for modification, thereby randomly assigning values to determine which nodes are subject to mutation; Goldie further discloses setting the score to zero for positions whose density value satisfies a threshold].
(As to claim 5, 15, Goldie in view of Ren discloses)
5. (Original) The apparatus of claim 4, wherein, for the performing of the first change of the positions of the nodes by comparing the node values to the threshold, the one or more processors are configured to perform the first change of the positions of nodes of which the node value is less than or equal to the threshold [Ren, [0062] “crossover, a mutation operator may randomly (with a probability of Prob.sub.m”; Goldie, [0083], It would have been obvious to perform the positional change for nodes whose randomly set value is less than or equal to the threshold, as this is the standard implementation of probability-based algorithms].
(As to claim 6, 16, Goldie in view of Ren discloses)
6. (Original) The apparatus of claim 1, wherein, for the generating of the target circuit structure, the one or more processors are configured to:
generate an intermediate solution set by performing local optimization by performing the second change of the positions of the first changed nodes [Goldie, [0045]–[0051]; Ren, [0053]–[0055], FIG. 6: Goldie discloses generating an initial placement then refining it through further placement steps including simulated annealing and greedy legalization ( [0049]–[0051]) thereby generating an intermediate solution through local optimization]; and
generate the target circuit structure by replacing the portion of solutions of the initial solution set with the intermediate solution set [Ren discloses that after crossover and mutation, the top K fitness solutions are selected to form the next generation (FIG. 6, line 15), thereby replacing the prior population with the optimized intermediate solution set; it would have been obvious to generate an intermediate solution set through local optimization of node positions and replace a portion of the initial solution set therewith to generate the target circuit structure].
Allowable Subject Matter
The following claims would be allowable if all rejections/objections cited in this office action (if any) are overcome and rewritten to include all of the limitations of the base claim and any intervening claims.The reason for this allowance is: the claimed subject matter could not have been anticipated or obviated using any prior arts.Allowable claims are: 7-10 and 17-20.
Conclusion
The prior art made of record in the form PTO-892 are not relied upon is considered pertinent to applicant's disclosure.Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.Contact information:Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMED ALAM whose telephone number is (571) 270-1507, email address: [mohammed.alam@uspto.gov] and fax number (571) 270-2507. The examiner can normally be reached on 10AM to 4PM (EST), Monday to Friday. If attempts to reach the examiner by telephone are unsuccessful, the Examiner's Supervisor, JACK CHIANG can be reached on (571) 272-7483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300./Mohammed Alam/Primary Examiner, Art Unit 2851
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