Prosecution Insights
Last updated: April 19, 2026
Application No. 18/352,602

PROCESSOR ARCHITECTURE AND MODEL EXPLORATION SYSTEM FOR DEEP LEARNING

Non-Final OA §102§112
Filed
Jul 14, 2023
Examiner
KING, JOHN B
Art Unit
2498
Tech Center
2400 — Computer Networks
Assignee
Groq Inc.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
3y 3m
To Grant
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
518 granted / 645 resolved
+22.3% vs TC avg
Strong +38% interview lift
Without
With
+38.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
10 currently pending
Career history
655
Total Applications
across all art units

Statute-Specific Performance

§101
14.1%
-25.9% vs TC avg
§103
46.3%
+6.3% vs TC avg
§102
9.2%
-30.8% vs TC avg
§112
19.4%
-20.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 645 resolved cases

Office Action

§102 §112
DETAILED ACTION The instant application having Application No. 18/352602 filed on July 14, 2023 is presented for examination by the examiner. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Internet Communications Applicant is encouraged to submit a written authorization for Internet communications (PTO/SB/439, found at http:/www.uspto.gov/sites/default/files/documents/sb0439.pdf) in the instant patent application to authorize the examiner to communicate with the applicant via email. The authorization will allow the examiner to better practice compact prosecution. The written authorization can be submitted via one of the following methods only: (1) Central Fax, which can be found in the Conclusion section of this Office action; (2) regular postal mail; (3) EFS WEB; or (4) the service window on the Alexandria campus. EFS web is the recommended way to submit the form since this allows the form to be entered into the file wrapper within the same day (system dependent). Written authorization submitted via other methods, such as direct fax to the examiner or email, will not be accepted. See MPEP § 502.03. Applicant is also encouraged to contact the Examiner for an Interview, should the Applicant determine that clarifying and further illustrating the distinguishing features of the instant application may further the prosecution. Drawings The applicant’s drawings submitted are acceptable for examination purposes. Claim Objections Claim 17 is objected to because of the following informalities: Claim 17 recites “latency; throughput constraint;”, which should be “latency, throughput constraint”. Appropriate correction is required. Claim Analysis – 35 USC § 112 (f) The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a hardware composer arranged to provide…”, “a software composer arranged to take …”, and “a performance calculator arranged to receive…” in claims 1-8. Claims 9-15 and 20 also recite similar limitations. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Since the claim limitation(s) invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, claim(s) 1-15 and 20 has/have been interpreted to cover the corresponding structure described in the specification that achieves the claimed function, and equivalents thereof. The specification does not appear to specifically recite the structure of the “hardware composer”, the “software composer”, or the “performance calculator”. Therefore, the claims are rejected under 112(b) for failing to clearly link or associate the disclosed structure to the claimed function such that one of ordinary skill in the art would recognize what structure is used to perform the claimed function. Please also see the 112(b) rejection below for further details. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-15, 17, and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 1 recites “a hardware composer arranged to provide”; however, it is unclear if the hardware composer is actually providing the processor architecture representation or not. For example, is the hardware composer performing the steps or merely arranging for the steps to be performed by another component. For the purpose of examination, the Examiner will interpret this limitation as meaning the hardware composer provides the processor architecture representation to a mapper module. Claim 1 recites “a software composer arranged to take the AI model and pass it to a compiler”; however, it is unclear if the software composer is actually sending the AI model to the compiler or not. For example, is the software composer performing the steps or merely arranging for the steps to be performed by another component. For the purpose of examination, the Examiner will interpret this limitation as meaning the software composer sends the AI model to a compiler. Claim 1 recites “a performance calculator arranged to receive results … and model performance”; however, it is unclear if the performance calculator is actually receiving the results and modeling the performance or not. For example, is the performance calculator performing the steps or merely arranging for the steps to be performed by another component. For the purpose of examination, the Examiner will interpret this limitation as meaning the performance calculator receives the results and models the performance of the AI model. Claim 1 recites “a device agnostic intermediate representation module that can be further mapped…”; however, it is unclear if the invention actually further maps the device agnostic intermediate representation module or not. Claim 1 recites “the hardware composer to permit respective adjustment of the AI model…”; however, it is unclear if the invention actually performs the adjustment of the AI model and the processor specific architecture or not. Claims 9 and 20 recite similar limitations as shown above for claim 1 and are rejected for the same reasons as shown above for claim 1. Dependent claims 2-8 and 10-15 are rejected for the same reasons as shown above and for being dependent on a previously rejected base claim. Claim 17 recites “die-area (costs)”; however, it is unclear if the term “costs” within the parenthesis is intended to be given any weight. For example, is this limitation referring to the costs of the die-area or something else. Claim limitations “a hardware composer arranged to provide…”, “a software composer arranged to take …”, and “a performance calculator arranged to receive…” in claims 1-8 and similar limitations in claims 9-15 and 20 invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Applicant may: (a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph; (b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)). If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either: (a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181. The examiner has cited particular examples of 35 U.S.C. 112 rejections above. It is respectfully requested that, in preparing responses, the applicant check the claims for further 35 U.S.C. 112 rejections in the event that it was inadvertently missed by the examiner to advance prosecution. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 16-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Honnavara-Prasad (US 10884485). As per claim 16, Honnavara-Prasad discloses A method of improving performance of a processor system and associated software, comprising: selecting a set of performance parameter targets for a processor architecture having a set of functional units and an AI model (Honnavara-Prasad, Figure 2 and associated texts such as cols. 3-5, teaches training and testing an AI models power consumption data.); evaluating performance of the processor architecture and the AI model (Honnavara-Prasad, Figure 2 and associated texts such as cols. 3-5, teaches training and testing an AI models power consumption data.); adjusting at least one of the functional units of the processor architecture to form a new processor architecture prior to iteratively evaluating the combination of the new processor architecture and the AI model (Honnavara-Prasad, Figure 2 and associated texts such as cols. 3-5, teaches optimizing the AI model based on the training and testing.); and repeating the evaluating step and the adjustment step until the performance evaluation of the processor architecture and the AI model meets the set of performance parameter targets (Honnavara-Prasad, col. 4 lines 44-61, teaches optimizing the AI model based on the power consumption analysis multiple times.) As per claim 17, Honnavara-Prasad discloses The method of claim 16, wherein selecting the performance parameters targets are at least one of consumed power, latency; throughput constraint; accuracy, die-area (costs) and thermal performance for the processor architecture (Honnavara-Prasad, Figure 2 and associated texts, teaches testing power consumption.) As per claim 18, Honnavara-Prasad discloses The method of claim 16, wherein the processor architecture is deterministic (Honnavara-Prasad, col. 4 lines 7-12, teaches that the system is deterministic.) As per claim 19, Honnavara-Prasad discloses The method of claim 16, wherein the processor architecture is a tensor streaming processor (Honnavara-Prasad, col. 3 lines 42-60, col. 5 lines 36-38, and claim 17, teaches representing the AI model as a tensorflow graph and also teaches a tensor streaming processor.) Allowable Subject Matter Claims 1, 9, and 20 are objected to as being allowable, but would be allowable if the 35 USC 112 Rejections and Claim Objections are overcome. The following is an examiner’s statement of reasons for allowance: The primary reason for the allowance of the claims is the inclusion of the limitation, inter alia, “a hardware composer arranged to provide a processor architecture representation to a mapper module; a software composer arranged to take the AI model and pass it to a compiler for conversion into a device agnostic intermediate representation module that can be further mapped by a mapper module onto the processor architecture representation; and a performance calculator arranged to receive results derived from the software composer and the hardware composer and model performance of the AI model on the processor architecture, with performance results being provided to the software composer and the hardware composer to permit respective adjustment of the AI model and the processor specific architecture". The closest prior art of record includes: Honnavara-Prasad (US 10884485) – teaches converting an AI model to be for a specific type of hardware or “circuit blocks in the AI processor”. Honnavara-Prasad also teaches training and testing the AI model to be optimized based on power consumption data. Aldana Lopez (US 2019/0095794) – teaches training a neural network processor using a learning rate calculated based on tuning parameters. Varadarajan (US 2019/0244139) – teaches automatic optimization for machine learning and deep learning models. Javaheri (US 2022/0058578) – teaches a device agnostic AI model. Sommer (US 2017/0357910) – teaches that an AI model can be device dependent or device independent. However, the combination of limitations as currently claimed cannot be found in the cited prior art of record. Claims 2-8 and 10-15 are objected to for the same reasons as cited above and for being dependent on a previously objected to base claim. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN B KING whose telephone number is (571)270-7310. The examiner can normally be reached on Monday-Friday 10AM-6PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yin-Chen Shaw can be reached on 5712728878. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /John B King/ Primary Examiner, Art Unit 2498
Read full office action

Prosecution Timeline

Jul 14, 2023
Application Filed
Mar 08, 2026
Non-Final Rejection — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+38.3%)
3y 3m
Median Time to Grant
Low
PTA Risk
Based on 645 resolved cases by this examiner. Grant probability derived from career allow rate.

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