CTNF 18/352,953 CTNF 93954 DETAILED ACTION 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. This action is responsive to the original application filed on 7/14/2023. Claim Objections 07-29-01 AIA Claim s 3-5 are objected to because of the following informalities: Claim 3 recites the limitation “ wherein logical observables crossed during expansion of the region are stored at respective empty nodes as bitmasks” (emphasis added) should read as “ wherein the logical observables crossed during expansion of the region are stored at respective empty nodes as bitmasks” (emphasis added) so that it is clear that the “logical observables” referenced in this limitation refer to the same “logical observables” referenced in claim 1. Dependent claims 4-5 depend on objected claim 3 , and are also objected to by virtue of this dependency . Appropriate correction is required. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 5 recites the limitation “computing a XOR of a bitmask stored at the node in the region that is connected to the empty node and a bitmask stored at the edge that connects the empty node to the region” (emphasis added). It is unclear as to which node “the node” refers to in this limitation, as there is insufficient antecedent basis for this term in the limitation. For examination purposes, the limitation will be interpreted to mean “computing a XOR of a bitmask stored at [[the]] a node in the region that is connected to the empty node and a bitmask stored at the edge that connects the empty node to the region” (emphasis added). Appropriate correction is required. Claim Rejections - 35 USC § 101 07-04-01 AIA 07-04 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 17 and 20 are rejected under 35 U.S.C. § 101 because the claimed invention is directed towards non-statutory subject matter. The claims do not fall within at least one of the four categories of patent eligible subjected matter because the claimed invention is directed towards signals per se . With respect to independent claims 17 and 20 , the originally filed specification fails to disavow any transitory signals as part of the claimed “computer-readable storage medium”. Specification, the originally filed specification at Page 25, ¶1 discloses “The computer readable medium may be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them … A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal that is generated to encode information for transmission to suitable receiver apparatus”. This recitation in the originally filed specification fails to explicitly disavow transitory signals as a part of the claimed “computer-readable storage medium” of claims 17 and 20. Under a broadest reasonable interpretation of the claim language, the “computer-readable storage medium” of claims 17 and 20 may encompass transitory signals, and are thus directed towards signals per se . Examiner suggests amending claims 17 and 20 to recite "A non-transitory computer-readable storage medium ". Appropriate correction is required. Claims 1-20 are further rejected under 35 U.S.C 101 because the claimed invention is directed to an abstract idea without significantly more. The analysis of the claims will follow the 2019 Revised Patent Subject Matter Eligibility Guidance, 84 Fed. Reg. 50 (“2019 PEG”). When considering subject matter eligibility under 35 U.S.C. 101, it must be determined whether the claim is directed to one of the four statutory categories of invention, i.e., process, machine, manufacture, or composition of matter (Step 1). If the claim does fall within one of the statutory categories, the second step in the analysis is to determine whether the claim is directed to a judicial exception (Step 2A). The Step 2A analysis is broken into two prongs. In the first prong (Step 2A, Prong 1), it is determined whether or not the claims recite a judicial exception (e.g., mathematical concepts, mental processes, certain methods of organizing human activity). If it is determined in Step 2A, Prong 1 that the claims recite a judicial exception, the analysis proceeds to the second prong (Step 2A, Prong 2), where it is determined whether or not the claims integrate the judicial exception into a practical application. If it is determined at step 2A, Prong 2 that the claims do not integrate the judicial exception into a practical application, the analysis proceeds to determining whether the claim is a patent-eligible application of the exception (Step 2B). If an abstract idea is present in the claim, any element or combination of elements in the claim must be sufficient to ensure that the claim integrates the judicial exception into a practical application, or else amounts to significantly more than the abstract idea itself. Claim 1 Step 1 : The claim recites a method; therefore, it is directed to the statutory category of a process. Step 2A Prong 1 : The claim recites, inter alia: initializing detection events that occur in the measurement data as source nodes of respective regions in a detector graph: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of initializing events as a node in a graph, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. For example, one can practically and mentally identify, initialize, and include event information as part of a generated graph. performing a decoding process on the detector graph, comprising modifying the regions in the detector graph until the decoding process terminates, wherein modifying the regions in the detector graph comprises: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of decoding a graph by modifying the graph, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. For example, one can practically and mentally decode or interpret a graph through making various modifications on the graph. expanding the region in the detector graph to include an empty node in the detector graph and to include an edge that connects the empty node to the region: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of expanding nodes of a graph to include empty nodes, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. For example, one can practically and mentally expand a graph to include empty nodes. computing a decoding output of the decoding process using one or more of the stored logical observables, wherein the decoding output predicts an occurrence of errors in the quantum computation: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mathematical concept of computing an output of a decoding process using logical observable information, which is performed through mathematical computation. Step 2A Prong 2 : The claim does not recite any additional limitations which integrate the abstract idea into a practical application. Specifically, the additional elements consist of “ and in response to expanding the region to include the empty node in the detector graph and the edge that connects the empty node to the region, storing, at the empty node: a pointer to a source detection event of the empty node and logical observables crossed during expansion of the region ”. The additional element “ and in response to expanding the region to include the empty node in the detector graph and the edge that connects the empty node to the region, storing, at the empty node: a pointer to a source detection event of the empty node and logical observables crossed during expansion of the region ” is an insignificant extra-solution activity required for any uses of the abstract ideas ( see MPEP § 2106.05(g)). Thus, even when viewed individually and as an ordered combination, these additional elements do not integrate the abstract idea into a practical application and the claim is thus directed to the abstract idea. Step 2B : Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional element “ and in response to expanding the region to include the empty node in the detector graph and the edge that connects the empty node to the region, storing, at the empty node: a pointer to a source detection event of the empty node and logical observables crossed during expansion of the region ” is an insignificant extra-solution activity required for any uses of the abstract ideas ( see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(II)(i); “Storing and retrieving information in memory”). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible. Claim 2 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional element of “ wherein the logical observables crossed during expansion of the region represent logical observables crossed along a shortest path from the source detection event to the empty node ” amounts to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 3 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional element of “ wherein logical observables crossed during expansion of the region are stored at respective empty nodes as bitmasks ” amounts to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 4 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional element of “ wherein the bitmasks comprise a fixed size, optionally wherein the size is 64 bits ” amounts to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 5 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites, inter alia: computing, for the empty node, the logical observables crossed during expansion of the region, the computing comprising: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mathematical concept of computing logical observables crossed during expansion, which is performed through mathematical computation. computing a XOR of a bitmask stored at the node in the region that is connected to the empty node and a bitmask stored at the edge that connects the empty node to the region: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mathematical concept of computing a XOR of a bitmask, which is performed through mathematical computation. Step 2A Prong 2, Step 2B : The additional elements of “ wherein: the bitmask stored at the node in the region that is connected to the empty node represents the logical observables crossed to reach the node from the source detection event, and the bitmask stored at the edge that connects the empty node to the region represents the logical observables crossed by the edge ” amount to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 6 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites, inter alia: expanding the first region in the detector graph to include a second region in the detector graph, wherein an edge in the detector graph connects a first node in the first region to a second node in the second region: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of expanding a region or area or element of a graph, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. in response to expanding the first region to include the second region: determining endpoints of a collision edge for the expansion using pointers to source detection events stored at the first node and at the second node, wherein the collision edge represents a shortest path between a first detection event in the first region and a second detection event in the second region: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of determining endpoints of an edge, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. computing a set of logical observables crossed during expansion of the first region using logical observables stored at the first node, second node, and the edge that connects the first node to the second node: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mathematical concept of computing logical observable information, which is performed through mathematical computation. Step 2A Prong 2, Step 2B : The additional element of “ storing the computed set of logical observables at the collision edge ” is an insignificant extra-solution activity required for any uses of the abstract ideas ( see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(II)(i); “Storing and retrieving information in memory”). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 7 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional element of “ wherein sets of logical observables crossed during expansion of the first region are stored as observables bitmasks ” amounts to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 8 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional element of “ wherein the bitmasks comprise a fixed size, optionally wherein the size is 64 bits ” amounts to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 9 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites, inter alia: computing a XOR of an observables bitmask stored at the first node, an observables bitmask stored at the second node, and an observables bitmask stored at the edge that connects the first node to the second node: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mathematical concept of computing a XOR of an observables bitmask, which is performed through mathematical computation. Step 2A Prong 2, Step 2B : The claim does not recite any additional elements that are sufficient to integrate the judicial exceptions into a practical application or amount to significantly more than the judicial exception. As such, the claim is ineligible. Claim 10 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional elements of “ wherein the pointer to the source detection event of the empty node and the logical observables crossed during expansion of the region are stored in a data structure, wherein the data structure stores dynamic data for each node in the detector graph, the data for each node comprising, at a time t during the decoding process: current neighboring edges of the node at the time t; and for each current neighboring edge of the node: a current weight of the neighboring edge; current logical observables flipped by the neighboring edge; a current neighboring node connected by the neighboring edge ” amount to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 11 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites, inter alia: updating respective data stored in the data structure: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of updating data, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. Step 2A Prong 2, Step 2B : The claim does not recite any additional elements that are sufficient to integrate the judicial exceptions into a practical application or amount to significantly more than the judicial exception. As such, the claim is ineligible. Claim 12 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional element of “ wherein the data structure further stores, for each node in the detector graph that is included in one or more of the regions: a pointer to an active region the node is contained in; and a radius of arrival for the node ” is an insignificant extra-solution activity required for any uses of the abstract ideas ( see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(II)(i); “Storing and retrieving information in memory”). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 13 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional element of “ wherein predictions of the occurrence of errors in the quantum computation comprises a prediction of crossed logical observables ” amounts to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 14 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites the abstract ideas of the preceding claims from which it depends. Step 2A Prong 2, Step 2B : The additional element of “ wherein the decoding process terminates when each region in the detector graph is matched to another region in the detector graph or to a boundary of the detector graph ” amounts to no more than generally linking the use of a judicial exception to a particular technological environment or field of use ( see MPEP § 2106.05(h). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 15 Step 1 : A process, as above. Step 2A Prong 1 : The claim recites, inter alia: identifying, for each pair of connected detection events in the detector graph, a shortest path between the pair of connected detection events: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of identifying a shortest path in a graph, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. adding the stored crossed logical observables: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of adding observables, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. Step 2A Prong 2, Step 2B : The additional element of “ retrieving, from a compressed edge on the shortest path, stored crossed logical observables for the path ” is an insignificant extra-solution activity required for any uses of the abstract ideas ( see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(II)(i); “Storing and retrieving information in memory”). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept, integrate the abstract ideas into a practical application, or provide significantly more than the abstract ideas of the claim and thus the claim is subject-matter ineligible. Claim 16 Claim 16 recites a system (step 1: a machine) using a data processing apparatus and non-transitory computer readable media to perform the steps of claim 1, which by MPEP 2106.05(f) (“apply it”) cannot integrate an abstract idea into a practical application or provide significantly more than the abstract idea by itself, and is thus rejected for the same reasons set forth in the rejection of claim 1. Claim 17 Claim 17 recites a computer-readable storage medium (step 1: a manufacture if it were directed towards a statutory category) using a processing device to perform the steps of claim 1, which by MPEP 2106.05(f) (“apply it”) cannot integrate an abstract idea into a practical application or provide significantly more than the abstract idea by itself, and is thus rejected for the same reasons set forth in the rejection of claim 1. Claim 18 Step 1 : The claim recites a method; therefore, it is directed to the statutory category of a process. Step 2A Prong 1 : The claim recites, inter alia: initializing detection events that occur in the measurement data as source nodes of respective regions in a detector graph: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of initializing events as a node in a graph, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. For example, one can practically and mentally identify, initialize, and include event information as part of a generated graph. performing a decoding process on the detector graph to determine a plurality of compressed paths between pairs of connected detection events that occur in the measurement data: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mental process of decoding a graph to determine compressed paths between events, which is an evaluation or observation that is practically capable of being performed in the human mind with the assistance of pen and paper. For example, one can practically and mentally decode or interpret a graph to determine compressed paths in the graph. computing a decoding output of the decoding process using the data stored by the detector graph, wherein the decoding output predicts logical observables that were flipped during the quantum computation: Under its broadest reasonable interpretation in light of the specification, this limitation encompasses the mathematical concept of computing an output of a decoding process using logical observable information, which is performed through mathematical computation. Step 2A Prong 2 : The claim does not recite any additional limitations which integrate the abstract idea into a practical application. Specifically, the additional elements consist of “ wherein the detector graph stores, for each compressed path, data specifying endpoints of the compressed path and logical observables flipped by the compressed path ”. The additional element “ wherein the detector graph stores, for each compressed path, data specifying endpoints of the compressed path and logical observables flipped by the compressed path ” is an insignificant extra-solution activity required for any uses of the abstract ideas ( see MPEP § 2106.05(g)). Thus, even when viewed individually and as an ordered combination, these additional elements do not integrate the abstract idea into a practical application and the claim is thus directed to the abstract idea. Step 2B : Finally, the claim taken as a whole does not contain an inventive concept which provides significantly more than the abstract idea. The additional element “ wherein the detector graph stores, for each compressed path, data specifying endpoints of the compressed path and logical observables flipped by the compressed path ” is an insignificant extra-solution activity required for any uses of the abstract ideas ( see MPEP § 2106.05(g)), and is a well-understood, routine, conventional activity (see MPEP § 2106.05(d)(II)(i); “Storing and retrieving information in memory”). Taken alone or in combination, the additional elements of the claim do not provide an inventive concept and thus the claim is subject-matter ineligible. Claim 19 Claim 19 recites a system (step 1: a machine) using a data processing apparatus and non-transitory computer readable media to perform the steps of claim 18, which by MPEP 2106.05(f) (“apply it”) cannot integrate an abstract idea into a practical application or provide significantly more than the abstract idea by itself, and is thus rejected for the same reasons set forth in the rejection of claim 18. Claim 20 Claim 20 recites a computer-readable storage medium (step 1: a manufacture if it were directed towards a statutory category) using a processing device to perform the steps of claim 18, which by MPEP 2106.05(f) (“apply it”) cannot integrate an abstract idea into a practical application or provide significantly more than the abstract idea by itself, and is thus rejected for the same reasons set forth in the rejection of claim 18. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1-20 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Higgot et al. (Higgott et al., “Sparse Blossom: correcting a million errors per core second with minimum-weight matching”, Mar, 28, 2023, arXiv:2303.15933v1, pp. 1-34, hereinafter “Higgott”) . Regarding claim 1 , Higgott discloses [a] computer implemented method for decoding measurement data received from a quantum computer that performs a quantum computation, the method comprising: (Abstract; “we introduce a fast implementation of the minimum-weight perfect matching (MWPM) decoder, the most widely used decoder for several important families of quantum error correcting codes, including surface codes. Our algorithm, which we call sparse blossom, is a variant of the blossom algorithm which directly solves the decoding problem relevant to quantum error correction” ; and §6) initializing detection events that occur in the measurement data as source nodes of respective regions in a detector graph; (§3.1.1, ¶1; “A graph fill region R of radius yR is an exploratory region of the detector graph. A graph fill region R contains the nodes and edges (or fractions of edges) in the detector graph which are within distance yR of its source. The source of a graph fill region is either a single detection event, or the surface of other graph fill regions forming a blossom. We will define blossoms later on, however for the case that the graph fill region R has a single detection event u as its source, every node or fraction of an edge that is within distance yR of u is contained in R" ) performing a decoding process on the detector graph, comprising modifying the regions in the detector graph until the decoding process terminates, (§3.1.7; “The algorithm proceeds along a timeline with the time t increasing monotonically as different events occur and are processed. Examples of events include a region arriving at a node, or colliding with another region. The time that each event occurs is determined based on the radius equations of the regions involved, as well as the structure of the graph. The algorithm terminates when there are no more events left to be processed, which happens when all regions have been matched, and have therefore become frozen” ) wherein modifying the regions in the detector graph comprises, for each of one or more of the regions: expanding the region in the detector graph to include an empty node in the detector graph and to include an edge that connects the empty node to the region; and (§3.4, ¶1; “The flooder is responsible for managing how graph fill regions grow, shrink or collide in the detector graph, and is not concerned with the structure of the alternating trees and blossoms, which is instead handled by the matcher. We refer to the events handled by the flooder as flooder events” ; and §3.4.3; “We give a small example of how the timeline of the flooder progresses in Figure 7. Since regions r1, r2 and r3 are all initialised at t = 0, their radius equations are all equal to t. Regions r1 and r2 are separated by a single edge with weight 8 and therefore collide at time t = 4 (and recall that edge weights are always even integers to ensure collisions occur at integer times). When the matcher is informed of the collision, r1 and r2 are matched and become frozen regions. Region r3 reaches empty node n1 and the boundary at the same time (t = 6), and so there are two equally valid sequences of events. Either region r3 matches to the boundary, and never reaches n1, or r3 reaches n1 and then matches to the boundary” ) in response to expanding the region to include the empty node in the detector graph and the edge that connects the empty node to the region, storing, at the empty node: a pointer to a source detection event of the empty node and logical observables crossed during expansion of the region; and (§3.4.4, ¶1-3; and Figure 8; “edge stores logical observables crossed between detection event” ) computing a decoding output of the decoding process using one or more of the stored logical observables, wherein the decoding output predicts an occurrence of errors in the quantum computation (§2.3, ¶3-4). Regarding claim 2 , the rejection of claim 1 is incorporated and Higgott further discloses wherein the logical observables crossed during expansion of the region represent logical observables crossed along a shortest path from the source detection event to the empty node (§3.1.3; and §3.4.4; and Figure 7). Regarding claim 3 , the rejection of claim 1 is incorporated and Higgott further discloses wherein logical observables crossed during expansion of the region are stored at respective empty nodes as bitmasks (§4, ¶1; and Figure 8). Regarding claim 4 , the rejection of claims 1 and 3 are incorporated and Higgott further discloses wherein the bitmasks comprise a fixed size, optionally wherein the size is 64 bits (§4, ¶1; and Figure 8). Regarding claim 5 , the rejection of claims 1 and 3 are incorporated and Higgott further discloses wherein the method further comprises computing, for the empty node, the logical observables crossed during expansion of the region, the computing comprising: computing a XOR of a bitmask stored at the node in the region that is connected to the empty node and a bitmask stored at the edge that connects the empty node to the region, wherein: the bitmask stored at the node in the region that is connected to the empty node represents the logical observables crossed to reach the node from the source detection event, and the bitmask stored at the edge that connects the empty node to the region represents the logical observables crossed by the edge (§3.4.4, ¶3; and Appendix A, ¶1). Regarding claim 6 , the rejection of claim 1 is incorporated and Higgott further discloses wherein modifying the regions in the detector graph further comprises, for each of one or more first regions: expanding the first region in the detector graph to include a second region in the detector graph, wherein an edge in the detector graph connects a first node in the first region to a second node in the second region; and in response to expanding the first region to include the second region: determining endpoints of a collision edge for the expansion using pointers to source detection events stored at the first node and at the second node, wherein the collision edge represents a shortest path between a first detection event in the first region and a second detection event in the second region; computing a set of logical observables crossed during expansion of the first region using logical observables stored at the first node, second node, and the edge that connects the first node to the second node; and storing the computed set of logical observables at the collision edge (§3.3, “Collision Edge”; and §3.4.4; and Figure 8, esp. also the caption). Regarding claim 7 , the rejection of claims 1 and 6 are incorporated and Higgott further discloses wherein sets of logical observables crossed during expansion of the first region are stored as observables bitmasks (§4, ¶1; and Figure 8). Regarding claim 8 , the rejection of claims 1, 6, and 7 are incorporated and Higgott further discloses wherein the bitmasks comprise a fixed size, optionally wherein the size is 64 bits (§4, ¶1; and Figure 8). Regarding claim 9 , the rejection of claims 1, 6, and 7 are incorporated and Higgott further discloses wherein computing the set of logical observables crossed during expansion of the first region using logical observables stored at the first node, second node, and the edge that connects the first node to the second node comprises: computing a XOR of an observables bitmask stored at the first node, an observables bitmask stored at the second node, and an observables bitmask stored at the edge that connects the first node to the second node (§3.4.4, ¶3; and Appendix A, ¶1). Regarding claim 10 , the rejection of claim 1 is incorporated and Higgott further discloses wherein the pointer to the source detection event of the empty node and the logical observables crossed during expansion of the region are stored in a data structure, wherein the data structure stores dynamic data for each node in the detector graph, the data for each node comprising, at a time t during the decoding process: current neighboring edges of the node at the time t; and for each current neighboring edge of the node: a current weight of the neighboring edge; current logical observables flipped by the neighboring edge; a current neighboring node connected by the neighboring edge (§4). Regarding claim 11 , the rejection of claims 1 and 10 are incorporated and Higgott further discloses wherein modifying the regions in the detector graph comprises updating respective data stored in the data structure (§4, “Data structures” and “region”). Regarding claim 12 , the rejection of claims 1 and 10 are incorporated and Higgott further discloses wherein the data structure further stores, for each node in the detector graph that is included in one or more of the regions:a pointer to an active region the node is contained in; and a radius of arrival for the node (§4, ¶2). Regarding claim 13 , the rejection of claim 1 is incorporated and Higgott further discloses wherein predictions of the occurrence of errors in the quantum computation comprises a prediction of crossed logical observables (Page 4, Penultimate ¶; and Page 31, ¶1; and Figure 13e). Regarding claim 14 , the rejection of claim 1 is incorporated and Higgott further discloses wherein the decoding process terminates when each region in the detector graph is matched to another region in the detector graph or to a boundary of the detector graph (§3.1.4). Regarding claim 15 , the rejection of claim 1 is incorporated and Higgott further discloses wherein computing a decoding output of the decoding process using one or more of the stored logical observables comprises: identifying, for each pair of connected detection events in the detector graph, a shortest path between the pair of connected detection events (§3.1.3; and §3.4.4; and Figure 7) for each shortest path, retrieving, from a compressed edge on the shortest path, stored crossed logical observables for the path; and adding the stored crossed logical observables (§4, ¶1; and Figure 8). Regarding claim 16 , it is a system claim corresponding to the steps of claim 1, and is rejected for the same reasons as claim 1. Regarding claim 17 , it is a computer-readable storage medium claim corresponding to the steps of claim 1, and is rejected for the same reasons as claim 1. Regarding claim 18 , Higgott discloses [a] computer implemented method for decoding measurement data received from a quantum computer that performs a quantum computation, the method comprising: (Abstract; “we introduce a fast implementation of the minimum-weight perfect matching (MWPM) decoder, the most widely used decoder for several important families of quantum error correcting codes, including surface codes. Our algorithm, which we call sparse blossom, is a variant of the blossom algorithm which directly solves the decoding problem relevant to quantum error correction” ; and §6) initializing detection events that occur in the measurement data as source nodes of respective regions in a detector graph; (§3.1.1, ¶1; “A graph fill region R of radius yR is an exploratory region of the detector graph. A graph fill region R contains the nodes and edges (or fractions of edges) in the detector graph which are within distance yR of its source. The source of a graph fill region is either a single detection event, or the surface of other graph fill regions forming a blossom. We will define blossoms later on, however for the case that the graph fill region R has a single detection event u as its source, every node or fraction of an edge that is within distance yR of u is contained in R" and §3.1.4; and §3.3, ¶1) performing a decoding process on the detector graph to determine a plurality of compressed paths between pairs of connected detection events that occur in the measurement data, (§3.1.3, §3.4.4; and Figure 7) wherein the detector graph stores, for each compressed path, data specifying endpoints of the compressed path and logical observables flipped by the compressed path (§4, ¶1; and Figure 8) computing a decoding output of the decoding process using the data stored by the detector graph, wherein the decoding output predicts logical observables that were flipped during the quantum computation (Page 4, penultimate ¶; and Page 31, ¶1; and Figure 13, esp. the caption). Regarding claim 19 , it is a system claim corresponding to the steps of claim 18, and is rejected for the same reasons as claim 18. Regarding claim 20 , it is a computer-readable storage medium claim corresponding to the steps of claim 18, and is rejected for the same reasons as claim 18. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Brent Hoover whose telephone number is (303)297-4403. The examiner can normally be reached Monday - Friday 9-5 MST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Abdullah Kawsar can be reached on 571-270-3169. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRENT JOHNSTON HOOVER/Primary Examiner, Art Unit 2127 Application/Control Number: 18/352,953 Page 2 Art Unit: 2127 Application/Control Number: 18/352,953 Page 3 Art Unit: 2127 Application/Control Number: 18/352,953 Page 4 Art Unit: 2127 Application/Control Number: 18/352,953 Page 5 Art Unit: 2127 Application/Control Number: 18/352,953 Page 6 Art Unit: 2127 Application/Control Number: 18/352,953 Page 7 Art Unit: 2127 Application/Control Number: 18/352,953 Page 8 Art Unit: 2127 Application/Control Number: 18/352,953 Page 9 Art Unit: 2127 Application/Control Number: 18/352,953 Page 10 Art Unit: 2127 Application/Control Number: 18/352,953 Page 11 Art Unit: 2127 Application/Control Number: 18/352,953 Page 12 Art Unit: 2127 Application/Control Number: 18/352,953 Page 13 Art Unit: 2127 Application/Control Number: 18/352,953 Page 14 Art Unit: 2127 Application/Control Number: 18/352,953 Page 15 Art Unit: 2127 Application/Control Number: 18/352,953 Page 16 Art Unit: 2127 Application/Control Number: 18/352,953 Page 17 Art Unit: 2127 Application/Control Number: 18/352,953 Page 18 Art Unit: 2127 Application/Control Number: 18/352,953 Page 19 Art Unit: 2127 Application/Control Number: 18/352,953 Page 20 Art Unit: 2127 Application/Control Number: 18/352,953 Page 21 Art Unit: 2127 Application/Control Number: 18/352,953 Page 22 Art Unit: 2127 Application/Control Number: 18/352,953 Page 23 Art Unit: 2127 Application/Control Number: 18/352,953 Page 24 Art Unit: 2127 Application/Control Number: 18/352,953 Page 25 Art Unit: 2127 Application/Control Number: 18/352,953 Page 26 Art Unit: 2127 Application/Control Number: 18/352,953 Page 27 Art Unit: 2127 Application/Control Number: 18/352,953 Page 28 Art Unit: 2127 Application/Control Number: 18/352,953 Page 29 Art Unit: 2127 Application/Control Number: 18/352,953 Page 30 Art Unit: 2127