DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) were submitted on 07/17/2023,
09/22/2023, 10/23/2023, 01/16/2024, 05/03/2024, 07/10/2024, 11/26/2024, 01/23/2025, 03/27/2025, 06/24/2025, 08/25/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Double Patenting
Statutory Double Patenting Rejection
A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957).
A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101.
Claims 21 and 23 are rejected under 35 U.S.C. 101 as claiming the same invention as that of Claims 1 and 20, respectively of prior U.S. Patent No. 11762050. This is a statutory double patenting rejection. As illustrated in Table 1 below, Examiner notes all elements of instant application Claim 21 are recited in Claim 1 in Patent No. 11762050; likewise all elements of Claim 23 are recited in Claim 20 (Patent No. 11762050). Examiner further notes instant application Claim 21 carries dependency to Claim 1, also included for reference in Table 1. Examiner notes term shown in bold, below in Table 1, Application Claim 1 and Claim 22 contain the phrase “for calibrating portions of the measurement system including a measurement channel”. Examiner asserts the additional phrase simply conveys intended use and does not alter metes and bounds or scope and intent of claim limitations recited in issued patent document.
TABLE 1: Application Claims 21 and 23 compared with Claims 1 and 20 from issued Pat No. 11762050
App. Claim 21 (Claim 1 incl. for reference)
Pat. No. 11762050 Claim 1
CLAIM 1-instant application
A measurement system comprising:
a source unit configured to provide a source signal to a sample, the source unit comprising:
at least one of a voltage source and a current source;
and a memory configured to store a source calibration;
a measurement unit configured to acquire from the sample a measurement signal responsive to the source signal, the measurement unit comprising:
at least one of a voltage measuring unit, a current
measuring unit, and a capacitance measuring unit; and a memory configured to store a measurement calibration;
and a control unit comprising:
a digital signal processing unit;
a source converter connected between the digital signal processing unit and the source unit;
a measurement converter connected between the digital signal processing unit and the measurement unit;
a synchronization unit configured to synchronize clocks of the digital signal processing unit, the source converter, and the measurement converter;
a calibration unit for calibrating the system;
and a reference voltage supply configured to supply a common reference voltage for the control unit for calibrating portions of the measurement system including a measurement channel.
CLAIM 1-PAT No. 11762050
A measurement system comprising:
a source unit configured to provide a source signal to a sample, the source unit comprising:
at least one of a voltage source and a current source;
and a memory configured to store a source calibration;
a measurement unit configured to acquire from the sample a measurement signal responsive to the source signal, the measurement unit comprising:
at least one of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit; and a memory configured to store a measurement calibration;
and a control unit comprising:
a digital signal processing unit;
a source converter connected between the digital signal processing unit and the source unit;
a measurement converter connected between the digital signal processing unit and the measurement unit;
a synchronization unit configured to synchronize clocks of the digital signal processing unit, the source converter, and the measurement converter;
a calibration unit for calibrating the system;
and a reference voltage supply configured to supply a common reference voltage for the control unit,
wherein the control unit is configured to:
calibrate a measurement channel against the common reference voltage;
command the source unit to apply a positive signal in place of the source signal;
measure, via the calibrated measurement channel, the commanded positive signal to yield a measured positive signal;
command the source unit to apply a negative signal in place of the source signal;
measure, via the calibrated measurement channel, the applied negative signal to yield a measured negative signal;
command the source unit to apply a zero signal in place of the source signal;
measure, via the calibrated measurement channel, the applied zero signal to yield a measured zero signal;
and generate a source unit calibration based on a difference between a first signal and a second signal,
wherein: the first signal comprises at least one of the commanded positive signal, the commanded negative signal, and the commanded zero signal;
and the second signal comprises at least one of the measured positive signal, the measured negative signal, and the measured zero signal.
CLAIM 21: The system of claim 1,
wherein the control unit is configured to:
calibrate the measurement channel against the common reference voltage;
command the source unit to apply a positive signal in place of the source signal;
measure, via the calibrated measurement channel, the commanded positive signal to yield a measured positive signal;
command the source unit to apply a negative signal in place of the source signal;
measure, via the calibrated measurement channel, the applied negative signal to yield a measured negative signal;
command the source unit to apply a zero signal in place of the source signal;
measure, via the calibrated measurement channel, the applied zero signal to yield a measured zero signal;
and generate a source unit calibration based on a difference between a first signal and a second signal,
wherein: the first signal comprises at least one of the commanded positive signal, the commanded negative signal, and the commanded zero signal;
and the second signal comprises at least one of the measured positive signal, the measured negative signal, and the measured zero signal.
App. Claim 23 (Claim 22 incl. for ref.)
Issue Pat No. 11762050 Claim 20
Instant App, Claim 22 - A method comprising:
providing a source signal to a sample via a source unit comprising:
at least one of a voltage source and a current source;
a memory configured to store a source calibration;
acquiring from the sample a measurement signal responsive to the source signal via a measurement unit,
the measurement unit comprising:
at least one of a voltage measuring unit, a current
measuring unit, and a capacitance measuring unit;
a memory configured to store a measurement calibration;
and receiving the measurement signal from the
measurement unit by a control unit,
the control unit comprising:
a digital signal processing unit; a source converter connected between the digital signal processing unit and the source unit;
a measurement converter connected between the digital signal processing unit and the measurement unit;
a synchronization unit configured to synchronize clocks of the digital signal processing unit, the source converter, and the measurement converter;
a calibration unit for calibrating aspects of the system including the control unit;
and a reference voltage supply configured to supply a common reference voltage for the control unit
for calibrating portions of the measurement
system including a measurement channel.
Instant App, Claim 23
The method of claim 22 further comprising:
calibrating, via the control unit, the measurement channel against the common reference voltage;
commanding, via the control unit, the source unit to apply a positive signal in place of the source signal;
measuring, via the calibrated measurement channel, the commanded positive signal to yield a measured positive signal;
commanding, via the control unit, the source unit to apply a negative signal in place of the source signal;
measuring, via the calibrated measurement channel, the applied negative signal to yield a measured negative signal;
commanding, via the control unit, the source unit to apply a zero signal in place of the source signal;
measuring, via the calibrated measurement channel, the applied zero signal to yield a measured zero signal; and generating, via the control unit, a source unit calibration based on a difference between a first signal and a second signal,
wherein: the first signal comprises at least one of the commanded positive signal, the commanded negative signal, and the commanded zero signal;
and the second signal comprises at least one of the measured positive signal, the measured negative signal, and the measured zero signal.
A method comprising:
providing a source signal to a sample via a source unit
comprising:
at least one of a voltage source and a current source;
a memory configured to store a source calibration;
acquiring from the sample a measurement signal responsive to the source signal via a measurement unit,
the measurement unit comprising:
at least one of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit;
a memory configured to store a measurement calibration; and receiving the measurement signal from the measurement unit by a control unit,
the control unit comprising:
a digital signal processing unit; a source converter connected between the digital signal processing unit and the source unit;
a measurement converter connected between the digital signal processing unit and the measurement unit;
a synchronization unit configured to synchronize clocks of the digital signal processing unit, the source converter, and the measurement converter;
a calibration unit for calibrating aspects of the system including the control unit;
and a reference voltage supply configured to supply a common reference voltage for the control unit;
calibrating, via the control unit, a measurement channel against the common reference voltage;
commanding, via the control unit, the source unit to apply a positive signal in place of the source signal;
measuring, via the calibrated measurement channel, the commanded positive signal to yield a measured positive signal;
commanding, via the control unit, the source unit to apply a negative signal in place of the source signal;
measuring, via the calibrated measurement channel, the applied negative signal to yield a measured negative signal;
commanding, via the control unit, the source unit to apply a zero signal in place of the source signal;
measuring, via the calibrated measurement channel, the applied zero signal to yield a measured zero signal; and generating, via the control unit, a source unit calibration based on a difference between a first signal and a second signal,
wherein: the first signal comprises at least one of the commanded positive signal, the commanded negative signal, and the commanded zero signal;
and the second signal comprises at least one of the measured positive signal, the measured negative signal, and the measured zero signal.
Nonstatutory Double Patenting Rejection
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20, and 22 rejected on the ground of nonstatutory double patenting as being unpatentable over Claims 1-20 of U.S. Patent No. 1176205. Although the claims at issue are not identical, they are not patentably distinct from each other because all elements recited in application claims 1-20 and 22 are recited in patented invention. Examiner points to Table 2, below for claim-to-claim analysis used for the follow rationale supporting nonstatutory double patenting rejection:
Pointing to language emphasized in bold (column 2), Claim 1 in issued Patent 11762050 recites additional language not recited in Application Claim 1. However, the additional language recited in issued Patent claim 1 is recited in application Claim 21, as discussed above.
Pointing to term emphasized in bold (column 1), Application Claim 1 includes the language “for calibrating portions of the measurement system including a measurement channel” which is not recited in issued Patent Claim 1. However, as noted above, this language is deemed to be direction at intended use, and thus does not change metes and bounds, nor scope or intent of the recited limitations when compared with issued Patent Claim 1.
Examiner notes comparison of language recited in Application Claims 2-17 is identical claim-to-claim when compared with language in issued Patent Claims 2-17.
Pointing to term emphasized in bold in issued Patent Claim 18 (Column 2), recited as “and a configurable display that is configured to display at least one of: real time oscilloscope readings; and frequency spectrum readings” is additional language not included in Application Claim 18. However, Examiner notes the limitation is recited in Application Claim 19, as emphasized in bold (column 1). Application Claims 18 and 19 carry dependency to Claim 1, as does issued patent Claim 18.
Pointing to Application Claim 22, term emphasized in bold (column 1), “for calibrating portions of the measurement system including a measurement channel” is not recited in issued Patent Claim 22. However, as noted above, this language is deemed to be directed at intended use, and thus does not change metes and bounds, nor scope and intent of limitations recited in issued Patent Claim 22, which recites all other language recited in Application Claim 22.
Examiner points to language in issued Patent Claim 20, emphasized in bold (Column 2), where language is recited in Application Claim 23, as noted above.
Table 2: Claim-to-claim comparison analysis for nonstatutory double patenting rejection
Instant App.18/353,425
Claims patented U.S. Pat 11762050
Claim 1: A measurement system comprising:
a source unit configured to provide a source signal to a sample, the source unit comprising:
at least one of a voltage source and a current source;
and a memory configured to store a source calibration;
a measurement unit configured to acquire from the sample a measurement signal responsive to the source signal, the measurement unit comprising:
at least one of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit;
and a memory configured to store a measurement calibration;
and a control unit comprising:
a digital signal processing unit;
a source converter connected between the digital signal
processing unit and the source unit;
a measurement converter connected between the digital signal processing unit and the measurement unit;
a synchronization unit configured to synchronize clocks of the digital signal processing unit, the source converter, and the measurement converter;
a calibration unit for calibrating the system;
and a reference voltage supply configured to supply a
common reference voltage for the control unit
for calibrating portions of the measurement
system including a measurement channel.
Claim 1: A measurement system comprising:
a source unit configured to provide a source signal to a sample, the source unit comprising:
at least one of a voltage source and a current source;
and a memory configured to store a source calibration;
a measurement unit configured to acquire from the sample a measurement signal responsive to the source signal, the measurement unit comprising:
at least one of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit;
and a memory configured to store a measurement calibration;
and a control unit comprising:
a digital signal processing unit;
a source converter connected between the digital signal
processing unit and the source unit;
a measurement converter connected between the digital
signal processing unit and the measurement unit;
a synchronization unit configured to synchronize clocks
of the digital signal processing unit, the source converter, and the measurement converter;
a calibration unit for calibrating the system;
and a reference voltage supply configured to supply a
common reference voltage for the control unit,
wherein the control unit is configured to:
calibrate a measurement channel against the common reference voltage;
command the source unit to apply a positive signal in place of the source signal;
measure, via the calibrated measurement channel, the commanded positive signal to yield a measured positive signal;
command the source unit to apply a negative signal in place of the source signal; measure, via the calibrated measurement channel, the applied negative signal to yield a measured negative signal;
command the source unit to apply a zero signal in place of the source signal;
measure, via the calibrated measurement channel, the applied zero signal to yield a measured zero signal;
and generate a source unit calibration based on a difference between a first signal and a second signal,
wherein: the first signal comprises at least one of the
commanded positive signal, the commanded negative signal, and the commanded zero signal;
and the second signal comprises at least one of the measured positive signal, the measured negative signal, and the measured zero signal.
Claim 2: The system of claim 1,
wherein the control unit is configured to obtain at least one of:
calibration data from a self-calibration performed by the source unit and the measurement unit;
calibration data from a stored factory calibration;
calibration data from a remote source via the Internet;
calibration data from a user input;
the source calibration data from the source unit;
and the measurement calibration data from the measurement unit.
Claim 2: The system of claim 1,
wherein the control unit is configured to obtain at least one of:
calibration data from a self-calibration performed by the source unit and the measurement unit;
calibration data from a stored factory calibration;
calibration data from a remote source via the Internet;
calibration data from a user input;
the source calibration data from the source unit;
and the measurement calibration data from the measurement unit.
Claim 3: The system of claim 1,
wherein the control unit is configured to obtain at least one of:
the source calibration and the measurement calibration periodically;
the source calibration from the memory of the source unit after the source unit is controlled not to provide the source signal to the sample;
the measurement calibration from the memory of the measurement unit after the measurement unit is controlled not to acquire a measurement signal from the sample;
and the source calibration and the measurement calibration concurrently.
Claim 3: The system of claim 1,
wherein the control unit is configured to obtain at least one of:
the source calibration and the measurement calibration periodically;
the source calibration from the memory of the source unit after the source unit is controlled not to provide the source signal to the sample;
the measurement calibration from the memory of the
measurement unit after the measurement unit is controlled not to acquire a measurement signal from the sample;
and the source calibration and the measurement calibration concurrently.
Claim 4: The system of claim 1,
wherein at least one of:
the digital signal processing unit stores calibration data for at least one of the control unit, the source unit, and the measurement unit;
the measurement and the source units are remotely located from the control unit and the digital signal processing unit;
the system comprises a first cable connecting the control unit to the measurement unit and a second cable connecting the control unit to the source unit;
digital signals in at least one of the measurement unit and the source unit are isolated from the control unit;
a measurement interface between the measurement unit and the control unit and a source interface between the source unit and the control unit are isolated from one another within a cable;
the system comprises a plurality of source units;
the system comprises a plurality of measurement units;
the source unit is configured to acquire the measurement signal;
and the measurement unit is configured to provide the source signal.
Claim 4: The system of claim 1,
wherein at least one of:
the digital signal processing unit stores calibration data for at least one of the control unit, the source unit, and the measurement unit;
the measurement and the source units are remotely located from the control unit and the digital signal processing unit;
the system comprises a first cable connecting the control unit to the measurement unit and a second cable connecting the control unit to the source unit;
digital signals in at least one of the measurement unit and the source unit are isolated from the control unit;
a measurement interface between the measurement unit and the control unit and a source interface between the source unit and the control unit are isolated from one another within a cable;
the system comprises a plurality of source units;
the system comprises a plurality of measurement units;
the source unit is configured to acquire the measurement signal;
and the measurement unit is configured to provide the source signal.
Claim 5: The system of claim 1,
wherein the current source is configured to measure a source current associated with the source signal via a sensing resistor and vary a resistance range of the sensing resistor according to a magnitude of the source current.
Claim 5: The system of claim 1,
wherein the current source is configured to measure a source current associated with the source signal via a sensing resistor and vary a resistance range of the sensing resistor according to a magnitude of the source current.
Claim 6: The system of claim 5,
further comprising at least one of:
a current source protection unit configured to determine whether the source current exceeds a threshold current and when the source current exceeds the threshold current, alter a feedback element of at least one of the source unit and the measurement unit so that the source current falls below the threshold current;
and a voltage source protection unit configured to determine whether a source voltage exceeds a threshold voltage and when the source voltage exceeds the threshold voltage, alter a feedback element of at least one of the source unit and the measurement unit so that the source voltage falls below the threshold voltage.
Claim 6: The system of claim 5,
further comprising at least one of:
a current source protection unit configured to determine whether the source current exceeds a threshold current and when the source current exceeds the threshold current, alter a feedback element of at least one of the source unit and the measurement unit so that the source current falls below the threshold current;
and a voltage source protection unit configured to determine whether a source voltage exceeds a threshold voltage and when the source voltage exceeds the threshold voltage, alter a feedback element of at least one of the source unit and the measurement unit so that the source voltage falls below the threshold voltage.
Claim 7: The system of claim 1,
wherein the synchronization unit is configured to synchronize the digital signal processing unit, the source converter, and the measurement converter with respect to an internal clock signal.
Claim 7: The system of claim 1,
wherein the synchronization unit is configured to synchronize the digital signal processing unit, the source converter, and the measurement converter with respect to an internal clock signal.
Claim 8: The system of claim 1,
wherein the digital signal processing unit is configured to provide timestamps for at least one of the measurement signal and the source signal.
Claim 8: The system of claim 1,
The system of claim 1, wherein the digital signal processing unit is configured to provide timestamps for at least one of the measurement signal and the source signal.
Claim 9: The system of claim 1,
wherein at least one of: the source unit is configured to deactivate non-analog circuitry in response to the source signal being provided;
and the measurement unit is configured to deactivate non-analog circuitry in response to the measurement signal being measured.
Claim 9: The system of claim 1,
wherein at least one of: the source unit is configured to
deactivate non-analog circuitry in response to the source signal being provided;
and the measurement unit is configured to deactivate non
analog circuitry in response to the measurement signal being measured.
Claim 10: The system of claim 1,
wherein the digital signal processing unit is configured to perform at least one of the following with respect to at least one of the measurement and the source signal:
a lock-in analysis;
an Alternating Current/Direct Current (AC/DC) measurement;
an inductance (L), a capacitance (C), and a resistance (R) (LCR) measurement;
a time/scope domain presentation;
a frequency domain analysis;
a noise analysis;
an AC/DC sourcing;
a control looping;
and providing the source signal from more than one source.
Claim 10: The system of claim 1,
wherein the digital signal processing unit is configured to perform at least one of the following with respect to at least one of the measurement and the source signal:
a lock-in analysis;
an Alternating Current/Direct Current (AC/DC)
measurement;
an inductance (L), a capacitance (C), and a resistance (R) (LCR) measurement;
a time/scope domain presentation;
a frequency domain analysis;
a noise analysis;
an AC/DC sourcing;
a control looping;
and providing the source signal from more than one source.
Claim 11: The system of claim 1,
comprising at least one of:
an interface between the source unit and the control unit comprising low impedance buffered analog signals;
an interface between the measurement unit and the control unit comprising a voltage mode analog signal interface with low impedance transmitting and high impedance receiving circuitry;
and an interface between the measurement unit and the control unit comprising a current mode analog signal interface with high output impedance transmitting and low impedance receiving circuitry.
Claim 11: The system of claim 1,
comprising at least one of:
an interface between the source unit and the control unit comprising low impedance buffered analog signals;
an interface between the measurement unit and the
control unit comprising a voltage mode analog signal interface with low impedance transmitting and high impedance receiving circuitry;
and an interface between the measurement unit and the control unit comprising a current mode analog signal interface with high output impedance transmitting and low impedance receiving circuitry
Claim 12: The system of claim 1,
wherein at least one of:
the system comprises a power supply is configured to
supply power to the control unit, the source unit, and
the measurement unit referenced to a common
ground;
the system comprises a power supply filter to at least one of the measurement unit and the source unit;
and at least one of the measurement unit and the source unit is powered from at least one of an isolated power converter from the control unit, an isolated external power source, and battery power.
Claim 12: The system of claim 1,
wherein at least one of:
the system comprises a power supply is configured to supply power to the control unit, the source unit, and the measurement unit referenced to a common ground;
the system comprises a power supply filter to at least one of the measurement unit and the source unit;
and at least one of the measurement unit and the source unit is powered from at least one of an isolated power converter from the control unit, an isolated external power source, and battery power
Claim 13: The system of claim 1,
wherein at least one of the source converter and the measurement converter comprises:
a gain chain configured to amplify an analog input signal;
a range selector configured to select a gain between the analog input signal and the multiple analog-to-digital converter (ADC) outputs,
wherein each ADC output has a path, and a gain of each output path is made up of gain stages in the gain chain;
and a mixer configured to combine the multiple ADC outputs into a single mixed output.
Claim 13: The system of claim 1,
wherein at least one of the source converter and the measurement converter comprises:
a gain chain configured to amplify an analog input signal;
a range selector configured to select a gain between the analog input signal and the multiple analog-to-digital converter (ADC) outputs,
wherein each ADC output has a path, and a gain of each output path is made up of gain stages in the gain chain;
and a mixer configured to combine the multiple ADC outputs into a single mixed output.
Claim 14: The system of claim 1,
wherein the source converter comprises:
two or more digital-to-analog converters (DAC) combined to generate one or more frequency components;
a first path for generating low frequency signals, the first path comprising a first one of the DACs;
a second path for generating high frequency signals, the second path comprising a second one of the DACs;
a data processor for processing an input signal;
a combining circuit configured to combine outputs of the first path and the second path into the source signal;
a feedback portion configured to sense the source signal; and a servo loop configured to employ the feedback portion to maintain the source signal with respect to the input signal.
Claim 14: The system of claim 1,
wherein the source converter comprises:
two or more digital-to-analog converters (DAC) combined to generate one or more frequency components;
a first path for generating low frequency signals, the first path comprising a first one of the DACs;
a second path for generating high frequency signals, the second path comprising a second one of the DACs;
a data processor for processing an input signal;
a combining circuit configured to combine outputs of the first path and the second path into the source signal;
a feedback portion configured to sense the source signal;
and a servo loop configured to employ the feedback portion to maintain the source signal with respect to the input signal.
Claim 15: The system of claim 1,
wherein the digital signal processing unit is configured to perform lock-in signal processing and wherein the lock-in signal processing unit is configured to at least one of:
be synchronized with the synchronization unit;
process at least one of a fundamental frequency and a harmonic frequency;
and provide a lock-in reference for communication between the control unit and at least one of the source unit and the measurement unit.
Claim 15: The system of claim 1,
wherein the digital signal processing unit is configured to perform lock-in signal processing and wherein the lock-in signal processing unit is configured to at least one of:
be synchronized with the synchronization unit;
process at least one of a fundamental frequency and a harmonic frequency;
and provide a lock-in reference for communication between the control unit and at least one of the source unit and the measurement unit.
Claim 16: The system of claim 1,
wherein the control unit is configured to measure a parameter of the source signal using a feedback signal that is one of a DC signal and a low frequency AC signal.
Claim 16: The system of claim 1,
wherein the control unit is configured to measure a parameter of the source signal using a feedback signal that is one of a DC signal and a low frequency AC signal.
Claim 17: The system of claim 1,
wherein the control unit is configured to assess a type of at least one of the measurement unit and the source unit and configure the digital signal processing unit according to the type.
Claim 17: The system of claim 1,
wherein the control unit is configured to assess a type of at least one of the measurement unit and the source unit and configure the digital signal processing unit according to the type.
Claim 18: The system of claim 1,
further comprising
an enclosure for at least one of the source unit and the measurement unit, the enclosure comprising at least one of electrostatic shielding and magnetic shielding.
Claim 18: The system of claim 1,
further comprising at least one of:
an enclosure for at least one of the source unit and the measurement unit, the enclosure comprising at least one of electrostatic shielding and magnetic shielding;
and a configurable display that is configured to display at least one of: real time oscilloscope readings; and frequency spectrum readings.
Claim 19: The system of claim 1,
further comprising
a configurable display that is configured to display at least one of: real time oscilloscope readings; and frequency spectrum readings.
Claim 20: The system of claim 1,
wherein the control unit is configured to perform at least one of:
a voltage measure mode calibration for a measurement unit by:
measuring an offset error at the measurement unit;
storing the offset error in the memory of the measurement unit;
connecting an amplifier associated with the measurement unit to a reference voltage; measuring, via the control unit, a gain error from applying the reference voltage to the amplifier;
storing the measured gain error in the memory of the measurement unit;
reading, via the control unit, at least one of the stored gain error from the memory of the measurement unit;
and applying at least one of the offset error and the gain error to correct a voltage measurement;
and a current mode measure calibration for the
measurement unit by:
disconnecting input connectors of the control unit;
connecting input connectors of the measurement unit to ground;
configuring the measurement unit in a voltage measure mode;
measuring voltage offset errors of an amplifier via the measurement unit in voltage measure mode;
applying an analog correction to decrease the measured voltage offset errors;
switching the measurement unit to a current measure mode and floating inputs to the measurement unit;
determining, via the control unit, voltage offset errors between the measurement unit and the control unit by configuring the measurement unit in a high current range and measuring a resultant voltage at the control unit;
adjusting a leakage current until a current measurement of the measurement unit is decreased;
storing, via the control unit, at least one of the adjusted leakage current and the voltage offset errors in the memory of the measurement unit;
reading, via the control unit, at least one of the adjusted leakage current and the voltage offset errors;
and applying at least one of the adjusted leakage current and the voltage offset errors to correct a current measurement of the measurement unit.
Claim 19: The system of claim 1,
wherein the control unit is configured to perform at least one of:
a voltage measure mode calibration for a measurement unit by:
measuring an offset error at the measurement unit;
storing the offset error in the memory of the measurement unit;
connecting an amplifier associated with the measurement unit to a reference voltage; measuring, via the control unit, a gain error from applying the reference voltage to the amplifier;
storing the measured gain error in the memory of the measurement unit;
reading, via the control unit, at least one of the stored gain error from the memory of the measurement unit;
and applying at least one of the offset error and the gain error to correct a voltage measurement;
and a current mode measure calibration for the
measurement unit by:
disconnecting input connectors of the control unit;
connecting input connectors of the measurement unit to ground;
configuring the measurement unit in a voltage measure mode;
measuring voltage offset errors of an amplifier via the measurement unit in voltage measure mode;
applying an analog correction to decrease the measured voltage offset errors;
switching the measurement unit to a current measure mode and floating inputs to the measurement unit;
determining, via the control unit, voltage offset errors between the measurement unit and the control unit by configuring the measurement unit in a high current range and measuring a resultant voltage at the control unit;
adjusting a leakage current until a current measurement of the measurement unit is decreased;
storing, via the control unit, at least one of the adjusted leakage current and the voltage offset errors in the memory of the measurement unit;
reading, via the control unit, at least one of the adjusted leakage current and the voltage offset errors;
and applying at least one of the adjusted leakage current and the voltage offset errors to correct a current measurement of the measurement unit.
Claim 22: A method comprising:
providing a source signal to a sample via a source unit comprising:
at least one of a voltage source and a current source;
a memory configured to store a source calibration; acquiring from the sample a measurement signal responsive to the source signal via a measurement unit,
the measurement unit comprising:
at least one of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit;
a memory configured to store a measurement calibration;
and receiving the measurement signal from the
measurement unit by a control unit,
the control unit comprising:
a digital signal processing unit;
a source converter connected between the digital signal processing unit and the source unit;
a measurement converter connected between the digital signal processing unit and the measurement unit;
a synchronization unit configured to synchronize clocks of the digital signal processing unit, the source converter, and the measurement converter;
a calibration unit for calibrating aspects of the system including the control unit; and a reference voltage supply configured to supply a common reference voltage for the control unit for calibrating portions of the measurement system including a measurement channel.
Claim 20: A method comprising:
providing a source signal to a sample via a source unit comprising:
at least one of a voltage source and a current source;
a memory configured to store a source calibration; acquiring from the sample a measurement signal responsive to the source signal via a measurement unit,
the measurement unit comprising:
at least one of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit;
a memory configured to store a measurement calibration;
and receiving the measurement signal from the measurement unit by a control unit,
the control unit comprising:
a digital signal processing unit;
a source converter connected between the digital signal processing unit and the source unit;
a measurement converter connected between the digital signal processing unit and the measurement unit;
a synchronization unit configured to synchronize clocks of the digital signal processing unit, the source converter, and the measurement converter;
a calibration unit for calibrating aspects of the system including the control unit; and a reference voltage supply configured to supply a common reference voltage for the control unit;
calibrating, via the control unit, a measurement channel against the common reference voltage;
commanding, via the control unit, the source unit to apply a positive signal in place of the source signal;
measuring, via the calibrated measurement channel, the commanded positive signal to yield a measured positive signal;
commanding, via the control unit, the source unit to apply a negative signal in place of the source signal;
measuring, via the calibrated measurement channel, the applied negative signal to yield a measured negative signal;
commanding, via the control unit, the source unit to apply a zero signal in place of the source signal;
measuring, via the calibrated measurement channel, the applied zero signal to yield a measured zero signal;
and generating, via the control unit, a source unit calibration based on a difference between a first signal and a second signal, wherein:
the first signal comprises at least one of the commanded positive signal, the commanded negative signal, and the commanded zero signal;
and the second signal comprises at least one of the measured positive signal, the measured negative signal, and the measured zero signal.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 and 22 recite “at least one of a voltage source and a current source” and “at least one of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit”. It is unclear from the claim language whether the claim requires at least one each of a voltage source and a current source and at least one each of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit, or if the claim requires at least one of a voltage source or a current source and at least one of a voltage measuring unit, a current measuring unit, or a capacitance measuring unit. For purposes of examination, the second interpretation with or will be used. Dependent claims 2-21 and 23 are similarly rejected.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Examiner notes application of guidance found in MPEP 2141 in determination of obviousness under 35 U.S.C. 103. Specifically, factual inquiry steps described in 2141 (II): “An invention that would have been obvious to a person of ordinary skill at the relevant time is not patentable. See 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a). As reiterated by the Supreme Court in KSR, the framework for the objective analysis for determining obviousness under 35 U.S.C. 103 is stated in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966). Obviousness is a question of law based on underlying factual inquiries.” Further, the following steps for factual inquiries were used in evaluation of prior art used for obviousness rejection:
(A) Determining the scope and content of the prior art;
(B) Ascertaining the differences between the claimed invention and the prior art; and
(C) Resolving the level of ordinary skill in the pertinent art.
Claims 1-4, 7-8, 10-12, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over WITT (US 9575105 B1) in view of PASSERINI (US 20130033947 A1).
With respect to Claim 1, WITT teaches:
A measurement system
(See WITT, Abstract: “invention enable low-power accurate measurement of complex impedance at a range of frequencies of interest to determine a frequency response of a test sample”; and refer to FIG.3: “schematic of an exemplary system”)
comprising: a source unit configured to provide a source signal to a sample,
(WITT teaches a source unit, refer to FIG. 3, element 210; and refer to FIG. 2, with description of components/function in Col. 3, lines 50-: “digital representation of an AC excitation 202…provides a stimulus to digital-to-analog converter (DAC) 204, DC blocking capacitor 206, sample under test (DUT) 210”),
the source unit comprising: at least one of a voltage source;
(WITT teaches voltage source to sample under test, refer to FIG. 3, Col. 5, lines 22-24: “sinusoidal voltage x(t)=cos(2πFc.Math.t) is applied to test load 210”; and teaches current source)
and a memory configured to store a source calibration;
(WITT teaches use of standard computational components used in a measurement system, see, for example, voltage source to sample under test, refer to FIG. 3, with Col4,lines42-43, “FIG. 3, circuit 300 comprises memory”)
a measurement unit configured to acquire from the sample a measurement signal responsive to the source signal,
(WITT teaches measurement unit, refer to FIG. 3, element 226; teaches acquiring data from sample, FIG. 3, element 226; with a signal in response to source applied, see FIG. 3, with Col3,lines65-66, “signal is passed through sample under test 210”)
the measurement unit comprising: at least one of a voltage measuring unit, a current measuring unit, and a capacitance measuring unit;
(WITT teaches at least a voltage measuring u