DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is a response to the amendment filed on 7/20/2026.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 21, 22 and 25 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lopez et al. (PGPub 2023/0411262 A1).
Lopez et al. teach a process of packaging microelectronic devices, comprising steps of: forming a redistribution layer (779, Fig. 7B) on a printed circuit panel (773, Fig. 7A and 7B), wherein the redistribution layer electrically is connected to vias (777, Fig. 7B) of the printed circuit panel; supporting a plurality of microelectronic dice on the redistribution layer (paragraphs [0068]-[0071]); electrically connecting respective microelectronic dice (702) of the plurality of microelectronic dice to the redistribution layer as shown in Fig. 7D (paragraphs [0073]-[0074]); and singulating microelectronic device packages from the printed circuit panel, respective microelectronic device packages comprising at least one microelectronic die (700, Figs. 7F-7G) of the plurality of microelectronic dice and a portion of the printed circuit panel (paragraphs [0077]-[0078]).
Re. claim 23: Electrically connecting respective microelectronic dice of the plurality of microelectronic dice to the redistribution layer comprises reflowing electrically conductive material extending from respective microelectronic dice of the plurality of microelectronic dice to the redistribution layer (see also paragraph [0074]).
Re. claim 25: The plurality of microelectronic dice is placed in flip-chip orientations when supporting the plurality of microelectronic dice on the redistribution layer (see paragraph [0073]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Lopez et al. as applied to claim 21 above, and further in view of Koopmans (US PAT. 6,845,901).
Lopez et al. teach all limitations as set forth above, but silent a laser toward the electrically conductive material to reflow the electrically conductive material (as per claim 23). Koopmans teaches a process of packaging microelectronic devices including a process of a laser toward a solder paste (equivalent with an electrically conductive material) to reflow the solder paste in order to deposit the solder paste (equivalent with an electrically conductive material) to the microelectronic devices (see also col. 2, lines 41-59). Therefore, it would have been obvious to one of ordinary skill in the art, at the time of the effective filing date of the claimed invention was made, to a person having ordinary skill in the art to modify a process of packaging microelectronic devices of Lopez et al. by reflowing electrically conductive material as taught by Koopmans in order to deposit the solder paste (equivalent with an electrically conductive material) to the microelectronic devices.
Allowable Subject Matter
Claims 26 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant's arguments filed 7/20/2026 have been fully considered but they are not persuasive. Applicant argues that the prior art of record fails to disclose the claimed invention such as “forming a redistribution layer on a printed circuit panel, the redistribution layer electrically connected to vias of the printed circuit panel”. The printed circuit panel of Lopez et al. is not the same printed circuit panel of the claimed invention. Examiner traverses the argument. The examiner asserts that the claims have been given their broadest reasonable interpretation, without reading limitations from the specification into the claims. In re Zletz, 893 F. 2d 319, 312-322, 13 USPQ2d 1320, 1322 (Fed. Cir. 1989). Since there is no specific structure definition in the body of the claim of what the printed circuit panel is. Since it has been held that where the general conditions of a claim are disclosed in the prior art, defining the printed circuit panel involves only routine skill in the art. MPEP 2144.04 (il-A). It is generally known to the person skilled in the art that both printed circuit panels of the prior art and the claimed invention are equivalent and can be interchanged with one another where circumstances make it desirable. Therefore, Lopez et al. teach all limitations as set forth above and maintains his rejection.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL D KIM whose telephone number is (571)272-4565. The examiner can normally be reached Monday-Friday: 6:00 AM-2:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hong can be reached at 571-272-0993. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PAUL D KIM/Primary Examiner, Art Unit 3729
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