DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 10-13, and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Behrends et al. (US PGPub No. 2010/0188886 A1), hereinafter referred to as BEHRENDS, in view of MA et al. (NPL: RBER-Aware Lifetime Prediction Scheme for 3D-TLC NAND Flash Memory)
Consider Claim 1,
BEHRENDS teaches a method for extending life expectancy of a volatile memory device, the method comprising:
executing, by control logic that is coupled to memory cells included in the volatile memory device (BEHRENDS, e.g., Fig 2, shows coupled control logic), operations comprising:
performing a life test for the memory cells included in the volatile memory device (BEHRENDS, e.g., Fig 1(102), perform cell stability test.);
determining whether the memory cells have a normal life state or a shrink-life state indicating a life expectancy that is reduced relative to the normal life state based on a result of the life test (BEHRENDS, e.g., Fig 1(104), determine if cells are stable (i.e., normal) or unstable (i.e., shrink-life).); and
decreasing a wordline voltage, which is applied to a wordline connected to the memory cells, to a first voltage that is less than a second voltage that is applied to the wordline in the normal life state during a read operation or a write operation responsive to determining that the memory cells have the shrink-life state (BEHRENDS, e.g., Fig 1, if unstable (i.e., shrink-life) then reduce wordline voltage.).
BEHRENDS fails to expressly describe wherein the determination is related to a prediction. MA is directed towards systems and methods for managing memory lifetime and is considered analogous prior art. MA does describe predicting life expectancies (MA, e.g., Abstract). It would have been obvious to a person of ordinary skill in the art, prior to the effective filing date of the claimed invention because it permits intervention prior to stability failure.
Consider Claim 2,
The combination of BEHRENDS and MA further teaches the method of claim 1, but fails to expressly describe iteratively performing the life test to monitor the result of the life test responsive to determining that the memory cells have the normal life state. The examiner takes official notice of the fact that periodic testing for faults is notoriously well-known in the computer arts. Therefore, it would have been obvious to a person of ordinary skill in the art, prior to the effective filing date of the claimed invention, to modify the system of BEHRENDS and MA to iteratively performing the life test to monitor the result of the life test responsive to determining that the memory cells have the normal life state because it enables detection of failures over the lifetime of the product instead of just a single moment.
Consider Claim 10,
The combination of BEHRENDS and MA further teaches a method for extending life expectancy of a volatile memory device, the method comprising:
executing, by control logic that is coupled to memory cells included in the volatile memory device (BEHRENDS, e.g., Fig 2, shows coupled control logic), operations comprising:
performing a life test for the memory cells included in the volatile memory device (BEHRENDS, e.g., Fig 1(102), perform cell stability test.);
determining whether the memory cells have a normal life state or a shrink-life state indicating a life expectancy that is reduced relative to the normal life state based on a result of the life test (BEHRENDS, e.g., Fig 1(104), determine if cells are stable (i.e., normal) or unstable (i.e., shrink-life).); and
receiving a second supply voltage that is less than a first supply voltage supplied in the normal life state from a memory controller responsive to determining that the memory cells have the shrink-life state (BEHRENDS, e.g., Fig 1, if unstable (i.e., shrink-life) then reduce wordline voltage.).
BEHRENDS fails to expressly describe wherein the determination is related to a prediction. MA is directed towards systems and methods for managing memory lifetime and is considered analogous prior art. MA does describe predicting life expectancies (MA, e.g., Abstract). It would have been obvious to a person of ordinary skill in the art, prior to the effective filing date of the claimed invention because it permits intervention prior to stability failure.
Consider Claim 11,
The combination of BEHRENDS and MA further teaches wherein the operations further comprise: transmitting a life-extend-control signal to the memory controller responsive to determining that the memory cells are in the shrink-life state (BEHRENDS, e.g., ¶0018, recording a voltage level setting is considered analogous to a life-extend-control-signal.); and receiving the second supply voltage that is less than the first supply voltage supplied in the normal life state from the memory controller responsive to transmitting the life-extend- control signal (BEHRENDS, e.g., ¶0022, responsive to receiving the voltage setting, the memory control circuits supply a reduced voltage.).
Consider Claim 12,
The combination of BEHRENDS and MA further teaches wherein the second supply voltage decreases in a stepwise fashion compared with the first supply voltage (BEHRENDS, e.g., Fig 2; ¶0022-0023, describes discrete elements which would produce a stepwise/graded decrease.).
Consider Claim 13,
The combination of BEHRENDS and MA further teaches wherein the second supply voltage decreases in a graded fashion compared with the first supply voltage (BEHRENDS, e.g., Fig 2; ¶0022-0023, describes discrete elements which would produce a stepwise/graded decrease.).
Consider Claim 16,
The combination of BEHRENDS and MA further teaches the method of claim 10, but fails to expressly describe iteratively performing the life test to monitor the result of the life test responsive to determining that the memory cells have the normal life state. The examiner takes official notice of the fact that periodic testing for faults is notoriously well-known in the computer arts. Therefore, it would have been obvious to a person of ordinary skill in the art, prior to the effective filing date of the claimed invention, to modify the system of BEHRENDS and MA to iteratively performing the life test to monitor the result of the life test responsive to determining that the memory cells have the normal life state because it enables detection of failures over the lifetime of the product instead of just a single moment.
Consider Claim 17,
BEHRENDS teaches a method for extending life expectancy of a volatile memory device, the method comprising:
executing, by control logic that is coupled to memory cells included in the volatile memory device(BEHRENDS, e.g., Fig 2, shows coupled control logic), operations comprising:
verifying whether a state of the volatile memory device satisfies a first condition (BEHRENDS, e.g., Fig 1(102), perform cell stability test.);
performing a life test for the memory cells included in the volatile memory device when the state of the volatile memory device satisfies the first condition (BEHRENDS, e.g., Fig 1, if cells are stable (i.e., first condition) then test cell performance.);
verifying whether the state of the volatile memory device satisfies in a second condition (BEHRENDS, e.g., Fig 1(102), perform cell stability test.);
decreasing a wordline voltage, which is applied to a wordline connected to the memory cells, to a first voltage that is less than a second voltage that is applied to the wordline in a normal life state during a read operation or a write operation when the state of the volatile memory device satisfies the second condition (BEHRENDS, e.g., Fig 1, if unstable (i.e., second condition) then reduce wordline voltage.).
BEHRENDS fails to expressly describe wherein the determination is related to a prediction. MA is directed towards systems and methods for managing memory lifetime and is considered analogous prior art. MA does describe predicting life expectancies (MA, e.g., Abstract). It would have been obvious to a person of ordinary skill in the art, prior to the effective filing date of the claimed invention because it permits intervention prior to stability failure.
Consider Claim 18,
The combination of BEHRENDS and MA further teaches wherein the operations further comprise: receiving a condition command from a memory controller when the state of the volatile memory device does not satisfy the first condition (BEHRENDS, e.g., Fig 1, If stability fails, memory control elements are instructed to condition the wordline voltage.).
Consider Claim 19,
The combination of BEHRENDS and MA further teaches wherein the wordline voltage is less than the second voltage that is supplied in the normal life state, or a second supply voltage received from the memory controller is less than a first supply voltage that is supplied in the normal life state during the read operation or the write operation when the condition command includes a life-extend-control signal (BEHRENDS, e.g., Fig 1, reduce wordline voltage in response to condition instruction.).
Consider Claim 20,
The combination of BEHRENDS and MA further teaches wherein the operations further comprise: receiving a second supply voltage that is less than a first supply voltage that is supplied in the normal life state from a memory controller when the state of the volatile memory device does not satisfy the second condition (BEHRENDS, e.g., Fig 1, when prior adjustments have been executed the cell may no longer be unstable (i.e., does not meet the second condition), but the second supply voltage is now less than the first supply voltage.).
Allowable Subject Matter
Claims 3-9, 14, and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s arguments with respect to the instant have been considered but are moot in view of the new grounds of rejection necessitated by the applicant’s amendment.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Gary W Cygiel whose telephone number is (571)270-1170. The examiner can normally be reached Monday - Thursday 11am-3pm PST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan P Savla can be reached at (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Gary W. Cygiel/Primary Examiner, Art Unit 2137