DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
No amendment to the claims was submitted.
Applicant’s arguments on pages 5-8, filed 7/24/2026 with respect to U.S.C. 101 rejection of claims 1-20 have been fully considered but they are not considered persuasive.
Applicant argues that the limitations are not mental or mathematical in nature because the operations in the limitation require automated, physical, closed-loop bidirectional communications between a host controller and an electronic DUT/circuit over serial lines.
The examiner respectfully disagrees. Based on the wording of the limitations, one or ordinary skill in the art can mentally detect text patterns as they appear, and perform an action based on said patterns. For at least these reason, Applicant’s argument is unpersuasive.
Applicant argues that the limitations present significantly more than an abstract idea as it provides a technical improvement to the field of electronic device testing.
Examiner respectfully disagrees. Although the recited abstract limitations may improve the result output by a computer, there is no improvement in the functioning of the computer. Similar to the reasoning applied in the Federal Circuit Court decision in the Electric Power Troup LLC v. Alstom S.A. case of August 1, 2016, page 8, “In Enfish, we applied the distinction to reject the § 101 challenge at stage one because the claims at issue focused not on asserted advances in uses to which existing computer capabilities could be put, but on a specific improvement—a particular database technique—in how computers could carry out one of their basic functions of storage and retrieval of data. Enfish, 822 F.3d at 1335–36; see Bascom, 2016 WL 3514158, at *5; cf. Alice, 134 S. Ct. at 2360 (noting basic storage function of generic computer). The present case is different: the focus of the claims is not on such an improvement in computers as tools, but on certain independently abstract ideas that use computers as tools.” No specific computer improvement, such as to how computers could carry out an improved version one of their basic functions of storage and retrieval of data, is present in the claims of the instant application; therefore, the claims in the instant application are an example of an abstract idea that uses computers as tools. For at least these reasons, Applicant' s arguments are not persuasive.
Applicant’s arguments on pages 8-11, filed 7/24/2026 with respect to U.S.C. 103 rejection of claims 18-20 have been fully considered and they are considered persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Solki (US 2019/0213292 A1).
Applicant’s arguments on pages 8-11, filed 7/24/2026 with respect to U.S.C. 103 rejection of claims 1-17 have been fully considered but they are not considered persuasive.
The following response to arguments is for Claim 1 and 18:
Applicant argues that Hobbs fails to teach or suggest "detecting a condition of a Device Under Test (DUT) with a first text pattern, wherein the condition indicates an enabled function of the DUT,” because the text pattern in Hobbs is binary protocol text.
Examiner respectfully disagrees. Limitations that are not claimed are not addressed by the rejection. For at least these reason, Applicant’s argument is unpersuasive.
Applicant argues that Hobbs fails to teach or suggest "transmitting a command to the DUT to perform a first action with the enabled function in response to detecting the condition of the DUT," as they claim there is no teaching in Hobbs of transmitting a command to the DUT specifically in response to detecting a DUT condition with the first text pattern.
Examiner respectfully disagrees. Hobbs states, in [0006] (see argument below) Here writing input signals to the DUT can be considered as commands received by the DUT because in [0004] “The ATE body 100 also includes a tester processor 101 with an associated memory 108 to control the hardware components built into the ATE body 100 and to generate the commands and data necessary to communicate with the DUTs being tested through the hardware bus adapter cards.” For at least these reasons, Applicant’s argument is unpersuasive.
Applicant argues that Hobbs fails to teach or suggest "detecting a second text pattern received from the DUT in response to the first action, the second text pattern indicating a successful completion of an event by the enabled function,” as Hobbs fails to teach ASCII patterns.
Examiner respectfully disagrees. The argument below Hobbs is cited to obtain multiple (at least 2) binary text patterns. However, ASCII is not mentioned in claims 1 or 18. Limitations that are not claimed are not addressed by the rejection. For at least these reason, Applicant’s argument is unpersuasive.
Applicant argues that Hobbs fails to teach or suggest "performing a second action in response to detecting the second text pattern,” as the actions consist of actions consist of hardware packet filtering and log storage in buffer memory based on bus packet triggers, not execute a secondary action driven by matching a completion text pattern.
Examiner respectfully disagrees. Hobbs states a filtering of the patterns as patterns are received, i.e., this happens for each labelled number of pattern 1, 2, …, n. This covers the limitation as it is stated. Limitations that are not claimed are not addressed by the rejection. For at least these reason, Applicant’s argument is unpersuasive.
Applicant argues that Miller Fails to Teach "the Enabled Function Being a Dynamic Voltage and Frequency Scaling (DVFS) Operation.”
Examiner respectfully agrees and rejection of claims 18-20 based on Hobbs in view of Miller are withdrawn. New rejections based on Hobbs and Solki have been applied. Examiner directs applicant to rejection below.
The following response to arguments is for Claim 11:
Applicant argues that Hobbs does not teach all the limitations of the amended claims 11. Examiner respectfully agrees, however in light of the amendments Examiner now uses Xia for the deficiencies and the examiner directs applicant to the rejection below.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101. The claimed invention is directed to the abstract concept of performing mental steps without significantly more. The claim(s) recite(s) the following abstract concepts in BOLD of
Claim 1. A method for a serial protocol-based event trigger comprising:
detecting a condition of a Device Under Test (DUT) with a first text pattern, wherein the condition indicates an enabled function of the DUT;
transmitting a command to the DUT to perform a first action with the enabled function in response to detecting the condition of the DUT;
detecting a second text pattern received from the DUT in response to the first action, the second text pattern indicating a successful completion of an event by the enabled function; and
performing a second action in response to detecting the second text pattern.
11. A method for a serial protocol-based event trigger comprising:
detecting a condition of a circuit, by comparing a first ASCII text pattern generated by the circuit to a predefined text pattern, wherein the condition indicates an enabled function of the circuit, the enabled function being a data transfer operation between the circuit and an external device electrically coupled thereto;
transmitting a command to the circuit to perform a first action with the enabled function in response to detecting the condition of the circuit;
detecting a second ASCII text pattern received from the circuit in response to the first action, the second ASCII text pattern indicating a successful completion of an event by the enabled function; and
performing a second action in response to detecting the second ASCII text pattern.
18. A method for a serial protocol-based event trigger comprising:
transmitting by a host, a command to perform a first action with an enabled function of a circuit in response to detecting a condition of the circuit, wherein the condition is detected by comparing a first text pattern generated by the circuit to a predefined text pattern defined by the host and the condition indicates the enabled function of the circuit, the enabled function being a Dynamic Voltage and Frequency Scaling (DVFS) operation;
receiving by the host, a second text pattern from the circuit in response to the first action, the second text pattern indicating a successful completion of an event by the enabled function;
performing by the host, a second action in response to detecting the second text pattern; and
setting by the host, a timestamp in response to detecting the second text pattern.
Under step 1 of the eligibility analysis, we determine whether the claims are to a statutory category by considering whether the claimed subject matter falls within the four statutory categories of patentable subject matter identified by 35 U.S.C. 101: process, machine, manufacture, or composition of matter. The above claims are considered to be in a statutory category.
Under Step 2A, Prong One, we consider whether the claim recites a judicial exception (abstract idea). In the above claim, the highlighted portion constitutes an abstract idea because, under a broadest reasonable interpretation, the actions performed recites limitation the fall into/recite abstract idea exceptions as there is no additional information to narrow/specify the particulars of said actions. Specifically, under the 2019 Revised Patent Subject Matter Eligibility Guidance, it falls into the grouping of subject matter that, when recited as such in a claim limitation, covers performing mathematics or mental steps.
Next, under Step 2A, Prong Two, we consider whether the claim that recites a judicial exception is integrated into a practical application. In this step, we evaluate whether the claim recites additional elements that integrate the exception into a practical application of that exception.
This judicial exception is not integrated into a practical application because there is no improvement to another technology or technical field; improvements to the functioning of the computer itself; a particular machine; effecting a transformation or reduction of a particular article to a different state or thing. Examiner notes that since the claimed methods and system are not tied to a particular machine or apparatus, they do not represent an improvement to another technology or technical field. Similarly, there are no other meaningful limitations linking the use to a particular technological environment. Finally, there is nothing in the claims that indicates an improvement to the functioning of the computer itself or transform a particular article to a new state.
Finally, under Step 2B, we consider whether the additional elements are sufficient to amount to significantly more than the abstract idea.
The additional element of transmitting a command, and receiving data is considered necessary data gathering and outputting and is not sufficient to integrate the abstract idea into a practical application. As recited in MPEP section 2106.05(g), necessary data gathering (i.e., receiving data) is considered extra solution activity in light of Mayo, 566 U.S. at 79, 101 USPQ2d at 1968; OIP Techs., Inc. v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1092-93 (Fed. Cir. 2015).
The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because setting a timestamp in response to detecting the second text pattern is considered extra solution activity that is not sufficient to integrate the abstract idea into a practical application.
The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because device under test (DUT), host and circuit are generic computer elements and not considered significantly more than the abstract idea. As recited in the MPEP, 2106.05(b), merely adding a generic computer, generic computer components, or a programmed computer to perform generic computer functions does not automatically overcome an eligibility rejection. Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 134 S. Ct. 2347, 2359-60, 110 USPQ2d 1976, 1984 (2014). See also OIP Techs. v. Amazon.com, 788 F.3d 1359, 1364, 115 USPQ2d 1090, 1093-94.
Claim 2 recites a serial port. Claim 6 recites a device coupled to the DUT. Claims 8, 9 and 10 recites an event command string, Claim 12 recites a Universal Asynchronous Receiver-Transmitter. Claim 13 recites an ASCII data string. Claim 14 recites a pattern management module. Claim 17 recites an external storage device. These claims recite what is considered generic computer elements and not sufficient to integrate the abstract idea into a practical application.
Claims 3 and 15 recite setting a timestamp in response to detecting the second text pattern. Claim 16 recites displaying the received text patterns. These claims recites what is considered an extra solution activity that is not sufficient to integrate the abstract idea into a practical application.
Claim 20 recites performing a voltage measurement. These claims recite what is considered necessary data gathering and is not sufficient to integrate the abstract idea into a practical application.
Claims 4-7 and 19 further limit the abstract ideas without integrating the abstract concept into a practical application or including additional limitations that can be considered significantly more than the abstract idea.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 6-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hobbs et al. (US 2020/0033409 A1) hereinafter Hobbs.
Regarding Claim 1, Hobbs teaches detecting a condition of a Device Under Test (DUT) with a first text pattern ([0006] “The test program run by the tester processor 101 may include a function test which involves writing input signals created by the pattern generator 102 to the DUTs, reading out the written signals from the DUTs and using the comparator 106 to compare the output with the expected patterns.); wherein the condition indicates an enabled function of the DUT ([0019] “In another embodiment, an apparatus for diagnosing a cause of failure (i.e., are the functions enabled or not) using automated test equipment (ATE) is disclose.”) transmitting a command to the DUT to perform a first action with the enabled function in response to detecting the condition of the DUT ([0006] “The test program run by the tester processor 101 may include a function test which involves writing input signals created by the pattern generator 102 to the DUTs, reading out the written signals from the DUTs and using the comparator 106 to compare the output with the expected patterns.” where it is well known in the art based on the background of the reference invention to utilize commands to test the function of the DUT.); detecting a second text pattern received from the DUT in response to the first action, the second text pattern indicating a successful completion of an event by the enabled function ([0122] “Further, the trigger module, among other things, triggers on certain patterns of data or certain events in the data to perform actions based on recognizing the respective patterns or events (i.e., receiving more patterns based on previous patterns).”); and performing a second action in response to detecting the second text pattern ([0122] “The protocol analyzer may comprise a filtering module and a triggering module. As mentioned previously, the filtering module filters out particular types or subsets of data or packets of data. Further, the trigger module, among other things, triggers on certain patterns of data or certain events in the data to perform actions based on recognizing the respective patterns or events. One of the functions of the filtering and triggering would be to compress the data by selectively filtering out unwanted data or by triggering on sequences that are repeated and choosing only to keep a record of a single repeated sequence (while discarding the others) (i.e., performing a second action).”).
Regarding Claim 2, Hobbs teaches the limitations of claim 1.
Hobbs further teaches wherein detecting the condition of the DUT comprises receiving a data from a serial port of the DUT ([0060] “The tester processor 304 can communicate with each of the FPGAs using a 8 lane high speed serial protocol interface such as PCIe as indicated by system buses 330 and 332 in FIG. 3. In other embodiments, the tester processor 304 could also communicate with the FPGAs using different high speed serial protocols, e.g., NVMe, Serial AT Attachment (SATA), etc.”)
Regarding Claim 3, Hobbs teaches the limitations of claim 1.
Hobbs further teaches comprising setting a timestamp in response to detecting the second text pattern ([0114] “Additionally, the interface may comprise details regarding payload data 604, e.g., the data communicated to and from the DUT (i.e., the data communicated from the DUT would comprise the second text pattern that is detected). Further, the interface may comprise timestamps 602, which report the timestamp on each packet of payload data.”).
Regarding Claim 4, Hobbs teaches the limitations of claim 1.
Hobbs further teaches wherein the second action comprises performing an external action external to a host, wherein the host is configured to detect the first text pattern and the second text pattern ([0039] “ For example, if FPGAs are used to communicate with the DUTs, the IPA [integrated protocol analyzer] can be implemented directly on the FPGA that is communicating with the DUTs and, thereby, have access to internal protocol signals that a standard protocol analyzer would not have. Because the IPA is implemented directly on the hardware (e.g., FPGAs), there is no need for additional probes and associated signaling that is typically associated with conventional desktop protocol analyzers. Further, the IPA can be implemented on multiple devices (e.g., FPGAs) within the hardware and, accordingly, embodiments of the present invention are able to monitor communication with hundreds of DUTs simultaneously (without requiring a standalone protocol analyzer) (i.e., implying one of ordinary skill in the art would assume that a standalone protocol analyzer can be used). It should be noted that the IPA can also be implemented on a different custom ASIC other than an FPGA.”; ([0122] “The protocol analyzer may comprise a filtering module and a triggering module. As mentioned previously, the filtering module filters out particular types or subsets of data or packets of data. Further, the trigger module, among other things, triggers on certain patterns of data or certain events in the data to perform actions based on recognizing the respective patterns or events. One of the functions of the filtering and triggering would be to compress the data by selectively filtering out unwanted data or by triggering on sequences that are repeated and choosing only to keep a record of a single repeated sequence (while discarding the others) (i.e., performing a second action).”) .
Regarding Claim 6, Hobbs teaches the limitations of claim 1.
Hobbs further teaches wherein the condition of the DUT comprises a device coupled to the DUT, and the second action comprises a data transfer between the device and the DUT ([0006] “The test program run by the tester processor 101 may include a function test which involves writing input signals created by the pattern generator 102 to the DUTs, reading out the written signals from the DUTs and using the comparator 106 to compare the output with the expected patterns. If the output does not match the input, the tester processor 101 will identify the DUT as being defective.”, where it is well known in the art based on the background of the reference invention to utilize commands to test the function of the DUT. Where [0005] “The ATE body 100 (i.e., host) tests the electrical functions of the DUTs 112A-112N connected to the ATE body 100 through hardware bus adapters plugged into the hardware bus adapter sockets of the ATE body 100.”, Fig 1.).
Regarding Claim 7, Hobbs teaches the limitations of claim 1.
Hobbs further teaches wherein the condition of the DUT comprises an operating mode of the DUT ([0005] “ The ATE body 100 tests the electrical functions of the DUTs 112A-112N connected to the ATE body 100 through hardware bus adapters plugged into the hardware bus adapter sockets of the ATE body 100. Accordingly, the tester processor 101 is programmed to communicate the test programs to be executed on the DUTs using the protocol unique to the hardware bus adapters. Meanwhile, the other hardware components built into the ATE body 100 communicate signals with each other and with the DUTs according to test programs operating in the tester processor 101. (i.e., the DUT is operating)” and [0006] “The test program run by the tester processor 101 may include a function test which involves writing input signals created by the pattern generator 102 to the DUTs, reading out the written signals from the DUTs and using the comparator 106 to compare the output with the expected patterns. If the output does not match the input, the tester processor 101 will identify the DUT as being defective (i.e., operational mode is defective).”).
Regarding Claim 8, Hobbs teaches the limitations of claim 1.
Hobbs further teaches wherein the command comprises an event command string ([0042] “In one embodiment, the system controller 201 may be a computer system, e.g., a personal computer (PC) that provides a user interface for the user of the ATE to load the test programs and run tests for the DUTs connected to the ATE 200. In one embodiment, the system controller 201 may be running the Linux operation system (OS). The Advantest FutureSuite software executing in the Linux environment is one example of test software normally used during device testing. ” Where Futuresuite on Linux utilizes command-line/string interfaces for operating the software and conducting testing).
Regarding Claim 9, Hobbs teaches the limitations of claim 1.
Hobbs further teaches wherein the command comprises a text script file comprising a plurality of event command strings ([0042] “In one embodiment, the system controller 201 may be a computer system, e.g., a personal computer (PC) that provides a user interface for the user of the ATE to load the test programs and run tests for the DUTs connected to the ATE 200. In one embodiment, the system controller 201 may be running the Linux operation system (OS). The Advantest FutureSuite software executing in the Linux environment is one example of test software normally used during device testing. It provides the user with a graphical user interface from which to configure and control the tests. It can also comprise functionality to control the test flow, control the status of the test program, determine which test program is running, and log test results and other data related to test flow (i.e., many command strings).” Where Futuresuite on Linux utilizes command-line/string interfaces for operating the software and conducting testing).
Regarding Claim 10, Hobbs teaches the limitations of claim 9.
Hobbs further teaches wherein at least one of the event command strings comprises a conditional operation conditioned on another event command string ([0042] “In one embodiment, the system controller 201 may be a computer system, e.g., a personal computer (PC) that provides a user interface for the user of the ATE to load the test programs and run tests for the DUTs connected to the ATE 200. In one embodiment, the system controller 201 may be running the Linux operation system (OS). The Advantest FutureSuite software executing in the Linux environment is one example of test software normally used during device testing. It provides the user with a graphical user interface from which to configure and control the tests. It can also comprise functionality to control the test flow, control the status of the test program, determine which test program is running, and log test results and other data related to test flow (i.e., comprises conditional operation on event command string).” Where Futuresuite on Linux utilizes command-line/string interfaces for operating the software and conducting testing.)
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Warren et al. (US 4791356 A) hereinafter Warren.
Regarding Claim 5, Hobbs teaches the limitations of claim 4.
Hobbs does not teach comprising delaying a start of the external action by a delay value
Warren teaches comprising delaying a start of the external action by a delay value (col 6 line 13-21 “One to three DUT signals suitable for measurement clock use are connected to any of three External Meas Clk inputs 100. Prior to measurements, the user selects with a clock selector 102 one of three clock signals 104 as a clock source. Using a time selector 106, the user selects either a signal delayed 120 ns by a time delay 107 or a straight signal, which is then buffered by a buffer 108 to the Test Head Controller 42 as a Measure Clk signal 109.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of a delayed start as discussed in Warren to the serial protocol based trigger discussed in Hobbs for the purpose of to ensuring measurement accuracy by allowing time for signals to stabilize and power supplies to settle. This is advantageous because it ensures the measurement reflects the DUT's behavior, not the test setup's initial transients.
Claim(s) 11, 16, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hobbs et al. (US 2020/0033409 A1) hereinafter Hobbs in view of Xia et al. (US 2011/0078525 A1) hereinafter Xia.
Regarding Claim 11, Hobbs teaches detecting a condition of a circuit, by comparing a first text pattern generated by the circuit to a predefined text pattern, wherein the condition indicates an enabled function of the circuit DUT, the enabled function being a data transfer operation between the circuit and an external device electrically coupled thereto ([0006] “The test program run by the tester processor 101 may include a function test which involves writing input signals created by the pattern generator 102 to the DUTs, reading out the written signals from the DUTs and using the comparator 106 to compare the output with the expected patterns. If the output does not match the input, the tester processor 101 will identify the DUT as being defective.” Where [0005] “The ATE body 100 tests the electrical functions of the DUTs 112A-112N connected to the ATE body 100 through hardware bus adapters plugged into the hardware bus adapter sockets of the ATE body 100.”, Fig 1.); transmitting a command to the circuit to perform a first action with the enabled function in response to detecting the condition of the circuit DUT ([0006] “The test program run by the tester processor 101 may include a function test which involves writing input signals created by the pattern generator 102 to the DUTs, reading out the written signals from the DUTs and using the comparator 106 to compare the output with the expected patterns.”, where it is well known in the art based on the background of the reference invention to utilize commands to test the function of the DUT.); detecting a second text pattern received from the circuit in response to the first action, the second text pattern indicating a successful completion of an event by the enabled function ([0122] “Further, the trigger module, among other things, triggers on certain patterns of data or certain events in the data to perform actions based on recognizing the respective patterns or events (i.e., receiving more patterns based on previous patterns).”); and performing a second action in response to detecting the second text pattern ([0122] “ One of the functions of the filtering and triggering would be to compress the data by selectively filtering out unwanted data or by triggering on sequences that are repeated and choosing only to keep a record of a single repeated sequence (while discarding the others) (i.e., performing a second action).”).
Hobbs does not teach ASCII.
Xia teaches ASCII ([0028] “Some embodiments of the present invention include a method for operating automated test equipment (ATE) of integrated circuits (IC) scan test, using a field programmable gate array (FPGA)-based system, wherein the method includes providing design simulation files in a specified format and using programmable converter scripts to modify the design simulation files from a specified format into a flash memory format. Further, programmable graphic user interface commands for providing ASCII vectors in binary format to on-board flash memories can be used.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of an ASCII in Xia to the serial protocol based trigger discussed in Hobbs for the purpose of transferring configuration data, command sets, and receiving plain text responses from a device. It is advantageous because ASCII provides a reliable, simple, and universally understood method for communicating with hardware, particularly in embedded systems, industrial equipment, and legacy platforms.
Regarding Claim 16, Hobbs and Xia teach the limitations of claim 11.
Hobbs further teaches comprising displaying the first text pattern and the second text pattern with a display module ([0126] “ Finally, at step 812, the results are formatted by formatter module 502 to prepare them for display in the GUI 510.” Where in an earlier step 804 found in [0122] “Further, the trigger module, among other things, triggers on certain patterns of data or certain events in the data to perform actions based on recognizing the respective patterns or events (i.e., receiving more patterns based on previously received patterns, first and second patterns).”).
Hobbs does not teach ASCII.
Xia teaches ASCII ([0028] “Some embodiments of the present invention include a method for operating automated test equipment (ATE) of integrated circuits (IC) scan test, using a field programmable gate array (FPGA)-based system, wherein the method includes providing design simulation files in a specified format and using programmable converter scripts to modify the design simulation files from a specified format into a flash memory format. Further, programmable graphic user interface commands for providing ASCII vectors in binary format to on-board flash memories can be used.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of an ASCII in Xia to the serial protocol based trigger discussed in Hobbs for the purpose of transferring configuration data, command sets, and receiving plain text responses from a device. It is advantageous because ASCII provides a reliable, simple, and universally understood method for communicating with hardware, particularly in embedded systems, industrial equipment, and legacy platforms.
Regarding Claim 17, Hobbs and Xia teach the limitations of claim 11.
Hobbs further teaches wherein the external device is a storage device ([0102] “In one embodiment, the data accumulated by the capture module 590 is stored in the storage module 550 (also implemented on the FPGA 562) or, alternatively, on external storage module 577.”).
Claim(s) 12-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hobbs in view Xia and of Rogel- Favila et al. (US 2018/0188322 A1) hereinafter Rogel.
Regarding Claim 12, Hobbs and Xia teach the limitations of claims 11.
Hobbs further teaches wherein detecting the condition of the circuit comprises receiving a data at a first serial port of a host ([0060] “The tester processor 304 can communicate with each of the FPGAs using a 8 lane high speed serial protocol interface such as PCIe as indicated by system buses 330 and 332 in FIG. 3. In other embodiments, the tester processor 304 could also communicate with the FPGAs using different high speed serial protocols, e.g., NVMe, Serial AT Attachment (SATA), etc.”).
Hobbs and Xia do not teach wherein the first serial port is coupled to a Universal Asynchronous Receiver-Transmitter.
Rogel teaches wherein the first serial port is coupled to a Universal Asynchronous Receiver-Transmitter ([0020] “These sideband channels can be used to monitor the information and traffic inside the DUTs. The sideband signal interface can be configured in a variety of communication or bus protocols (e.g., compatible with JTAG, UART, I2C, USB, etc.) and it can be part of the pin-out of the tester itself. When the DUT is connected to the tester, the tester provides the communication or bus protocols capability (e.g., UART, I2C, JTAG, etc.).”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of an UART discussed in Rogel to the serial protocol based trigger discussed in Hobbs and Xia for the purpose of having reliable hardware communication protocol used for serial, device-to-device communication. This is advantageous because it allows for the test related information of said respective DUT can be captured and stored in synchronization with input and output test signals of a test program testing the respective DUT (e.g., Rogel, [0008]).
Regarding Claim 13, Hobbs, Xia and Rogel teach the limitations of claim 12.
Hobbs further teaches comprising buffering data string from the first serial port with a buffer management module. ([0079] “The storage module 550 (i.e., buffer management module) may be a memory buffer implemented directly on the IPA FPGA firmware 535, thereby, requiring no additional circuitry for storing the critical information. Alternatively, the critical data may be stored in an external high speed buffer 577.”).
Hobbs does not teach an American Standard Code for Information Exchange (ASCII).
Xia teaches an American Standard Code for Information Exchange (ASCII) ([0028] “Some embodiments of the present invention include a method for operating automated test equipment (ATE) of integrated circuits (IC) scan test, using a field programmable gate array (FPGA)-based system, wherein the method includes providing design simulation files in a specified format and using programmable converter scripts to modify the design simulation files from a specified format into a flash memory format. Further, programmable graphic user interface commands for providing ASCII vectors in binary format to on-board flash memories can be used.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of an ASCII in Xia to the serial protocol based trigger discussed in Hobbs for the purpose of transferring configuration data, command sets, and receiving plain text responses from a device. It is advantageous because ASCII provides a reliable, simple, and universally understood method for communicating with hardware, particularly in embedded systems, industrial equipment, and legacy platforms.
Regarding Claim 14, Hobbs, Xia and Rogel teach the limitations of claim 13.
Hobbs further teaches wherein detecting the condition of the circuit further comprises comparing the first text pattern received from the device with the predefined pattern in a pattern management module, wherein the pattern management module receives the pattern from a text pattern input ([0122] “Further, the trigger module, among other things, triggers on certain patterns of data or certain events in the data to perform actions based on recognizing the respective patterns or events (i.e., receiving more patterns based on previous patterns). One of the functions of the filtering and triggering would be to compress the data by selectively filtering out unwanted data or by triggering on sequences that are repeated and choosing only to keep a record of a single repeated sequence (while discarding the others) (i.e., patterns are compared and discarded).”).
Hobbs does not teach ASCII.
Xia teaches ASCII ([0028] “Some embodiments of the present invention include a method for operating automated test equipment (ATE) of integrated circuits (IC) scan test, using a field programmable gate array (FPGA)-based system, wherein the method includes providing design simulation files in a specified format and using programmable converter scripts to modify the design simulation files from a specified format into a flash memory format. Further, programmable graphic user interface commands for providing ASCII vectors in binary format to on-board flash memories can be used.”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of an ASCII in Xia to the serial protocol based trigger discussed in Hobbs for the purpose of transferring configuration data, command sets, and receiving plain text responses from a device. It is advantageous because ASCII provides a reliable, simple, and universally understood method for communicating with hardware, particularly in embedded systems, industrial equipment, and legacy platforms.
Regarding Claim 15, Hobbs, Xia and Rogel teach the limitations of claim 14.
Hobbs further teaches comprising setting a timestamp with a timestamping module in response to the pattern matching the predefined pattern ([0114] “Additionally, the interface may comprise details regarding payload data 604, e.g., the data communicated to and from the DUT (i.e., the data communicated from the DUT would comprise the second text pattern that is detected). Further, the interface may comprise timestamps 602, which report the timestamp on each packet of payload data.”).
Claim(s) 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hobbs in view of Solki (US 2019/0213292 A1).
Regarding Claim 18, Hobbs teaches transmitting by a host, a command to perform a first action with an enabled function of a circuit in response to detecting a condition of the circuit, wherein the condition is detected by comparing a first text pattern generated by the circuit to a predefined text pattern defined by the host and the condition indicates the enabled function of the circuit ([0006] “The test program run by the tester processor 101 may include a function test which involves writing input signals created by the pattern generator 102 to the DUTs, reading out the written signals from the DUTs and using the comparator 106 to compare the output with the expected patterns. If the output does not match the input, the tester processor 101 will identify the DUT as being defective.”, where it is well known in the art based on the background of the reference invention to utilize commands to test the function of the DUT. Where [0005] “The ATE body 100 (i.e., host) tests the electrical functions of the DUTs 112A-112N connected to the ATE body 100 through hardware bus adapters plugged into the hardware bus adapter sockets of the ATE body 100.”, Fig 1.); receiving by the host, a second text pattern from the circuit in response to the first action, the second text pattern indicating a successful completion of an event by the enabled function ([0122] “Further, the trigger module, among other things, triggers on certain patterns of data or certain events in the data to perform actions based on recognizing the respective patterns or events (i.e., receiving more patterns based on previous patterns). One of the functions of the filtering and triggering would be to compress the data by selectively filtering out unwanted data or by triggering on sequences that are repeated and choosing only to keep a record of a single repeated sequence (while discarding the others).”); performing by the host, a second action in response to detecting the second text pattern ([0039] “ For example, if FPGAs (i.e., host) are used to communicate with the DUTs, the IPA can be implemented directly on the FPGA that is communicating with the DUTs and, thereby, have access to internal protocol signals that a standard protocol analyzer would not have.” ([0122] “Further, the trigger module, among other things, triggers on certain patterns of data or certain events in the data to perform actions based on recognizing the respective patterns or events. One of the functions of the filtering and triggering would be to compress the data by selectively filtering out unwanted data or by triggering on sequences that are repeated and choosing only to keep a record of a single repeated sequence (while discarding the others) (i.e., performing a second action).”); and setting by the host, a timestamp in response to detecting the second text pattern ([0114] “Additionally, the interface may comprise details regarding payload data 604, e.g., the data communicated to and from the DUT (i.e., the data communicated from the DUT would comprise the second text pattern that is detected). Further, the interface may comprise timestamps 602, which report the timestamp on each packet of payload data.”).
Hobbs does not teach the enabled function being a Dynamic Voltage and Frequency Scaling (DVFS) operation.
Solki teaches the enabled function being a Dynamic Voltage and Frequency Scaling (DVFS) operation ([0011] “In the advanced system on chip (SoC) design, the operating voltage for the logic in a device under test (DUT) as depicted in FIG. 1, often is dynamically adjusted to compensate for process and temperature variations. … Based on the sensor output, the supply voltage and/or operation of the DUT is adjusted accordingly. There are several naming conventions for such operation such as: DVS: Dynamic Voltage Scaling, DCVS: Dynamic Core-Voltage Scaling, DVFS: Dynamic Voltage-Frequency Scaling, AVS: Adaptive Voltage Scaling, and AVFS: Adaptive Voltage-Frequency Scaling.”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of DVFS in Solki to the serial protocol based event trigger discussed in Hobbs for the purpose of being able adjust the voltage and frequency to keep the DUTs in a performance safe temperature range. This is advantageous because techniques are needed to compensate for variation in location of the chip on the wafer, semiconductor processes, or performance temperature requirements, so that the circuits can operate with power efficiency while guaranteeing the expected performance ([0003], Solki).
Regarding Claim 19, Hobbs and Solki teach the limitations of claim 18.
Hobbs does not teach wherein the enabled function is a voltage scalability of a supply voltage of the circuit using the DVFS operation.
Solki teaches the enabled function being a Dynamic Voltage and Frequency Scaling (DVFS) operation ([0011] “In the advanced system on chip (SoC) design, the operating voltage for the logic in a device under test (DUT) as depicted in FIG. 1, often is dynamically adjusted to compensate for process and temperature variations. … Based on the sensor output, the supply voltage and/or operation of the DUT is adjusted accordingly. There are several naming conventions for such operation such as: DVS: Dynamic Voltage Scaling, DCVS: Dynamic Core-Voltage Scaling, DVFS: Dynamic Voltage-Frequency Scaling, AVS: Adaptive Voltage Scaling, and AVFS: Adaptive Voltage-Frequency Scaling.”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of DVFS in Solki to the serial protocol based event trigger discussed in Hobbs for the purpose of being able adjust the voltage and frequency to keep the DUTs in a performance safe temperature range. This is advantageous because techniques are needed to compensate for variation in location of the chip on the wafer, semiconductor processes, or performance temperature requirements, so that the circuits can operate with power efficiency while guaranteeing the expected performance ([0003], Solki).
Regarding Claim 20, Hobbs and Solki teach the limitations of claim 19.
Hobbs does not teach wherein the second action comprises performing a voltage measurement of the supply voltage of the circuit.
Solki teaches wherein the second action comprises performing a voltage measurement of the supply voltage of the circuit ([0041] “The PPS sensor may be used for static (one-time), dynamic (open loop, lookup table, DVS, DVFS or DCVS) or adaptive (closed loop, AVS, or AVFS) adjustment of the supply voltage or the clock frequency of the given circuit.” Where the sensor would provide measurement readings of the supply voltage during the supply voltage adjustment testing).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the use of DVFS in Solki to the serial protocol based event trigger discussed in Hobbs for the purpose of being able adjust the voltage and frequency to keep the DUTs in a performance safe temperature range. This is advantageous because techniques are needed to compensate for variation in location of the chip on the wafer, semiconductor processes, or performance temperature requirements, so that the circuits can operate with power efficiency while guaranteeing the expected performance ([0003], Solki).
Conclusion
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/EMMA ALEXANDER/Patent Examiner, Art Unit 2857
/LAL CE MANG/Primary Examiner, Art Unit 2857
