DETAILED ACTION This Non-Final Office action is in response to Applicant’s filing on 07/19/2023. Claims 1-20 are pending. The effective filing date of the claimed invention is 07/19/2023. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1, 2, 4-20 are rejected under 35 U.S.C. 103 as being unpatentable over Hao Lo et al. (Jan 20 th , 2023) . A 48-node all-to-all connected coupled ring oscillator ising solver chip. ResearchSquare DOI: https://doi.org/10.21203/rs.3.rs-2395566/v1 (referred to as “Lo”), in view of U.S. Pat. No. 5,475,344 to Maneatis et al. (“Maneatis”), in further view of U.S. Pat. No. 8,130,608 to Matsumoto et al. (“Matsumoto”). W i th regard to claim 1 (and similarly claims 12, 16) , Lo discloses the claimed Ising machine system configured to solve an Ising problem (see Lo, abstract) , the Ising machine system comprising a plurality of ring oscillators that are each configured to propagate an oscillation signal (see Lo , page 4, “Fig. 2 (upper, left) illustrates the proposed fully-connected architecture comprising n+1 horizontal oscillators, n+1 vertical oscillators. . . . ” and Lo page 6, discussing various stages in “B Coupling Circuit”; secondary reference Mansatis further teaches col. 4, ln 1-20, “the inventive array oscillator circuit includes a set of mutually coupled ring oscillators” and col. 2, ln. 43-55, “each ring oscillator having a plurality of buffer stages for generating output signals on a like plurality of oscillator output ports.”) , each of the ring oscillators comprises a plurality of coupling stages ( Lo abstract, “The multi-bit coupling 11 circuit was realized by cascading 1-bit coupler stages comprising a pair of inverters and two 12 transmission gates.”; Mansatis further teaches col. 4, ln 1-20, “the inventive array oscillator circuit includes a set of mutually coupled ring oscillators” and col. 2, ln. 43-55, “each ring oscillator having a plurality of buffer stages for generating output signals on a like plurality of oscillator output ports.” ) , each of the coupling stages having a unique phase index number within the respective one of the ring oscillators that matches the phase index numbers of the coupling stages of each of the other ring oscillators ( Lo uses corresponding positions/stages across oscillators in the crossbar and paired horizontal/vertical organization, that is the same concept as stage indexing across rings, “fully-connected architecture comprising n+1 horizontal oscillators, n+1 vertical oscillators, . . . at each intersecting location”; see also Maneatis at abstract, “output signals on the each ring oscillator's plurality of oscillator output ports have a phase offset from the signals generated on corresponding ones of the other ring oscillator's oscillator output ports” and published claim 2, “each of said plurality of second buffer stages being coupled to a respective one of said plurality of first oscillator output ports, wherein each of said plurality of first buffer stages includes a buffer output port for defining one of said plurality of first oscillator output ports, each of said plurality of second buffer stages including an input coupling port connected to a respective one of said plurality of first oscillator output ports” ) , each of the coupling stages excepting one of each of the ring oscillators is cross-coupled to a coupling stage having a same phase index number of one of the other ring oscillators via the oscillation signal associated with the respective ring oscillators ( Lo discloses crossbar-style coupling at intersections and horizontal/vertical oscillator pairing throughout the array, such as abstract “The key idea of the all-to-all architecture is 9 to strongly couple a horizontal oscillator with a vertical oscillator so that each horizontal-vertical 10 oscillator pair intersects with all other pairs in the cross-bar style array” ; Lo does not disclose the “excepting one of each of the ring oscillators” limitation, or an uncoupled stage per ring; Matsumoto teaches at abstract, claim 1, “q ring oscillators each including p inverter circuits connected together to form a ring shape, where each of p and q is an integer of 2 or greater; a phase coupling ring including (p.times.q) phase coupling circuits each of which is configured to couple an output of one of the p inverter circuits in one of the q ring oscillators to an output of one of the p inverter circuits in another one of the q ring oscillators in a predetermined phase relationship” and explicit open-circuit state (i.e. excepting one) at claim 1, “a switching circuit configured to switch between a short-circuit state and an open-circuit state between an output of one of the p inverter circuits in each of the q ring oscillators and an output of one of the p inverter circuits in an associated one of the q ring oscillators.” And claim 2, “wherein the switching circuit is provided for each of the p inverter circuits in each of the q ring oscillators, and the coupled ring oscillator further includes p off-state switching elements provided so that one of the p off-state switching elements is arranged between any two of the p switching circuits.” And claim 7 ) , such that each of the ring oscillators is cross-coupled to each of the other ring oscillators at a single respective one of the coupling stages to provide a respective phase coupling between the respective cross-coupled ring oscillators ( Lo, abstract, “The key idea of the all-to-all architecture is 9 to strongly couple a horizontal oscillator with a vertical oscillator so that each horizontal-vertical 10 oscillator pair intersects with all other pairs in the cross-bar style array.” And page 4, “Fig. 2 (upper, left) illustrates the proposed fully-connected architecture comprising n+1 horizontal oscillators, n+1 vertical oscillators, and coupling circuits denoted as W (for 𝐽 !") and L (for ℎ! 91 ) at each intersecting location” ) . All three references Lo, Maneatis, and Matsumoto are analogous art as they are all directed to ring oscillators. The addition of Maneatis to Lo provides for e.g. “ improved phase resolution relative to conventional ring oscillators by operating in a mode of oscillation in which corresponding outputs from each constituent ring oscillator are offset in phase by less than the delay of an individual buffer stage.” Furthermore, the addition of Matsumoto to Lo and Maneatis, provides the added benefit of, “Thus, by switching the impedance of the first phase coupling circuit to a high impedance, the outputs of the plurality of inverter circuits can be forced to be fixed in phase with one another by the second phase coupling circuit. Also, the in-phase fixed state of the outputs of the inverter circuits can be released by switching the impedance of the first phase coupling circuit to a normal impedance. Thus, the above-described initialization can be executed.” See Matsumoto, col. 6, ln. 5-15. Therefore, it would have been obvious to one of ordinary skill in the ring oscillator art to modify Lo to include the added features of Maneatis and Matsumoto, as described above, where the advantages are also shown above for each of Maneatis and Matsumoto. With regard to claim 2 , 13 , Lo further discloses a propagation distance of the oscillation signal between a first coupling stage having a given phase index number and a second coupling stage having a next consecutive phase index number is equal for each of the ring oscillators (see Lo abstract highly uniform coupling circuit with integer weights) . See also Matsumoto at e.g. col. 5, ln. 30-40 symmetry is maintained throughout. With regard to claim 4 , Lo further discloses the coupling stages of the ring oscillators are arranged in a two-dimensional array (Lo abstract, cross-bar style array) . With regard to claim 5 , 17 , Lo further discloses where the coupling stages of a first one of the ring oscillators is fabricated in a linear physical arrangement along a first axis of the two-dimensional array, wherein the coupling stages associated with a second one of the ring oscillators are fabricated in a linear physical arrangement along a second axis of the two-dimensional array orthogonal with the first axis, wherein one of the coupling stages of the first one of the ring oscillators physically intersects one of the coupling stages of the second one of the ring oscillators having the same phase index number in the two-dimensional array (Lo discloses the horizontal and vertical oscillator(s), intersections at crossbar array, coupler stages at intersections, with coupler stages; Matsumoto further teaches the same position stage across rings concept , the phase index features ) . See combination above. With regard to claim 6 , 14, 18 , Lo further discloses where each of the remaining ring oscillators are fabricated in a physical L-shape, wherein one of the coupling stages of each of the ring oscillators physically intersects one of the coupling stages of each of the other ring oscillators having the same phase index number in the two-dimensional array (see e.g. Lo Fig. 1 discussion) . With regard to claim 7 , 19 , Lo further discloses where the coupling stage at a vertex of the physical L-shape of each of the remaining ring oscillators is uncoupled to any other coupling stage of any other of the ring oscillators (see e.g. Lo Fig. 1 discussion) . With regard to claim 8 , 15, 20 , Lo further discloses where the two-dimensional array comprises a plurality of array portions, wherein each of the array portions comprises separate ring oscillators, wherein each of the ring oscillators in a first array portion is cross-coupled to one of the ring oscillators in a second array portion to provide phase coupling between the ring oscillators of the first array portion and the ring oscillators of the second array portion (see Lo above) . With regard to claim 9 , Lo further teaches where the array portions are physically arranged in a one-dimensional array of the array portions, wherein the oscillation signal in each of the ring oscillators of one of the array portions propagates in an opposite orientation relative to the oscillation signal in each of the ring oscillators of a next contiguous array portion in the one-dimensional array of the array portions (see Lo page 3) . With regard to claim 10 , Lo further discloses where the array portions are physically arranged in a two-dimensional array of the array portions, wherein each of the ring oscillators is cross-coupled via a coupling stage to one ring oscillator in each orthogonally adjacent array portion in the two-dimensional array of array portions (see Fig. 1 discussion, abstract) . With regard to claim 11 , Lo further discloses an Ising machine controller configured to generate a plurality of control signals corresponding to parameters of the Ising problem to control the relative phase coupling of each of the ring oscillators to the other ring oscillators (Lo supports the ising-parameter programming at e.g. Fig. 2 discussion and abstract; Matsumoto further teaches controller enables control of the system at e.g. col. 1n, ln 30-40) . See combination above. Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lo, Maneatis, Matsumoto, in further view of U.S. Pat. Pub. No. 2006/0294486 to Hal (“Hal”) . With regard to claim 3 , Lo does not disclose the Manhattan distance. Hal does teach the Manhattan distance for integrated circuit wiring, at e.g. abstract, [0001] [0006] [0012-13] etc., where this is advantageous to minimize wiring length for minimizing area, complexity, and signal delay of the integrated circuit. Therefore, it would have been obvious to one of ordinary skill in the IC wiring art to include the Manhattan distance, as shown in Hal, where this is advantageous to minimize wiring length for minimizing area, complexity, and signal delay of the integrated circuit. See Hal at portions cited. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT Peter Ludwig whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)270-5599 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT Mon-Fri 9-5 . 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