Prosecution Insights
Last updated: October 02, 2026
Application No. 18/355,586

PHOTODIODE MODULES WITH REDUCED RECOVERY TIMES

Non-Final OA §103§112
Filed
Jul 20, 2023
Priority
Sep 26, 2022 — EU 22306420.5
Examiner
YECHURI, SITARAMARAO S
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Viavi Solutions Inc.
OA Round
3 (Non-Final)
86%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
77%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
772 granted / 902 resolved
+17.6% vs TC avg
Minimal -8% lift
Without
With
+-8.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
37 currently pending
Career history
924
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
62.2%
+22.2% vs TC avg
§102
18.4%
-21.6% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 902 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-20 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. Claims 1-20 recite a heater to increase temperature of a photodiode, see the title of the Application the intention is to reduce recovery time, see PG-PUB paragraph 0021, 0034 “In addition, the increase in the quantum efficiency reduces or improves the recovery times of the photodiode chips” “by increasing the temperature of the photodiode chip 202 through use of the heating element 206, which increases the cutoff wavelength, the quantum efficiency of the photodiode chip 202 may also be increased. The Increase in the quantum efficiency of the photodiode chip 202 may also improve the recovery time of the photodiode chip 202”, thus the Examiner notes that the phrases “may also be increased” and “may also improve” raise the question of whether these improvements actually happen and whether the claims are enabled, the Examiner notes that there is no good description in the invention as to when to stop heating, so if this invention were made by one skilled in the art, then how would one skilled in the art to which it pertains know when to stop heating, because the intended purpose is not enabled. The Examiner notes that if the photodiode is continuously heated, then it will melt, thus this invention is not enabled. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Dependent claim 4, 12, 18 recites “wherein the first heating element contact and the second heating element contact are in electrical contact with the heating element” however in parent claims 1, 9, 15 it was understood that “heating element contact” refers to an electrical contact, thus if dependent claim 4, 12, 18 is clarifying that “heating element contact” refers to an electrical contact then it is unclear as to what else does “heating element contact” mean in claim 1, 9, 15 ? Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1, 3, 6, 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi et al. (US 20160155883 A1) hereafter referred to as Shi in view of Uematsu et al. (US 20210274599 A1) hereafter referred to as Uematsu In regard to claim 1 Shi teaches a photodiode module [“FIG. 1 shows a conventional 6-pin TO-header solution for Ge/Si APD. (a) TO-header mounted with Ge/Si APD chip and resistor heater and (b) Ge/Si APD chip”] comprising: a submount [see Fig. 1 see “6-pin transistor outline (TO)-header”]; a photodiode chip [see Fig. 1 see “Ge/Si APD chip”] on the submount; a heating element, with a first heating-element contact and a second heating-element contact, wherein the heating element is to receive electrical energy [see Fig. 1 see “Resistor heater” “a 30Ω resistor” “When a 3.3V bias voltage is applied on the resistor, the heat generated in the resistor can heat up the TO-header and increase TO temperature by about tens of degrees depending on consumption power”, see under broadest reasonable interpretation if electricity is supplied, then implicitly the contacts are disclosed] to generate heat to increase a temperature [“Accordingly, the sensitivity performance of Ge/Si APDs can be improved” “transfer heat from the resistor to the Ge region via TO-header”] of the photodiode chip, an electrical isolator [see Fig. 1 see that the “TO-header” is not conductive] but does not specifically teach that the submount formed of a thermally conductive material; and with a first heating-element contact and a second heating-element contact, formed within the submount vertically below the photodiode chip, via the first and second heating-element contacts and; and an electrical isolator positioned between the heating element and the photodiode chip to block a flow of electricity between the heating element and the photodiode chip. However these limitations are basic knowledge in the art, under broadest reasonable interpretation if electricity is supplied, then there implicitly is a contact at either end of the resistor heater, a resistor by definition has two terminals, see Shi teaches “electrically-conductive pads (e.g., aluminum pads) may be formed on top of the at least one heater 305”, see Uematsu Fig. 2, Fig. 3 see that in Fig. 3 “the wafer W is attracted and fixed to the attraction surface S1 of the plate-shaped member 10” “The three driver electrode pairs 600 correspond to three heater electrodes 50 (50A, 50B, 50C). As shown in FIGS. 2 to 4, one driver electrode 60 of the pair of driver electrodes 60 constituting one driver electrode pair 600 (for example, the driver electrode pair 600A) is electrically connected to one heater pad section 52 of the corresponding heater electrode 50 (for example, the heater electrode 50A) through a heater-side via 71 formed by using a conductive material. The other driver electrode 60 of the pair of driver electrodes 60 constituting the driver electrode pair 600 (for example, the driver electrode pair 600A) is electrically connected to the other heater pad section 52 of the corresponding heater electrode 50 (for example, the heater electrode 50A) through a heater-side via 71”, see “the plurality of heater electrodes 50 are disposed so as to be sandwiched between the cover layer 112 and the substrate layer 111 constituting the lower portion 102 of the plate-shaped member 10” “In the present embodiment, the substrate layer ill and the cover layer 112 constituting the lower portion 102 of the plate-shaped member 10 are both formed from a sintered body made of a ceramic (for example, alumina or aluminum nitride)” “As shown in FIG. 2, a chuck electrode 40 made of a conductive material (for example, tungsten, molybdenum, or platinum) is disposed in the plate-shaped member 10” “The electrostatic chuck 100 has a structure for supplying electric power to the chuck electrode 40”, see the use of adhesive to join different materials, “joining portion 30 is constituted by, for example, an adhesive, such as a silicone-based resin, an acrylic resin, or an epoxy-based resin” “intermediate joining portion 104 of the plate-shaped member 10 is constituted by, for example, an adhesive, such as a silicone-based resin, an acrylic resin, or an epoxy-based resin, glass, or a metal”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include the functionality of Uematsu i.e. to modify Shi to include that the submount formed of a thermally conductive material; and with a first heating-element contact and a second heating-element contact, formed within the submount vertically below the photodiode chip, via the first and second heating-element contacts and; and an electrical isolator positioned between the heating element and the photodiode chip to block a flow of electricity between the heating element and the photodiode chip. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is thermally conductive helps transfer heat to the photodiode, vertically below gives efficient transfer of heat and allows localized heating, the resistor heater needs electricity to operate and uses contacts to connect to the supply and that isolation is needed since the heating element provides heat and not electricity to the photodiode to avoid electrical interference of any sort. In regard to claim 3 Shi and Uematsu as combined does not specifically teach wherein the heating element is smaller in length and width than the photodiode chip. However see Uematsu Fig. 2, Fig. 3 see that “three heater electrodes 50 (50A, 50B, 50C)” “the heater electrode 50C is disposed in the segment Zc on a side closest to the center”, i.e. there is provision to heat only a central part of the semiconductor device. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include wherein the heating element is smaller in length and width than the photodiode chip. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that Shi only wants to heat the photodiode and doesn’t need to heat anything else. In regard to claim 6 Shi and Uematsu as combined teaches wherein the heating element is formed within [see combination, see Uematsu Fig. 2 see that heater is embedded below the top surface] a top surface of the submount. In regard to claim 7 Shi and Uematsu as combined teaches [see this controller is taught implicitly “One approach to maintain Ge PD performance at lower temperature is to mount a 30Ω resistor on the top-surface of a 6-pin transistor outline (TO)-header, as illustrated in FIG. 1. When a 3.3V bias voltage is applied on the resistor, the heat generated in the resistor can heat up the TO-header and increase TO temperature by about tens of degrees depending on consumption power. Accordingly, the sensitivity performance of Ge/Si APDs can be improved to meet specified requirements”, see that some “controller” must be performing the act of “When a 3.3V bias voltage is applied”, thus controller is taught implicitly ] wherein the heating element is controlled by a controller to heat the photodiode chip. Claim(s) 2, 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi and Uematsu as combined and further in view of Lebby et al. (US 6999644 B1) hereafter referred to as Lebby. In regard to claim 2 Shi and Uematsu as combined does not specifically teach further comprising:a fiber pigtailed package enclosing the photodiode chip. See Shi teaches packages, see Fig. 1, Fig. 5 the “TO-header 521, a TO-cap 522” together form a package, “FIG. 5 shows a design of a 6-pin TO solution mounted with heater integrated Ge/Si APD in accordance with an embodiment of the present disclosure”, see paragraph 0003 “Avalanche photodiodes (APDs) are widely utilized for fiber-optic communications due to higher sensitivity”. See Lebby “Referring additionally to FIGS. 28 and 29, the optoelectric package, including optoelectric module 10 enclosed in housing 80, is illustrated in a discrete pigtail arrangement” “FIGS. 28 and 29 are two isometric views of the optoelectric package of FIG. 24 pigtailed with an optical fiber” see packaging examples “Turning now to FIGS. 18, 19, and 20, another housing 80 is illustrated for enclosing and mounting a discrete optoelectric module. Housing 80 has a substantially rectangular cross-section with a small opening 81 at one end and a larger opening or substantially hollow interior 82 accessible at the other end. A pair of mounting pins 84 extend from the lower surface for surface mounting the complete package. It will of course be understood that other shapes, both interior and exterior, may be devised for specific applications, and other or additional mounting pins or other mounting devices may be devised for specific mounting situations. (28) Turning to FIGS. 21, 22, and 23, an optoelectric module 10, with a multilayer hermetic ceramic package including a connection board (e.g., connection board 64) having outwardly extending leads 65 attached thereto, is provided. Module 10 may be, for example, similar to the optoelectric module described and illustrated in FIGS. 1 and 2. Optical fiber receiving opening 21 in receptacle 20 can best be seen in FIG. 23. (29) Referring additionally to FIGS. 24, 25, 26, and 27, module 10 of FIG. 21 is placed in housing 80 of FIG. 20 so that the end of receptacle 20 extends slightly through opening 81. Also, as can best be seen in FIG. 24 or 26, connection board 64 is positioned to seal opening 82 in housing 80. Alternatively, connection board 64 is sealed in opening 82 by some convenient means, such as epoxy or the like. In a preferred embodiment, module 10 is press fitted directly into housing 80. In some embodiments housing 80 may be lined with metal or completely formed of metal to provide EMI shielding”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include further comprising:a fiber pigtailed package enclosing the photodiode chip. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that packaging is useful to protect device with good output pin configuration and fiber pigtailed package is known to give good results to transfer light into photodiode. In regard to claim 10 Shi and Uematsu as combined does not specifically teach further comprising:a fiber pigtailed package enclosing the avalanche photodiode chip. See Shi teaches packages, see Fig. 1, Fig. 5 the “TO-header 521, a TO-cap 522” together form a package, “FIG. 5 shows a design of a 6-pin TO solution mounted with heater integrated Ge/Si APD in accordance with an embodiment of the present disclosure”, see paragraph 0003 “Avalanche photodiodes (APDs) are widely utilized for fiber-optic communications due to higher sensitivity”. See Lebby “Referring additionally to FIGS. 28 and 29, the optoelectric package, including optoelectric module 10 enclosed in housing 80, is illustrated in a discrete pigtail arrangement” “FIGS. 28 and 29 are two isometric views of the optoelectric package of FIG. 24 pigtailed with an optical fiber” see packaging examples “Turning now to FIGS. 18, 19, and 20, another housing 80 is illustrated for enclosing and mounting a discrete optoelectric module. Housing 80 has a substantially rectangular cross-section with a small opening 81 at one end and a larger opening or substantially hollow interior 82 accessible at the other end. A pair of mounting pins 84 extend from the lower surface for surface mounting the complete package. It will of course be understood that other shapes, both interior and exterior, may be devised for specific applications, and other or additional mounting pins or other mounting devices may be devised for specific mounting situations. (28) Turning to FIGS. 21, 22, and 23, an optoelectric module 10, with a multilayer hermetic ceramic package including a connection board (e.g., connection board 64) having outwardly extending leads 65 attached thereto, is provided. Module 10 may be, for example, similar to the optoelectric module described and illustrated in FIGS. 1 and 2. Optical fiber receiving opening 21 in receptacle 20 can best be seen in FIG. 23. (29) Referring additionally to FIGS. 24, 25, 26, and 27, module 10 of FIG. 21 is placed in housing 80 of FIG. 20 so that the end of receptacle 20 extends slightly through opening 81. Also, as can best be seen in FIG. 24 or 26, connection board 64 is positioned to seal opening 82 in housing 80. Alternatively, connection board 64 is sealed in opening 82 by some convenient means, such as epoxy or the like. In a preferred embodiment, module 10 is press fitted directly into housing 80. In some embodiments housing 80 may be lined with metal or completely formed of metal to provide EMI shielding”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include further comprising:a fiber pigtailed package enclosing the avalanche photodiode chip. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that packaging is useful to protect device with good output pin configuration and fiber pigtailed package is known to give good results to transfer light into photodiode. Claim(s) 4, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi and Uematsu as combined and further in view of van de Grift et al. (US 4845462 A) hereafter referred to as van de Grift In regard to claim 4 Shi and Uematsu as combined teaches wherein the first heating element contact and the second heating element contact are in [see 112 rejection in parent claim 1 it was understood that “heating element contact” refers to an electrical contact and this was addressed in claim 1] electrical contact with the heating element and but does not specifically teach are positioned on two ends of a width of the heating element in the submount. However see Shi Fig. 2, Fig. 3, Fig. 4 see “a doped region doped with dopants of the first type (e.g., n type) is formed in silicon substrate layer 301 by ion implantation process to function as at least one heater 305” see the resistors are depicted as straight lines in cross-section see that the contacts “electrically-conductive pads (e.g., aluminum pads) may be formed on top of the at least one heater 305” are essentially at the two ends and note that Shi does not suggest spiral shape or anything, the resistors are just depicted as a straight line. See Uematsu “a heater pattern 501 is formed by using a heater material” “Although the reference pattern 502 may have any shape”. The Examiner notes that from an obviousness standpoint, a straight line is the simplest way to connect two end points in other words, a person of ordinary skill in the art would be aware that a resistive material directly connecting two contacts is the simplest resistor, thus the claim is essentially claiming the simplest structure of a resistor, which should be known to any person of ordinary skill in the art. See van de Grift Fig. 3 shows this simplest configuration, “The inventive solution to this problem is illustrated in FIGS. 3 and 4 in which the resistance body is denoted by 1a, the end contacts by 2a and 3a”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include are positioned on two ends of a width of the heating element in the submount. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is ease of design and manufacture because this is the easiest and simplest configuration of a resistor. In regard to claim 12 Shi and Uematsu as combined teaches wherein the first heating element contact and the second heating element contact are in [see 112 rejection in parent claim 9 it was understood that “heating element contact” refers to an electrical contact and this was addressed in claim 9] electrical contact with the heating element and but does not specifically teach are positioned on two sides of a width of the heating element in the thermally conductive submount. However see Shi Fig. 2, Fig. 3, Fig. 4 see “a doped region doped with dopants of the first type (e.g., n type) is formed in silicon substrate layer 301 by ion implantation process to function as at least one heater 305” see the resistors are depicted as straight lines in cross-section see that the contacts “electrically-conductive pads (e.g., aluminum pads) may be formed on top of the at least one heater 305” are essentially at the two ends and note that Shi does not suggest spiral shape or anything, the resistors are just depicted as a straight line. See Uematsu “a heater pattern 501 is formed by using a heater material” “Although the reference pattern 502 may have any shape”. The Examiner notes that from an obviousness standpoint, a straight line is the simplest way to connect two end points in other words, a person of ordinary skill in the art would be aware that a resistive material directly connecting two contacts is the simplest resistor, thus the claim is essentially claiming the simplest structure of a resistor, which should be known to any person of ordinary skill in the art. See van de Grift Fig. 3 shows this simplest configuration, “The inventive solution to this problem is illustrated in FIGS. 3 and 4 in which the resistance body is denoted by 1a, the end contacts by 2a and 3a”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include are positioned on two sides of a width of the heating element in the thermally conductive submount. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is ease of design and manufacture because this is the easiest and simplest configuration of a resistor. Claim(s) 5, 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi and Uematsu as combined and further in view of Andreou et al. (US 20170131143 A1) hereafter referred to as Andreou In regard to claim 5 Shi and Uematsu as combined teaches wherein the photodiode includes an anode [see a diode has anode and cathode by definition] and a cathode, and but does not state that the heating element is closer to the cathode than to the anode. However cathode is commonly at the bottom, see Andreou Fig. 2 “avalanche photodiode 200 may include a p++ region 202 substantially overlying a central n-well 204. The combination of this central n-well 204 and the p++ region 202 forms a photosensitive junction and avalanche multiplication region 206 in the center of the avalanche photodiode 200. A deep n-well 208, such as may be formed through the process of buried ion implantation during fabrication, may substantially underlie the central n-well 204”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include that the heating element is closer to the cathode than to the anode. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that cathode at bottom is known to give good results for photodiode. In regard to claim 13 Shi and Uematsu as combined teaches wherein the avalanche photodiode chip includes an anode [see a diode has anode and cathode by definition] and a cathode, and but does not state that the heating element is closer to the cathode than to the anode. However cathode is commonly at the bottom, see Andreou Fig. 2 “avalanche photodiode 200 may include a p++ region 202 substantially overlying a central n-well 204. The combination of this central n-well 204 and the p++ region 202 forms a photosensitive junction and avalanche multiplication region 206 in the center of the avalanche photodiode 200. A deep n-well 208, such as may be formed through the process of buried ion implantation during fabrication, may substantially underlie the central n-well 204”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include that the heating element is closer to the cathode than to the anode. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that cathode at bottom is known to give good results for photodiode. Claim(s) 7, 8, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi and Uematsu as combined and further in view of Liu et al. (CN 112103276 A) hereafter referred to as Liu. In regard to claim 7 Shi and Uematsu as combined teaches [see this controller is taught implicitly “One approach to maintain Ge PD performance at lower temperature is to mount a 30Ω resistor on the top-surface of a 6-pin transistor outline (TO)-header, as illustrated in FIG. 1. When a 3.3V bias voltage is applied on the resistor, the heat generated in the resistor can heat up the TO-header and increase TO temperature by about tens of degrees depending on consumption power. Accordingly, the sensitivity performance of Ge/Si APDs can be improved to meet specified requirements”, see that some “controller” must be performing the act of “When a 3.3V bias voltage is applied”, thus controller is taught implicitly ] wherein the heating element is controlled by a controller to heat the photodiode chip. See Shi paragraph 0017 “When the environmental temperature decreases to a certain point, e.g., below a threshold temperature, a temperature control loop may be automatically triggered to apply a proper bias voltage on the at least one heater 205, i.e., to activate or turn on the at least one heater 205”. However this is common in the art see Liu teaches “Preferably, avalanche photoelectric detector of the integrated filter amplifying chip further comprises a temperature control circuit, the temperature control circuit comprises a temperature collecting ADC; processor and refrigerator; the temperature collecting ADC is connected with two ends of the thermistor; the refrigerator driving is connected with the refrigerator; one end of the processor is connected with the temperature collecting ADC; the other end is connected with the refrigerator driving; the temperature control circuit is set on the non-cooling area of the ceramic substrate; and it is also sealed in the shell. in the working process of the detector, adjusting the refrigerating power of the refrigerator according to the temperature change, making the APD work in a stable low temperature environment, and the reverse bias voltage and the gate control signal size are unchanged, so as to ensure low APD dark current noise; high sensitivity state, so the detector can keep stable detection efficiency” “Preferably, the avalanche photoelectric detector further comprises a thermistor; when the APD chip temperature changes, the resistance of the thermistor will change, and feedback to the processor through the temperature collecting ADC; the processor controls the refrigerator to drive according to the resistance value fed back by the temperature collecting ADC; The refrigerator drives and controls the refrigerating power of the refrigerator. namely adjusting different refrigerating power according to different temperature, the working temperature of the APD chip is constant” Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include claim 7 limitation wherein the heating element is controlled by a controller to heat the photodiode chip and claim 8 limitation further comprising:a thermistor positioned to detect a temperature of the heating element, the thermistor to send temperature measurements to a controller and the controller to control, by at least one hardware processor, the temperature of the heating element based on the temperature measurements. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that control circuit elements such as thermistor, processor are standard in the art and are known to provide good results for controlling temperature. In regard to claim 8 Shi and Uematsu and Liu as combined in claim 7 teaches further comprising:a thermistor [see claim 7] positioned to detect a temperature of the heating element, the thermistor to send temperature measurements to a controller and the controller to control, by at least one hardware processor, the temperature of the heating element based on the temperature measurements. In regard to claim 14 Shi and Uematsu as combined does not specifically teach further comprising:a thermistor positioned to detect a temperature of the heating element, the thermistor to send temperature measurements to a controller and the controller to control the temperature of the heating element based on the temperature measurements. See Shi “One approach to maintain Ge PD performance at lower temperature is to mount a 30Ω resistor on the top-surface of a 6-pin transistor outline (TO)-header, as illustrated in FIG. 1. When a 3.3V bias voltage is applied on the resistor, the heat generated in the resistor can heat up the TO-header and increase TO temperature by about tens of degrees depending on consumption power. Accordingly, the sensitivity performance of Ge/Si APDs can be improved to meet specified requirements”, see that some “controller” must be performing the act of “When a 3.3V bias voltage is applied”, thus controller is taught implicitly, see paragraph 0017 “When the environmental temperature decreases to a certain point, e.g., below a threshold temperature, a temperature control loop may be automatically triggered to apply a proper bias voltage on the at least one heater 205, i.e., to activate or turn on the at least one heater 205”. However this is common in the art see Liu teaches “Preferably, avalanche photoelectric detector of the integrated filter amplifying chip further comprises a temperature control circuit, the temperature control circuit comprises a temperature collecting ADC; processor and refrigerator; the temperature collecting ADC is connected with two ends of the thermistor; the refrigerator driving is connected with the refrigerator; one end of the processor is connected with the temperature collecting ADC; the other end is connected with the refrigerator driving; the temperature control circuit is set on the non-cooling area of the ceramic substrate; and it is also sealed in the shell. in the working process of the detector, adjusting the refrigerating power of the refrigerator according to the temperature change, making the APD work in a stable low temperature environment, and the reverse bias voltage and the gate control signal size are unchanged, so as to ensure low APD dark current noise; high sensitivity state, so the detector can keep stable detection efficiency” “Preferably, the avalanche photoelectric detector further comprises a thermistor; when the APD chip temperature changes, the resistance of the thermistor will change, and feedback to the processor through the temperature collecting ADC; the processor controls the refrigerator to drive according to the resistance value fed back by the temperature collecting ADC; The refrigerator drives and controls the refrigerating power of the refrigerator. namely adjusting different refrigerating power according to different temperature, the working temperature of the APD chip is constant” Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include further comprising:a thermistor positioned to detect a temperature of the heating element, the thermistor to send temperature measurements to a controller and the controller to control the temperature of the heating element based on the temperature measurements. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that control circuit elements such as thermistor, processor are standard in the art and are known to provide good results for controlling temperature. Claim(s) 9, 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi et al. (US 20160155883 A1) hereafter referred to as Shi in view of Uematsu et al. (US 20210274599 A1) hereafter referred to as Uematsu In regard to claim 9 Shi teaches a photodiode module [“FIG. 1 shows a conventional 6-pin TO-header solution for Ge/Si APD. (a) TO-header mounted with Ge/Si APD chip and resistor heater and (b) Ge/Si APD chip”] comprising: a submount [see Fig. 1 see “6-pin transistor outline (TO)-header”]; an avalanche photodiode [see Fig. 1 see “Ge/Si APD chip”] chip on the submount; a heating element, with a first heating element contact and a second heating element contact, [see Fig. 1 see “Resistor heater” “a 30Ω resistor” “When a 3.3V bias voltage is applied on the resistor, the heat generated in the resistor can heat up the TO-header and increase TO temperature by about tens of degrees depending on consumption power” , see under broadest reasonable interpretation if electricity is supplied, then implicitly the contacts are disclosed], an electrical isolator [see Fig. 1 see that the “TO-header” is not conductive] but does not specifically teach that the submount is thermally conductive, and with a first heating element contact and a second heating element contact,formed within the thermally conductive submount vertically below the avalanche photodiode chip; and an electrical isolator positioned between the heating element and the avalanche photodiode chip. However these limitations are basic knowledge in the art, under broadest reasonable interpretation if electricity is supplied, then there implicitly is a contact at either end of the resistor heater, a resistor by definition has two terminals, see Shi teaches “electrically-conductive pads (e.g., aluminum pads) may be formed on top of the at least one heater 305”, see Uematsu Fig. 2, Fig. 3 see that in Fig. 3 “the wafer W is attracted and fixed to the attraction surface S1 of the plate-shaped member 10” “The three driver electrode pairs 600 correspond to three heater electrodes 50 (50A, 50B, 50C). As shown in FIGS. 2 to 4, one driver electrode 60 of the pair of driver electrodes 60 constituting one driver electrode pair 600 (for example, the driver electrode pair 600A) is electrically connected to one heater pad section 52 of the corresponding heater electrode 50 (for example, the heater electrode 50A) through a heater-side via 71 formed by using a conductive material. The other driver electrode 60 of the pair of driver electrodes 60 constituting the driver electrode pair 600 (for example, the driver electrode pair 600A) is electrically connected to the other heater pad section 52 of the corresponding heater electrode 50 (for example, the heater electrode 50A) through a heater-side via 71”, see “the plurality of heater electrodes 50 are disposed so as to be sandwiched between the cover layer 112 and the substrate layer 111 constituting the lower portion 102 of the plate-shaped member 10” “In the present embodiment, the substrate layer ill and the cover layer 112 constituting the lower portion 102 of the plate-shaped member 10 are both formed from a sintered body made of a ceramic (for example, alumina or aluminum nitride)” “As shown in FIG. 2, a chuck electrode 40 made of a conductive material (for example, tungsten, molybdenum, or platinum) is disposed in the plate-shaped member 10” “The electrostatic chuck 100 has a structure for supplying electric power to the chuck electrode 40”, see the use of adhesive to join different materials, “joining portion 30 is constituted by, for example, an adhesive, such as a silicone-based resin, an acrylic resin, or an epoxy-based resin” “intermediate joining portion 104 of the plate-shaped member 10 is constituted by, for example, an adhesive, such as a silicone-based resin, an acrylic resin, or an epoxy-based resin, glass, or a metal”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include the functionality of Uematsu i.e. to modify Shi to include that the submount is thermally conductive, and with a first heating element contact and a second heating element contact,formed within the thermally conductive submount vertically below the avalanche photodiode chip; and an electrical isolator positioned between the heating element and the avalanche photodiode chip. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is thermally conductive helps transfer heat to the photodiode, vertically below gives efficient transfer of heat and allows localized heating, the resistor heater needs electricity to operate and uses contacts to connect to the supply and that isolation is needed since the heating element provides heat and not electricity to the photodiode to avoid electrical interference of any sort. In regard to claim 11 Shi and Uematsu as combined does not specifically teach wherein the heating element is smaller in length and width than the avalanche photodiode chip. However see Uematsu Fig. 2, Fig. 3 see that “three heater electrodes 50 (50A, 50B, 50C)” “the heater electrode 50C is disposed in the segment Zc on a side closest to the center”, i.e. there is provision to heat only a central part of the semiconductor device. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include wherein the heating element is smaller in length and width than the avalanche photodiode chip. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that Shi only wants to heat the photodiode and doesn’t need to heat anything else. Claim(s) 15, 16, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi et al. (US 20160155883 A1) hereafter referred to as Shi in view of Uematsu et al. (US 20210274599 A1) hereafter referred to as Uematsu and further in view of Lebby et al. (US 6999644 B1) hereafter referred to as Lebby. In regard to claim 15 Shi teaches a photodiode module [“FIG. 1 shows a conventional 6-pin TO-header solution for Ge/Si APD. (a) TO-header mounted with Ge/Si APD chip and resistor heater and (b) Ge/Si APD chip”] comprising: a photodiode chip [see Fig. 1 see “Ge/Si APD chip”]; a heating element, with a first heating element contact and a second heating element contact, [see Fig. 1 see “Resistor heater” “a 30Ω resistor” “When a 3.3V bias voltage is applied on the resistor, the heat generated in the resistor can heat up the TO-header and increase TO temperature by about tens of degrees depending on consumption power” , see under broadest reasonable interpretation if electricity is supplied, then implicitly the contacts are disclosed], an electrical isolator [see Fig. 1 see that the “TO-header” is not conductive] a submount [see Fig. 1 see “6-pin transistor outline (TO)-header”] to support the photodiode chip and the heating element; and but does not specifically teach with a first heating element contact and a second heating element contact,formed vertically below the photodiode chip; and an electrical isolator positioned between the heating element and the photodiode chip; that the submount, formed of a thermally conductive material ; and a fiber pigtailed package enclosing the photodiode chip, the heating element, and the submount. However these limitations are common knowledge in the art, under broadest reasonable interpretation if electricity is supplied, then there implicitly is a contact at either end of the resistor heater, a resistor by definition has two terminals, see Shi teaches “electrically-conductive pads (e.g., aluminum pads) may be formed on top of the at least one heater 305”, see Uematsu Fig. 2, Fig. 3 see that in Fig. 3 “the wafer W is attracted and fixed to the attraction surface S1 of the plate-shaped member 10” “The three driver electrode pairs 600 correspond to three heater electrodes 50 (50A, 50B, 50C). As shown in FIGS. 2 to 4, one driver electrode 60 of the pair of driver electrodes 60 constituting one driver electrode pair 600 (for example, the driver electrode pair 600A) is electrically connected to one heater pad section 52 of the corresponding heater electrode 50 (for example, the heater electrode 50A) through a heater-side via 71 formed by using a conductive material. The other driver electrode 60 of the pair of driver electrodes 60 constituting the driver electrode pair 600 (for example, the driver electrode pair 600A) is electrically connected to the other heater pad section 52 of the corresponding heater electrode 50 (for example, the heater electrode 50A) through a heater-side via 71”, see “the plurality of heater electrodes 50 are disposed so as to be sandwiched between the cover layer 112 and the substrate layer 111 constituting the lower portion 102 of the plate-shaped member 10” “In the present embodiment, the substrate layer ill and the cover layer 112 constituting the lower portion 102 of the plate-shaped member 10 are both formed from a sintered body made of a ceramic (for example, alumina or aluminum nitride)” “As shown in FIG. 2, a chuck electrode 40 made of a conductive material (for example, tungsten, molybdenum, or platinum) is disposed in the plate-shaped member 10” “The electrostatic chuck 100 has a structure for supplying electric power to the chuck electrode 40”, see the use of adhesive to join different materials, “joining portion 30 is constituted by, for example, an adhesive, such as a silicone-based resin, an acrylic resin, or an epoxy-based resin” “intermediate joining portion 104 of the plate-shaped member 10 is constituted by, for example, an adhesive, such as a silicone-based resin, an acrylic resin, or an epoxy-based resin, glass, or a metal”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include the functionality of Uematsu i.e. to modify Shi to include with a first heating element contact and a second heating element contact,formed vertically below the photodiode chip; and an electrical isolator positioned between the heating element and the photodiode chip; that the submount, formed of a thermally conductive material . The motivation is thermally conductive helps transfer heat to the photodiode, vertically below gives efficient transfer of heat and allows localized heating, the resistor heater needs electricity to operate and uses contacts to connect to the supply and that isolation is needed since the heating element provides heat and not electricity to the photodiode to avoid electrical interference of any sort. Shi and Uematsu as combined does not teach and a fiber pigtailed package enclosing the photodiode chip, the heating element, and the submount. See Shi teaches packages, see Fig. 1, Fig. 5 the “TO-header 521, a TO-cap 522” together form a package, “FIG. 5 shows a design of a 6-pin TO solution mounted with heater integrated Ge/Si APD in accordance with an embodiment of the present disclosure”, see paragraph 0003 “Avalanche photodiodes (APDs) are widely utilized for fiber-optic communications due to higher sensitivity”. See Lebby “Referring additionally to FIGS. 28 and 29, the optoelectric package, including optoelectric module 10 enclosed in housing 80, is illustrated in a discrete pigtail arrangement” “FIGS. 28 and 29 are two isometric views of the optoelectric package of FIG. 24 pigtailed with an optical fiber” see packaging examples “Turning now to FIGS. 18, 19, and 20, another housing 80 is illustrated for enclosing and mounting a discrete optoelectric module. Housing 80 has a substantially rectangular cross-section with a small opening 81 at one end and a larger opening or substantially hollow interior 82 accessible at the other end. A pair of mounting pins 84 extend from the lower surface for surface mounting the complete package. It will of course be understood that other shapes, both interior and exterior, may be devised for specific applications, and other or additional mounting pins or other mounting devices may be devised for specific mounting situations. (28) Turning to FIGS. 21, 22, and 23, an optoelectric module 10, with a multilayer hermetic ceramic package including a connection board (e.g., connection board 64) having outwardly extending leads 65 attached thereto, is provided. Module 10 may be, for example, similar to the optoelectric module described and illustrated in FIGS. 1 and 2. Optical fiber receiving opening 21 in receptacle 20 can best be seen in FIG. 23. (29) Referring additionally to FIGS. 24, 25, 26, and 27, module 10 of FIG. 21 is placed in housing 80 of FIG. 20 so that the end of receptacle 20 extends slightly through opening 81. Also, as can best be seen in FIG. 24 or 26, connection board 64 is positioned to seal opening 82 in housing 80. Alternatively, connection board 64 is sealed in opening 82 by some convenient means, such as epoxy or the like. In a preferred embodiment, module 10 is press fitted directly into housing 80. In some embodiments housing 80 may be lined with metal or completely formed of metal to provide EMI shielding”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include and a fiber pigtailed package enclosing the photodiode chip, the heating element, and the submount. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that packaging is useful to protect device with good output pin configuration and fiber pigtailed package is known to give good results to transfer light into photodiode. In regard to claim 16 Shi, Uematsu and Lebby as combined does not specifically teach wherein the heating element is smaller in length and width than the photodiode chip. However see Uematsu Fig. 2, Fig. 3 see that “three heater electrodes 50 (50A, 50B, 50C)” “the heater electrode 50C is disposed in the segment Zc on a side closest to the center”, i.e. there is provision to heat only a central part of the semiconductor device. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include wherein the heating element is smaller in length and width than the photodiode chip. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that Shi only wants to heat the photodiode and doesn’t need to heat anything else. In regard to claim 19 Shi Uematsu and Lebby as combined teaches wherein the heating element is formed within [see combination, see Uematsu Fig. 2 see that heater is embedded below the top surface] a top surface of the submount. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi Uematsu and Lebby as combined and further in view of Andreou et al. (US 20170131143 A1) hereafter referred to as Andreou In regard to claim 17 Shi Uematsu and Lebby as combined teaches wherein the photodiode chip includes an anode [see a diode has anode and cathode by definition] and a cathode, and but does not state that the heating element is closer to the cathode than to the anode. However cathode is commonly at the bottom, see Andreou Fig. 2 “avalanche photodiode 200 may include a p++ region 202 substantially overlying a central n-well 204. The combination of this central n-well 204 and the p++ region 202 forms a photosensitive junction and avalanche multiplication region 206 in the center of the avalanche photodiode 200. A deep n-well 208, such as may be formed through the process of buried ion implantation during fabrication, may substantially underlie the central n-well 204”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include that the heating element is closer to the cathode than to the anode. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that cathode at bottom is known to give good results for photodiode. Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi Uematsu and Lebby as combined and further in view of van de Grift et al. (US 4845462 A) hereafter referred to as van de Grift In regard to claim 18 Shi, Uematsu and Lebby as combined teaches wherein the first heating element contact and the second heating element contact are in [see 112 rejection in parent claim 15 it was understood that “heating element contact” refers to an electrical contact and this was addressed in claim 15] electrical contact with the heating element and but does not specifically teach are positioned on two ends of a width of the heating element. However see Shi Fig. 2, Fig. 3, Fig. 4 see “a doped region doped with dopants of the first type (e.g., n type) is formed in silicon substrate layer 301 by ion implantation process to function as at least one heater 305” see the resistors are depicted as straight lines in cross-section see that the contacts “electrically-conductive pads (e.g., aluminum pads) may be formed on top of the at least one heater 305” are essentially at the two ends and note that Shi does not suggest spiral shape or anything, the resistors are just depicted as a straight line. See Uematsu “a heater pattern 501 is formed by using a heater material” “Although the reference pattern 502 may have any shape”. The Examiner notes that from an obviousness standpoint, a straight line is the simplest way to connect two end points in other words, a person of ordinary skill in the art would be aware that a resistive material directly connecting two contacts is the simplest resistor, thus the claim is essentially claiming the simplest structure of a resistor, which should be known to any person of ordinary skill in the art. See van de Grift Fig. 3 shows this simplest configuration, “The inventive solution to this problem is illustrated in FIGS. 3 and 4 in which the resistance body is denoted by 1a, the end contacts by 2a and 3a”. Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include are positioned on two ends of a width of the heating element. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is ease of design and manufacture because this is the easiest and simplest configuration of a resistor. Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shi, Uematsu and Lebby as combined and further in view of Liu et al. (CN 112103276 A) hereafter referred to as Liu. In regard to claim 20 Shi, Uematsu and Lebby as combined does not specifically teach further comprising:a thermistor positioned to detect a temperature of the heating element, the thermistor to send temperature measurements to a controller and the controller to control, by at least one hardware processor, the temperature of the heating element based on the temperature measurements. See Shi “One approach to maintain Ge PD performance at lower temperature is to mount a 30Ω resistor on the top-surface of a 6-pin transistor outline (TO)-header, as illustrated in FIG. 1. When a 3.3V bias voltage is applied on the resistor, the heat generated in the resistor can heat up the TO-header and increase TO temperature by about tens of degrees depending on consumption power. Accordingly, the sensitivity performance of Ge/Si APDs can be improved to meet specified requirements”, see that some “controller” must be performing the act of “When a 3.3V bias voltage is applied”, thus controller is taught implicitly, see paragraph 0017 “When the environmental temperature decreases to a certain point, e.g., below a threshold temperature, a temperature control loop may be automatically triggered to apply a proper bias voltage on the at least one heater 205, i.e., to activate or turn on the at least one heater 205”. However this is common in the art see Liu teaches “Preferably, avalanche photoelectric detector of the integrated filter amplifying chip further comprises a temperature control circuit, the temperature control circuit comprises a temperature collecting ADC; processor and refrigerator; the temperature collecting ADC is connected with two ends of the thermistor; the refrigerator driving is connected with the refrigerator; one end of the processor is connected with the temperature collecting ADC; the other end is connected with the refrigerator driving; the temperature control circuit is set on the non-cooling area of the ceramic substrate; and it is also sealed in the shell. in the working process of the detector, adjusting the refrigerating power of the refrigerator according to the temperature change, making the APD work in a stable low temperature environment, and the reverse bias voltage and the gate control signal size are unchanged, so as to ensure low APD dark current noise; high sensitivity state, so the detector can keep stable detection efficiency” “Preferably, the avalanche photoelectric detector further comprises a thermistor; when the APD chip temperature changes, the resistance of the thermistor will change, and feedback to the processor through the temperature collecting ADC; the processor controls the refrigerator to drive according to the resistance value fed back by the temperature collecting ADC; The refrigerator drives and controls the refrigerating power of the refrigerator. namely adjusting different refrigerating power according to different temperature, the working temperature of the APD chip is constant” Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Shi to include further comprising:a thermistor positioned to detect a temperature of the heating element, the thermistor to send temperature measurements to a controller and the controller to control, by at least one hardware processor, the temperature of the heating element based on the temperature measurements. Thus it would be obvious to combine the references to arrive at the claimed invention. The motivation is that control circuit elements such as thermistor, processor are standard in the art and are known to provide good results for controlling temperature. Response to Arguments Applicant's arguments filed 6/29/2026 have been fully considered but they are not persuasive. On page 8 the Applicant argues that new claim amendments are not shown by Huang reference. The Examiner disagrees that ceramic is not thermally conductive, that is untrue, ceramic does have thermal conduction. See above the claim amendments are rejected by a different reference combination due to ease of rejection of the other new claim limitations that were are added. On page 10, 11 the Applicant argues that new claim amendments are not shown by Shi reference, “in Shi, the heating element 305 is formed off to one side of substrate 301, and not vertically below the photodiode 304. Moreover, the substrate 301 is not disclosed to be a thermally conductive material” “In addition, Shi shows two heating-element contacts formed on top of the heating element 305 and substrate 301. Thus, the two heating element contacts in Shi are not formed with the heating element 305 within the substrate 301, as recited in claim 1” See above the new claim amendments are rejected by a different reference showing that the new claim limitations are obvious in view of the prior art combination. On page 12 the Applicant argues “Furthermore, the Examiner admits that Shi and Huang, as combined, does not teach "an electrical isolator positioned between the heating element and the photodiode chip to block a flow of electricity between the heating element and the photodiode chip," as recited in claim 1. Final Office Action, page 6. The Examiner then asserts that it would have been obvious to add an electrical isolator between the photodiode and the heating element. The motivation is to "operate the heater independently and the photodiode independently without affecting each other" (Final Office Action, page 7). However, as discussed above with respect to Huang, it would not have been obvious for one skilled in the art to add an electrical isolator between the photodiode 1 and the heating element 2 in Huang. In Shi, with the two electrical contacts connected to the heating element 305, the heating element 305 already operates independently from the photodiode 304. Thus, there is no need to add an electrical insulator to operate the heating element 305 independently from the photodiode 304. Therefore, after Shi and Huang were combined, as proposed in the Office Action, it would not have been obvious for one skilled in the art to add "an electrical isolator positioned between the heating element and the photodiode chip to block a flow of electricity between the heating element and the photodiode chip," as recited in claim 1”. See above the new claim amendments are rejected by a different reference showing that the new claim limitations are obvious in view of the prior art combination because of ease of rejection of the new claim lilitations. The Examiner responds that the Applicant admits that Shi teaches “already operates independently from the photodiode” and the Examiner notes that as in Shi, any person of ordinary skill in the art understands that insulation prevents unwanted circuit interation, this is basic engineering taught even in high schools, there is nothing novel about insulation, and the Examiner responds that any assertion by the Applicant that Huang is teaching that the heater is electrically connected to the photodiode is untrue, Huang does not say that and no person of ordinary skill in the art would believe that Huang is stating that, and ceramic is insulation that conducts heat. On pages 6-15 the Applicant argues that new claim amendments are not shown by the prior art. The Examiner responds that see above the new claim amendments are rejected by a different reference showing that the new claim limitations are obvious in view of the prior art combination. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt D Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893
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Prosecution Timeline

Show 2 earlier events
Dec 10, 2025
Interview Requested
Dec 16, 2025
Applicant Interview (Telephonic)
Dec 16, 2025
Examiner Interview Summary
Jan 09, 2026
Response Filed
Mar 30, 2026
Final Rejection mailed — §103, §112
Jun 29, 2026
Request for Continued Examination
Jul 01, 2026
Response after Non-Final Action
Sep 04, 2026
Non-Final Rejection mailed — §103, §112 (current)

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