Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments filed 10/22/2025 with respect to Mattella et al and Van Zeiji et al have been fully considered and are persuasive. The rejection dated 7/23/2025 has been withdrawn.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 7-14 are rejected under 35 U.S.C. 103 as being unpatentable over He et al (US 2004/0204037) in view of Staszewski (US 2010/0091688).
General overview of the prior art:
He (US 2004/0204037) discloses a radio frequency (RF) front end for dual-mode wireless transceivers having dual-band antennas, multiple receiving paths, multiple amplifiers and switches to route antenna signals to transmit/receive paths. He para 0011 (first and second dual-band antennas, first and second signal receiving paths), 0015–0021 (description of two receiving paths, filters/baluns), 0018–0024 (switches 31–33, logic control units that route antenna to receive/transmit paths and enable/disable amplifiers/PAs), and 0021 (discussion of f1 Rx and f2 Rx through filters 101/102 and baluns 201/202). He clearly teaches an antenna, first and second receiving circuits coupled to the antenna through switch units, switching circuitry coupled to the antenna and to receive paths, and multiple amplifiers associated with the front end and selectable by switch/logic control.
Staszeweski (US 2010/0091688) teaches simultaneous multiple-signal reception using multiple RX front end modules and frequency-division multiplexing of down converted IF signals to shared back-end processing. Staszeweski figure 5, para 0011–0013 and 0018–0019 (each front end generates IF signals that are frequency-division multiplexed and combined for shared processing; simultaneous reception of multiple RF signals of different standards). Staszeweski clearly shows receiving multiple signals of different protocols simultaneously using multiple receiver front ends and the operational mode of simultaneous reception.
Regarding claims 1, 7 and 12, He teaches an antenna (dual-band antennas 40a/40b and para 0015-0018), a first receiving circuit coupled to the antenna, wherein the first receiving circuit is further coupled to a first amplifying circuit and a second amplifying circuit (He 0018-0021-RF front-end with receiving paths and multiple amplifiers/PAs;
a switch circuit coupled to the antenna and the first receiving circuit (He switches 31–33 and para 0018-0023 connecting antennas to receive/transmit paths
and a second receiving circuit coupled to the antenna though the switch circuit (He second receiving path with balun 202/filter 102 selectively connected by switches para 0019–0021);
wherein when the signal receiver is configured to receive one of the first communication signal and the second communication signal, the switch circuit is turned off, the signal receiver controls the first amplifying circuit to process the first communication signal, and controls the second amplifying circuit to process the second communication signal (He teaches control logic that selects receive vs transmit paths and enables/disables amplifiers/PAs 0022–0026. It is a routine design choice to use He’s control signals to provide the single-signal behavior recited.,
and wherein the first communication signal and the second communication signal correspond to different communication protocols respectively (He explicitly teaches 802.11a/b dual-mode operation 0009–0016. Also note, Staszeweski similarly contemplates multiple wireless standards 0011.
He discloses switching and enabling/disabling and teaches antenna selection and path routing but fails to specifically disclose wherein when the signal receiver is configured to receive a first communication signal and a second communication signal simultaneously, the switch circuit is turned on so that the first amplifying circuit processes the first communication signal and the second receiving circuit receives the second communication signal through the switch circuit and the antenna.
However Staszeweski explicitly teaches the concept of simultaneous multi-signal reception of different wireless standards using multiple RX front-end circuits. Further describing front-end circuits that generate multiple IF signals, frequency-division multiplexing of those IF signals into a combined IF, and shared processing (shared ADC/back-end) - para 0011–0013, 0018–0021 and fig. 5).
Consequently Staszeweski shows simultaneous reception of multiple RF signals of different protocols, the practical operation of multiple front ends active simultaneously to receive different signals and the concept of sharing processing resources (and addressing clocking/synchronization issues). Thus, Staszeweski supplies the explicit operational teaching of “how” to receive two different protocol signals at the same time using multiple receive circuits- a teaching He lacks in explicit operational detail.
Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine He’s disclosed switchable multi-path front-end hardware with known methods for simultaneous multi-front-end reception (as taught by Staszeweski) in order to achieve the known advantages of reduced hardware, fewer antennas, lower insertion loss.
Examiner’s note – the limitation “the receiving circuit is further coupled to a first amplifying circuit and a second amplifying circuit” is structurally vague and can be broadly read as the receiving circuit has access to two amplification paths which is routine design. In addition, the claim recites what the switch does not how it does it. The control logic is described at a functional level. He and Staszeweski disclose enabling and disabling paths, simultaneous activation and protocol dependent control. Unless applicant can show timing constraints, phase alignment, interference suppression and non-obvious sequencing, the switch behavior is routine.
Regarding claims 3, 11 and 13, He as modified by Staszeweski disclose switches, filters and path routing but does not explicitly disclose an attenuator integrated in the switch to reduce a received signal level prior to a second receive path. He discusses insertion loss and concerns about adding control components (0006–0008) and shows filters, however no explicit attenuator in switch.
However, official notice is taken that the concept of adjusting signal strength is well known in receiver design, especially in multi mode systems.
Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine an attenuator with He, as modified above, already provided switch topology to prevent overload or to shape levels before the second receiving path.
Regarding claims 4 and 14, He as modified above disclose a bandwidth of the first communication signal and a bandwidth of the second communication signal are different (He explicitly teaches operation in two different bands (e.g., 2.4 GHz vs 5.2–5.8 GHz for 802.11a/b; para 0015–0021).
Regarding claims 5, He as modified above teaches a processing unit comprising an analog-to-digital conversion circuit, and configured to receive the first communication signal and the second communication signal from the first amplifying circuit, the second amplifying circuit and the second receiving circuit for performing analog-to-digital conversion (He teaches RFIC, BBIC and transfer of filtered receive signals to RFIC/BBIC (balun and filter to RFIC para 0020-0021) but does not detail ADC in the front-end; He is a front-end architecture but implies conventional ADC/BB processing in RFIC/BBIC. Staszeweski explicitly teaches combining IFs and a single shared ADC converting a combined IF para 0011–0013, 0018-0021, fig. 5. Staszeweski supplies explicit ADC shared processing teaching.
Note- any modern RF receiver includes ADC’s, both references are digital receivers.
Regarding claim 8, He teaches receiving the second communication signal by the second receiving circuit comprises: turning a switch circuit coupled between the antenna and the second receiving circuit (He explicitly teaches switch network used to route antennas to receive paths 0018–0024).
Regarding claim 9, He as modified above with Staszeweski discloses determining that the antenna does not receive the first communication signal and the second communication signal simultaneously by a controller, and turning off a switch circuit coupled between the antenna and the second receiving circuit. Specifically, He teaches logic control units driving switches and path selection based on Tx/Rx control and antenna diversity signals (0022–0024). He implies controller decisions. Staszeweski teaches system-level control for simultaneous operation and shared resources and controller-based decisions are standard in its architecture. Therefore He discloses switch control and logic and Staszeweski gives reason to control based on simultaneous condition.
Regarding claim 10, He as modified above with Staszeweski disclose the antenna receives the first communication signal and the second communication signal simultaneously, adjusting a first gain of the first receiving circuit according to a first signal strength of the first communication signal, and adjusting a second gain of the second receiving circuit according to a second signal strength of the second communication signal. Specifically, He lacks explicit per-path AGC teaching. Staszeweski does disclose digital RX processing and shared ADC encourage measurement of per-signal levels and therefore AGC; system performs digital decimation, filtering and can implement level estimation (fig. .11, DIGOC, FCU).
Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine Staszeweski’s DSP/AGC functionality with He’s front-end routine AGC functionality in order to prevent mixer/ADC nonlinearity from strong simultaneous interferers and preserve the SNR of weaker simultaneous channels when using a shared ADC.
Claims 6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over He et al (US 2004/0204037) in view of Staszewski (US 2010/0091688) and further in view of Shi (US 2007/0010224).
Regarding claim 6 and 15, He as modified above disclose a front-end structure, switches/paths and simultaneous multi-signal reception across multiple RX front ends . However, fail to specifically disclose the signal receiver is configured to receive the first communication signal and the second communication signal simultaneously, the processing unit is configured to adjust a first gain of the first receiving circuit according to a first signal strength of the first communication signal, and adjust a second gain of the second receiving circuit according to a second signal strength of the second communication signal.
However, Shi shows measuring received signal strength and adjusting LNA gain based on those measurements to maximize SNR while avoiding mixer intermodulation (para 0013, 0014, 0035 and 0036).
Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to use He’s disclosed switchable multi-path front-end hardware with known methods for simultaneous multi-front-end reception (as taught by Staszeweski) with Shi’s RSSI/LNA-AGC reference (explicit RSSI-based gain control) in order to better manage each path’s gain during simultaneous operation.
Conclusion
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/EDAN ORGAD/Supervisory Patent Examiner, Art Unit 2414