Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims Status
2This office action is based upon claims received on 04/27/2026, which replace all prior or other submitted versions of the claims.
Claims 1, 3-15 are pending.
-Claims 1, 7 and 12 are amended.
-Claim 2 is cancelled .
-Claims 1, 3-15 are rejected.
Response to Amendments/Arguments
Applicant amended independent claims 1, 7, and 12 to add the limitation that: “the first amplifying circuit and the second amplifying circuit further connect to a frequency reduction circuit.”
Amendment changes the scope of the claims because it introduces an additional structural relationship involving the amplifying circuits and a frequency reduction circuit that was not expressly recited in the originally rejected claims. However, this added limitation is now addressed by the present rejection, because the cited combination, particularly Staszewski, teaches or at least renders obvious a receiver architecture in which multiple receive paths are down converted to an intermediate frequency and then processed through shared frequency reduction ADC and back-end circuitry.
Accordingly, the amendment does not overcome the rejection.
Applicant's arguments filed 4/27/2026 have been fully considered but they are not persuasive.
Applicant’s remarks have been considered but are not persuasive. He teaches a switch controlled RF front end architecture with antenna routing and selectively enabled receive/transmit paths. Staszewski teaches simultaneous reception of multiple RF signals, including different wireless standards, and frequency-reduced signal processing with shared downstream circuitry. The combination of He and Staszewski would have suggested to one of ordinary skill in the art the claimed receiver and method, including operation in both simultaneous and non-simultaneous modes. Applicant’s argument that the references are incompatible is unconvincing because the references are directed to complementary RF front-end and signal-processing functions, and the claimed arrangement would have yielded predictable results. The amended inclusion of a frequency reduction circuit further aligns the claims with Staszewski. Accordingly, the rejections are maintained.
Applicant’s argument: He and Staszewski are incompatible because He allegedly teaches switching before frequency conversion, while Staszewski teaches combining after frequency conversion
This argument is not persuasive. The prior art references need not disclose identical circuit topologies or identical signal-flow sequences in order to support a conclusion of obviousness. The proper inquiry is whether the combined teachings would have suggested to one of ordinary skill in the art the claimed subject matter with a reasonable expectation of success.
Here, He teaches the basic RF front-end architecture of a wireless transceiver having: an antenna, multiple receiving paths, switches for selectively routing signals, and control logic for enabling or disabling paths depending on operating mode.
Staszewski teaches that multiple signals of different wireless standards may be received simultaneously using multiple receive front ends, each down converting received RF signals to IF signals, which are then combined or otherwise processed through shared downstream circuitry, including ADC and digital RX processing.
The fact that one reference emphasizes switching and the other emphasizes IF combination does not make the teachings incompatible. Rather, they are complementary. A person of ordinary skill would have understood that both references address different aspects of the same general receiver design problem of how to receive multiple communication signals efficiently while minimizing hardware and power.
Further, Applicant’s own amendment adding the frequency reduction circuit makes the combination even more aligned with Staszewski’s teachings. The claims now expressly require that the amplifying circuits connect to a frequency reduction circuit, which is consistent with the down conversion and shared processing disclosed by Staszewski.
Applicant’s argument: He uses a dual-antenna system, whereas the claims require a shared-antenna system.
First, the claims recite “an antenna” and do not exclude additional antennas. The claim language is broad and does not require that only a single antenna may be present in the complete system.
Second, even assuming He discloses a dual antenna arrangement in certain embodiments, that distinction does not avoid obviousness. The question is not whether the reference describes an embodiment identical in every respect, but whether the cited art as a whole would have suggested the claimed configuration. The use of one antenna versus multiple antennas is a design choice dependent on size or cost. Applicant’s own specification itself teaches the desire to reduce antenna count and size as a motivation, which is a known engineering consideration. The combination of He and Staszewski supports a system that selectively routes and processes signals using shared RF front end resources and downstream processing resources. That is sufficient to support the claimed receiver architecture broadly.
Applicant’s argument: He focuses on isolating receiving and transmitting paths, not on multiple receiving paths sharing one antenna under different operating conditions
Applicant overstates the distinction. He clearly teaches a switch controlled RF front end with selectable signal paths and logic controlled routing. The reference is not limited to a single narrow operational context; rather, it discloses a multi-path RF front end in which switches and control logic govern whether particular paths are active.
The claims are directed to a receiver that selectively operates in: a simultaneous-reception mode, and a non-simultaneous reception mode.
He supplies the routing and control framework for such selectivity. Staszewski supplies the simultaneous multi-signal reception aspect. A person of ordinary skill would have found it obvious to combine these teachings to achieve a receiver capable of operating in either mode depending on the signal environment.
The argument that He only addresses transmitter/receiver isolation does not negate the fact that He also teaches switchable receive paths and control of signal routing, which are directly relevant to the claimed invention.
Applicant’s argument: Staszewski is irrelevant because it still uses multiple antennas and focuses on combining IF signals after frequency reduction
This argument is not persuasive.
First, even if Staszewski includes multiple antennas or separate front-end inputs in some embodiments, that does not undermine its relevance. The key disclosure is that Staszewski teaches simultaneous reception of multiple RF signals of different wireless standards and processing of those signals through shared downstream circuitry.
Second, Applicant’s point that Staszewski combines signals after frequency reduction actually supports the rejection rather than defeating it. The amended claims now expressly recite that the first and second amplifying circuits further connect to a frequency reduction circuit. That feature is directly addressed by Staszewski’s disclosure of down conversion to IF and shared ADC / digital processing. The newly added claim language brings the claims closer to the cited art, not farther away from it.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 8 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 8, the phrase “turning a switch circuit” does not specify whether the
switch circuit is turned on or turned off, which may render the scope unclear.
Suggested to amend the claim to recite “turning on the switch circuit” if that is the intended operation supported.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 7-14 are rejected under 35 U.S.C. 103 as being unpatentable over He et al (US 2004/0204037) in view of Staszewski (US 2010/0091688).
General overview of the prior art:
He (US 2004/0204037) discloses a radio frequency (RF) front end for dual-mode wireless transceivers having dual-band antennas, multiple receiving paths, multiple amplifiers and switches to route antenna signals to transmit/receive paths. He para 0011 (first and second dual-band antennas, first and second signal receiving paths), 0015–0021 (description of two receiving paths, filters/baluns), 0018–0024 (switches 31–33, logic control units that route antenna to receive/transmit paths and enable/disable amplifiers/PAs), and 0021 (discussion of f1 Rx and f2 Rx through filters 101/102 and baluns 201/202). He clearly teaches an antenna, first and second receiving circuits coupled to the antenna through switch units, switching circuitry coupled to the antenna and to receive paths, and multiple amplifiers associated with the front end and selectable by switch/logic control.
Staszeweski (US 2010/0091688) teaches simultaneous multiple-signal reception using multiple RX front end modules and frequency-division multiplexing of down converted IF signals to shared back-end processing. Staszeweski figure 5, para 0011–0013 and 0018–0019 (each front end generates IF signals that are frequency-division multiplexed and combined for shared processing; simultaneous reception of multiple RF signals of different standards). Staszeweski clearly shows receiving multiple signals of different protocols simultaneously using multiple receiver front ends and the operational mode of simultaneous reception. Staszeweski further shows the circuit, and the first amplifying circuit and the second amplifying circuit further connect to a frequency reduction circuit (Staszewski expressly teaches a down conversion architecture where each analog RX front end converts RF signals to IF, the IF outputs are combined and then processed and downstream ADC and digital RX processing operate on the frequency-reduced signal (para 0011-0012, 0061-0064 and 0099).
Regarding claims 1, 3-5 and 7-14, He teaches an antenna (dual-band antennas 40a/40b and para 0015-0018), a first receiving circuit coupled to the antenna, wherein the first receiving circuit is further coupled to a first amplifying circuit and a second amplifying circuit (He 0018-0021-RF front-end with receiving paths and multiple amplifiers/PAs;
a switch circuit coupled to the antenna and the first receiving circuit (He switches 31–33 and para 0018-0023 connecting antennas to receive/transmit paths
and a second receiving circuit coupled to the antenna though the switch circuit (He second receiving path with balun 202/filter 102 selectively connected by switches para 0019–0021);
wherein when the signal receiver is configured to receive one of the first communication signal and the second communication signal, the switch circuit is turned off, the signal receiver controls the first amplifying circuit to process the first communication signal, and controls the second amplifying circuit to process the second communication signal (He teaches control logic that selects receive vs transmit paths and enables/disables amplifiers/PAs 0022–0026. It is a routine design choice to use He’s control signals to provide the single-signal behavior recited.,
and wherein the first communication signal and the second communication signal correspond to different communication protocols respectively (He explicitly teaches 802.11a/b dual-mode operation 0009–0016. Also note, Staszeweski similarly contemplates multiple wireless standards 0011.
He discloses switching and enabling/disabling and teaches antenna selection and path routing but fails to specifically disclose wherein when the signal receiver is configured to receive a first communication signal and a second communication signal simultaneously, the switch circuit is turned on so that the first amplifying circuit processes the first communication signal and the second receiving circuit receives the second communication signal through the switch circuit and the antenna.
However Staszeweski explicitly teaches the concept of simultaneous multi-signal reception of different wireless standards using multiple RX front-end circuits. Further describing front-end circuits that generate multiple IF signals, frequency-division multiplexing of those IF signals into a combined IF, and shared processing (shared ADC/back-end) - para 0011–0013, 0018–0021 and fig. 5). Staszeweski further shows the first amplifying circuit and the second amplifying circuit further connect to a frequency reduction circuit (Staszewski expressly teaches a down conversion architecture where each analog RX front end converts RF signals to IF, the IF outputs are combined and then processed and downstream ADC and digital RX processing operate on the frequency-reduced signal (para 0011-0012, 0061-0064 and 0099).
Consequently Staszeweski shows simultaneous reception of multiple RF signals of different protocols, the practical operation of multiple front ends active simultaneously to receive different signals and the concept of sharing processing resources (and addressing clocking/synchronization issues). Thus, Staszeweski supplies the explicit operational teaching of “how” to receive two different protocol signals at the same time using multiple receive circuits- a teaching He lacks in explicit operational detail.
Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine He’s disclosed switchable multi-path front-end hardware with known methods for simultaneous multi-front-end reception (as taught by Staszeweski) in order to achieve the known advantages of reduced hardware, fewer antennas, lower insertion loss.
Examiner’s note – the limitation “the receiving circuit is further coupled to a first amplifying circuit and a second amplifying circuit” is structurally vague and can be broadly read as the receiving circuit has access to two amplification paths which is routine design. In addition, the claim recites what the switch does not how it does it. The control logic is described at a functional level. He and Staszeweski disclose enabling and disabling paths, simultaneous activation and protocol dependent control. Unless applicant can show timing constraints, phase alignment, interference suppression and non-obvious sequencing, the switch behavior is routine.
Regarding claims 3, 11 and 13, He as modified by Staszeweski disclose switches, filters and path routing but does not explicitly disclose an attenuator integrated in the switch to reduce a received signal level prior to a second receive path. He discusses insertion loss and concerns about adding control components (0006–0008) and shows filters, however no explicit attenuator in switch.
However, official notice is taken that the concept of adjusting signal strength is well known in receiver design, especially in multi mode systems.
Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine an attenuator with He, as modified above, already provided switch topology to prevent overload or to shape levels before the second receiving path.
Regarding claims 4 and 14, He as modified above disclose a bandwidth of the first communication signal and a bandwidth of the second communication signal are different (He explicitly teaches operation in two different bands (e.g., 2.4 GHz vs 5.2–5.8 GHz for 802.11a/b; para 0015–0021).
Regarding claims 5, He as modified above teaches a processing unit comprising an analog-to-digital conversion circuit, and configured to receive the first communication signal and the second communication signal from the first amplifying circuit, the second amplifying circuit and the second receiving circuit for performing analog-to-digital conversion (He teaches RFIC, BBIC and transfer of filtered receive signals to RFIC/BBIC (balun and filter to RFIC para 0020-0021) but does not detail ADC in the front-end; He is a front-end architecture but implies conventional ADC/BB processing in RFIC/BBIC. Staszeweski explicitly teaches combining IFs and a single shared ADC converting a combined IF para 0011–0013, 0018-0021, fig. 5. Staszeweski supplies explicit ADC shared processing teaching.
Note- any modern RF receiver includes ADC’s, both references are digital receivers.
Regarding claim 8, He teaches receiving the second communication signal by the second receiving circuit comprises: turning a switch circuit coupled between the antenna and the second receiving circuit (He explicitly teaches switch network used to route antennas to receive paths 0018–0024).
Regarding claim 9, He as modified above with Staszeweski discloses determining that the antenna does not receive the first communication signal and the second communication signal simultaneously by a controller, and turning off a switch circuit coupled between the antenna and the second receiving circuit. Specifically, He teaches logic control units driving switches and path selection based on Tx/Rx control and antenna diversity signals (0022–0024). He implies controller decisions. Staszeweski teaches system-level control for simultaneous operation and shared resources and controller-based decisions are standard in its architecture. Therefore He discloses switch control and logic and Staszeweski gives reason to control based on simultaneous condition.
Regarding claim 10, He as modified above with Staszeweski disclose the antenna receives the first communication signal and the second communication signal simultaneously, adjusting a first gain of the first receiving circuit according to a first signal strength of the first communication signal, and adjusting a second gain of the second receiving circuit according to a second signal strength of the second communication signal. Specifically, He lacks explicit per-path AGC teaching. Staszeweski does disclose digital RX processing and shared ADC encourage measurement of per-signal levels and therefore AGC; system performs digital decimation, filtering and can implement level estimation (fig. .11, DIGOC, FCU).
Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to combine Staszeweski’s DSP/AGC functionality with He’s front-end routine AGC functionality in order to prevent mixer/ADC nonlinearity from strong simultaneous interferers and preserve the SNR of weaker simultaneous channels when using a shared ADC.
Claims 6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over He et al (US 2004/0204037) in view of Staszewski (US 2010/0091688) and further in view of Shi (US 2007/0010224).
Regarding claim 6 and 15, He as modified above disclose a front-end structure, switches/paths and simultaneous multi-signal reception across multiple RX front ends . However, fail to specifically disclose the signal receiver is configured to receive the first communication signal and the second communication signal simultaneously, the processing unit is configured to adjust a first gain of the first receiving circuit according to a first signal strength of the first communication signal, and adjust a second gain of the second receiving circuit according to a second signal strength of the second communication signal.
However, Shi shows measuring received signal strength and adjusting LNA gain based on those measurements to maximize SNR while avoiding mixer intermodulation (para 0013, 0014, 0035 and 0036).
Therefore it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to use He’s disclosed switchable multi-path front-end hardware with known methods for simultaneous multi-front-end reception (as taught by Staszeweski) with Shi’s RSSI/LNA-AGC reference (explicit RSSI-based gain control) in order to better manage each path’s gain during simultaneous operation.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/EDAN ORGAD/Supervisory Patent Examiner, Art Unit 2414
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