DETAILED ACTION
Claims 1-20 are pending.
The office acknowledges the following papers:
Letter requesting suspension filed on 7/26/2023,
Oath filed on 10/23/2023,
Specification and remarks filed on 7/2/2025,
IDS filed on 10/8/2025, 2/28/2025, 7/23/2024, 4/29/2024.
Allowable Subject Matter
Claims 18-20 are allowed.
Claims 3-10 and 15-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Priority
No claim for priority has been made in this application.
Drawings
The Examiner contends that the drawings submitted on 7/25/2023 are acceptable for examination proceedings.
Specification
The disclosure is objected to because of the following informalities:
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. The Applicant’s cooperation is requested in correcting any errors of which the Applicant may become aware.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2 and 11-14 are rejected under 35 U.S.C. 103 as being unpatentable over Mandal et al. (U.S. 2021/0295463), in view of Official Notice.
As per claim 1:
Mandal disclosed a graphics processor comprising:
a memory interface (Mandal: Figure 31 elements 3170 and 3198, paragraphs 294-297);
a graphics processing cluster coupled with the memory interface, the graphics processing cluster including a plurality of processing resources, a processing resource of the plurality of processing resources including (Mandal: Figure 31 element 3105, paragraph 419)(The GPU includes a plurality of processing resources.):
a source crossbar communicatively coupled with a register file, the source crossbar to reorder data elements of a source operand (Mandal: Figures 31 and 49 elements 3120-3150, paragraphs 293, 431-453)(The GPU cores include functional logic (i.e. source crossbar) to perform data shuffling operations, which reorder source operand data. The cores are coupled to the register file.); and
a format conversion pipeline to convert a plurality of input data elements specified by the source operand from a first format of a plurality of datatype formats to a second format of the plurality of datatype formats, the plurality of datatype formats including integer and floating-point formats (Mandal: Figure 49 elements 3130-3150, paragraphs 426-428)(The cores perform dequantize instructions, which convert SIMD data elements to floating point values. Official notice is given that execution units can be pipelined and data conversions can be performed between formats (e.g. INT => F.P., etc.) for the advantage of increased performance and preparing inputs to required formats for execution. Thus, it would have been obvious to one of ordinary skill in the art to implement pipelined executional units and added data format conversions in Mandal.).
As per claim 2:
Mandal disclosed the graphics processor of claim 1, wherein the plurality of datatype formats include: a plurality of 8-bit, 16-bit, and 32-bit integer formats; a 64-bit floating-point format; a 32-bit floating-point format; and a plurality of 8-bit and 16-bit, floating-point formats (Mandal: Figure 49 elements 3130-3150, paragraphs 426-428)(Official notice is given that data conversions can be performed between 8/16/32-bit integer and 8/16/32/64-bit floating-point formats for the advantage of allowing processors to operate on multiple format types. Thus, it would have been obvious to one of ordinary skill in the art to implement the above multiple conversion types in Mandal.).
As per claim 11:
Claim 11 essentially recites the same limitations of claim 1. Claim 11 additionally recites the following limitations:
A memory device (Mandal: Figure 31 element 3198, paragraph 294).
As per claim 12:
The additional limitation(s) of claim 12 basically recite the additional limitation(s) of claim 2. Therefore, claim 12 is rejected for the same reason(s) as claim 2.
As per claim 13:
Mandal disclosed the graphics processing system of claim 12, the processing resource including a multi-channel parallel integer unit that includes the format conversion pipeline, the multi-channel parallel integer unit having a variable source channel width and a variable destination channel width (Mandal: Figures 31 and 49 elements 3100A-N and 3130-3150, paragraphs 292-296 and 426-428)(The cores of a multi-core group (i.e. parallel unit) perform dequantize instructions, which convert SIMD data elements to floating point values. In view of the above official notice, each MCG includes the conversion pipeline and operands on floating-point and integer data types. The number of MCGs is variable.).
As per claim 14:
Mandal disclosed the graphics processing system of claim 13, the source channel width configurable to the width of a source data element and the destination channel width configurable to the width of a destination data element or the source data element (Mandal: Figures 31 and 49 elements 3100A-N and 3130-3150, paragraphs 292-296 and 426-428)(The cores of a multi-core group (i.e. parallel unit) perform dequantize instructions, which convert SIMD data elements to floating point values. The number of MCGs is variable.).
Conclusion
The following is text cited from 37 CFR 1.111(c): In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view of the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections.
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Madduri et al. (U.S. 2019/0196818), taught fixed to floating-point conversion.
Chen et al. (U.S. 2019/0171448), taught stream processors with replication crossbars.
Adelman et al. (U.S. 2021/0406018), taught conversion circuitry.
Imber et al. (U.S. 2024/0160908), taught a shared crossbar.
Sherman et al. (U.S. 2024/0329994), taught downconvert circuitry.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB A. PETRANEK whose telephone number is (571)272-5988. The examiner can normally be reached on M-F 8:00-4:30.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached on (571) 270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JACOB PETRANEK/Primary Examiner, Art Unit 2183
Prosecution Insights