DETAILED ACTION
Email Communication
Applicant is encouraged to authorize the Examiner to communicate via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502, 502.03.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment of 04/08/2026 does not place the Application in condition for allowance.
Claims 1-20 are currently pending. In response to Office Action mailed on 01/08/2026, Applicant has amended claims 1, 5, 7, 12 and 17-20.
Status of the Rejections
Due to Applicant’s amendment of claims 1, 5, 7, 12 and 17-20, all rejections from the Office Action mailed on 01/08/2026 are withdrawn. However, upon further consideration, a new ground of rejection is presented below.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 12 and 18-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 12 or 18 as amended recites that “a through-via passing through the plurality of semiconductor layers electrically connecting at least one of the first electrode pad and the second electrode pad to the transparent conductive layer”, which is not supported by the original disclosure as filed. The limitation requires one or both the electrode pads to be electrically connected to the transparent conductive layer. However, instant application discloses only one electrode (350) is electrically connected to the transparent conductive layer (610) (see fig. 9 and [0100-0104] of instant application). Electrode 340 is not electrically connected to the transparent conductive layer 610.
Claim 19 is rejected as being dependent on claim 18, which contains new matter.
Claim 20 as amended requires the second side of the plurality of semiconductor layers to face both the coverglass layer and also the first and electrode pads, which is not supported by the original disclosure as filed. Instant application discloses that the coverglass layer and the electrode pads are disposed on the opposite sides of the semiconductor layers, not on the same side, namely second side as claimed, of the semiconductor layers. For example, figure 9 of instant application discloses coverglass layer 210 faces the top side of the semiconductor layers (910 and 920) and the electrode pads (350 and 340) face the bottom side of the semiconductor layers (910 and 920). Original claim 20 specifically recites the coverglass and pads are disposed on opposite sides of the semiconductor layers.
For the examination purpose, it would be interpreted that the coverglass layer faces the second side, and the electrode pads face the first side.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim 20 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Swanson et al. (US 2006/0196535 A1).
Regarding claim 20, Swanson discloses a surface-mountable solar cell (solar cell module 100) (figures. 2 and 5C) (solar cell module 100 is a terrestrial solar cell module that is mounted on a surface, [0018]), comprising:
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a plurality of semiconductor layers (front side diffusion region 207, wafer 203 and doped regions 204, fig. 2 and [0021]) having a first side (bottom or back side) and a second side (top or front side), the first side (bottom/back side) opposing the second side (top/front side),
the plurality of semiconductor layers (204+203+207) configured to convert solar radiation to electrical energy ([0002]),
the second side (top/front side) configured to face the solar radiation (see fig. 2 and [0020] – “The materials on the front side of the solar cell 200 are transparent by nature or thickness to allow solar radiation to shine through”);
a coverglass layer (transparent cover 104 that is made of glass, [0018]) being configured to pass the solar radiation to the plurality of semiconductor layers (204+203+207) and provide structural support for the plurality of semiconductor layers (204+203+207) (see fig. 2),
the second side (top/front side) of the plurality of semiconductor layers (204+203+207) facing the coverglass layer (104) (see fig. 2 or annotated figure);
a transparent conductive layer (transparent conductive layer 502, shown in figure 5C, that is formed on the antireflective coating 201, and comprises transparent conductive oxide) (see [0041-0042]), interposed between the plurality of semiconductor layers (204+203+207) and the coverglass layer (104) (see figures 2 and 5C); and
a bond (encapsulant 103-2) situated between the transparent conductive layer (502) and the coverglass layer (104); and
a first electrode pad (metal 206 that is connected to p+ region) and a second electrode pad (metal 206 that is connected to n+ region) electrically coupled to the plurality of semiconductor layers (204+203+207) (see fig. 2 and [0022]),
the first side (bottom/back side) of the plurality of semiconductor layers (204+203+207) facing the first electrode pad (metal 206 that is connected to p+ region) and the second electrode pad (metal 206 that is connected to n+ region),
wherein no metal layer is interposed between the plurality of semiconductor layers and the coverglass layer (104) (see figs. 2 and 5C – layer 207 is made of n-type semiconductor, layer 202 and layer 201 are made of silicon oxide and silicon nitride, respectively, [0021], layer 502 as shown in fig. 5C is made of TCO, [0042], encapsulant 103-2 is made of EVA, [0018] – so there is no metal layer between semiconductor layer 203 and coverglass layer 104).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-9, and 11-19 are rejected under 35 U.S.C. 103 as being unpatentable over Youtsey et al. (US 2010/0126573 A1) in view of Swanson et al. (US 2006/0196535 A1) and Chary et al. (US 2017/0345955 A1).
Regarding claim 1, Youtsey et al. discloses a surface-mountable solar cell (solar cell is configured for terrestrial application, and thus mounted on a terrestrial surface, [0035]) (see figures 2-5) comprising:
a plurality of semiconductor layers (first junction region 210, second junction region 220, and third junction region 230; or second junction region 220, and third junction region 230) (fig. 2) having a first side (bottom side) and a second side (top side), the first side (bottom side) opposing the second side (top side), the plurality of semiconductor layers (210+220+230 or 220+230) configured to convert solar radiation to electrical energy ([0033]), the second side (top side) configured to face the solar radiation ([0033]);
a first electrode pad (base contact 250) and a second electrode pad (conductive layer 280) electrically coupled to the plurality of semiconductor layers (see fig. 2 and [0030]), the first side (bottom side) of the plurality of semiconductor layers (210+220+230 or 220+230) facing the first electrode (250) and the second electrode pad (280), and
an antireflection coating (260) on the second side (top side) of the plurality of semiconductor layers (210+220+230 or 220+230) (see fig. 2 and [0031]).
Youtsey further discloses the solar cell is configured to be used for space or terrestrial application ([0035]).
However, Youtsey is silent as to a coverglass layer being configured to pass the solar radiation to the plurality of semiconductor layers and provide structural support for the plurality of semiconductor layers, the second side of the plurality of semiconductor layers facing the coverglass layer; a transparent conductive layer interposed between the plurality of semiconductor layers and the coverglass layer; a bond situated between the transparent conductive layer and the coverglass layer; and the coverglass is thicker than the plurality of semiconductor layers.
Swanson discloses a surface-mountable solar cell (solar cell module 100) (figures. 2 and 5C) (solar cell module 100 is a terrestrial solar cell module that is mounted on a terrestrial surface, [0018]), comprising: a plurality of semiconductor layers (front side diffusion region 207, wafer 203 and doped regions 204, fig. 2 and [0021]) having a first side (bottom or back side) and a second side (top or front side), the first side (bottom/back side) opposing the second side (top/front side), the plurality of semiconductor layers (204+203+207) configured to convert solar radiation to electrical energy ([0002]), the second side (top/front side) configured to face the solar radiation (see fig. 2 and [0020] – “The materials on the front side of the solar cell 200 are transparent by nature or thickness to allow solar radiation to shine through”); a coverglass layer (transparent cover 104 that is made of glass, [0018]) being configured to pass the solar radiation to the plurality of semiconductor layers (204+203+207) and provide structural support for the plurality of semiconductor layers (204+203+207) (see fig. 2), the second side (top/front side) of the plurality of semiconductor layers (204+203+207) facing the coverglass layer (104) (see fig. 2 or annotated figure); a transparent conductive layer (transparent conductive layer 502, shown in figure 5C, that is formed on the antireflective coating 201, and comprises transparent conductive oxide) (see [0041-0042]), interposed between the plurality of semiconductor layers (204+203+207) and the coverglass layer (104) (see figures 2 and 5C); and a bond (encapsulant 103-2) situated between the transparent conductive layer (502) and the coverglass layer (104); and a first electrode pad (metal 206 that is connected to p+ region) and a second electrode pad (metal 206 that is connected to n+ region) electrically coupled to the plurality of semiconductor layers (204+203+207) (see fig. 2 and [0022]), the first side (bottom/back side) of the plurality of semiconductor layers (204+203+207) facing the first electrode pad (metal 206 that is connected to p+ region) and the second electrode pad (metal 206 that is connected to n+ region).
Swanson further discloses the dielectric layers (201 and 202), transparent conductive layer (502), bond/encapsulant (103-2) and the coverglass layer (104) on the top side forms a protective package that protects the semiconductor layers or layers underneath ([0018]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to have used the dielectric layers (201 and 202), transparent conductive layer (502), bond/encapsulant (103-2) and coverglass layer (104) as taught by Swanson in the solar cell of Youtsey to form a protective package that protects the semiconductor layers or layers underneath, as shown by Swanson ([0018]).
Youtsey as modified by Swanson discloses that there is there is no metal layer between semiconductor layer and coverglass layer.
However, Youtsey as modified by Swanson does not disclose that the coverglass layer is thicker than the plurality of semiconductor layers
Chary discloses a surface mount solar cell integrated with coverglass (figures 27 and 29A) comprising: a plurality of semiconductor layers (2705/2704) having a first side and a second side, the first side opposing the second side, the plurality of semiconductor layers configured to convert solar radiation to electrical energy, the second side configured to face the solar radiation; a coverglass layer (coverglass 2715) coupled to the second side via a bond
(optically clear adhesive 2714), the coverglass layer (2715) being configured to pass the solar radiation to the plurality of semiconductor layers and provide structural support for the plurality of semiconductor layers; and a first electrode pad (2720) and a second electrode pad (2719) coupled to the first side and electrically coupled to the plurality of semiconductor layers.
Chary further discloses that the coverglass has a thickness of 20-600 µm ([0050]) to protect the solar cell layers from harsh environments ([0050]). Chary further discloses that the semiconductor layers are thinned to less than 20 µm ([0136]) to allow for thinned device to be used in space or terrestrial applications ([0136]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to have used 20-600 µm thick coverglass as taught by Chary to form the transparent cover layer of Youtsey as modified by Swanson such that the solar cell layers are protected from harsh environments, as shown by Chary ([0050]) and also desired by Youtsey as modified by Swanson ([0018] of Swanson).
It would also have been obvious to one of ordinary skill in the art at the time of the invention to have used a thickness of less than 20 µm as taught by Chary to from the semiconductor layers of Youtsey as modified to allow for a thinned device to be used in space or terrestrial applications, as shown by Chary ([0136]) as also desired by Youtsey as modified by Swanson.
Regarding claim 2, Youtsey further discloses that the plurality of semiconductor layers includes sub-cells including at least first sub-cell (210 or 230), a second sub-cell (220), and a third sub-cell (230 or 210), the first sub-cell having a first energy bandgap ([0025]), the second sub-cell having a second energy bandgap ([0025]), and the third sub-cell having a third energy bandgap ([0025]), the first energy bandgap being greater than the second energy bandgap and the third energy bandgap ([0025]).
Regarding claim 3, Youtsey further discloses that the plurality of semiconductor layers
includes Ga, In, As or P ([0025]).
Regarding claim 4, Youtsey further discloses that the first sub-cell is electrically coupled to the second electrode pad (280) by a set of contact vias (290) that partially pass through the first sub-cell (210 or 230), the set of contact vias terminating with an ohmic metallization (240) within the first sub-cell (210 or 230) (fig. 2 and [0027]).
Regarding claim 5, Youtsey further discloses that the first sub-cell (230) is electrically coupled to the second electrode pad (280) by a set of contact vias (290) that partially pass through the first sub-cell (230), the set of through vias (290) being coupled to a transparent conductive layer (layer 210 is a semi-transparent conductive layer as light passes through it to be absorbed by layers 220 and 230) interposed between the plurality of semiconductor layers (220 and 230) and the coverglass layer (as modified by Swanson).
Regarding claim 6, Youtsey further discloses that the transparent conductive layer (210) is deposited on the second side (top side) of the plurality of semiconductor layers (220 and/or 230), and wherein the transparent conductive layer has fingers (380) extending across the second side (top side) of the plurality of semiconductor layers (see fig. 4 that shows the emitter contact pad has plurality of fingers 380).
Regarding claim 7, Youtsey as modified by Swanson further discloses that the bond (130-2 of Swanson and/or 260 of Youtsey) between the second side (top side) of the plurality of semiconductor layers (210+220+230 or 220+230) and the coverglass layer (104 of Swanson) includes a dielectric layer (EVA layer 103-2, [0018] of Swanson; or 260 of Youtsey that is made of MgF2, [0031])).
Regarding claim 8, Youtsey as modified by Swanson further discloses the dielectric layer includes a first dielectric layer portion (260 of Youtsey) coupled to the second side (top side) of the plurality of semiconductor layers and a second dielectric layer portion (130-2 of Swanson) coupled to the coverglass layer (104).
It is further noted that the limitation “the bond between the second side of the plurality of semiconductor layers and the coverglass layer is formed by the force applied to the first dielectric layer portion” is a process limitation, which does not further define the structure of the claimed device. "[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process." See MPEP §2113. See also In re Thorpe, 777 F.2d 695, 698,227 USPQ 964, 966 (Fed. Cir. 1985). There is no difference evident between the solar cell of the instant claims and those taught by the prior art as described above.
Regarding claim 9, Youtsey as modified by Chary further discloses that the coverglass layer is 20-200 µm thick ([0050] of Chary), which overlaps with the claimed range of less than 200 µm thick. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists (In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976)) (MPEP § 2144.05 - (I)).
Regarding claim 11, Youtsey further discloses a contact metal layer (base contact pad 420, fig. 3) extending across the first side (bottom side) of the plurality of semiconductor layers, the contact metal layer configured to electrically couple to at least one of the first electrode pad or the second electrode pad (370) (see fig. 3).
Regarding claim 12, Youtsey further discloses a through-via passing through the plurality of semiconductor layers (220+230) electrically connecting the first electrode pad (280) and to the transparent conductive layer (260) (see fig. 2).
Regarding claim 13, Youtsey as modified by Swanson further discloses an anti-reflective layer (201 and 202, fig. 2 of Swanson) interposed between the plurality of semiconductor layers and the coverglass layer, the anti-reflective layer configured to minimize reflection between the plurality of semiconductor layers and the coverglass layer.
Regarding claim 14, Youtsey as modified by Swanson further discloses anti-reflective layer includes a stack of dielectric layers (201 and 202, fig. 2 of Swanson) and wherein the anti-reflective layer is further configured to reduce reflection of incident light passing through the coverglass layer.
Regarding claim 15, Youtsey as modified by Swanson further discloses an anti-reflective layer (201 and 202, fig. 2 of Swanson) deposited on a bottom side of coverglass layer (see fig. 2 of Swanson), the anti-reflective layer configured to minimize reflection at the coverglass layer.
Regarding claim 16, Youtsey as modified by Swanson further discloses anti-reflective layer includes a stack of dielectric layers (201 and 202, fig. 2 of Swanson) and wherein the anti-reflective layer is further configured to reduce reflection of incident light passing through the coverglass layer.
Regarding claim 17, Youtsey et al. discloses a surface-mountable solar cell (solar cell is configured for terrestrial application, and thus mounted on a terrestrial surface, [0035]) (see figures 2-5) comprising:
a plurality of semiconductor layers (first junction region 210, second junction region 220, and third junction region 230; or second junction region 220, and third junction region 230) (fig. 2) having a first side (bottom side) and a second side (top side), the first side (bottom side) opposing the second side (top side), the plurality of semiconductor layers (210+220+230 or 220+230) configured to convert solar radiation to electrical energy ([0033]), the second side (top side) configured to face the solar radiation ([0033]);
a first electrode pad (base contact 250) and a second electrode pad (conductive layer 280) electrically coupled to the plurality of semiconductor layers (see fig. 2 and [0030]), the first side (bottom side) of the plurality of semiconductor layers (210+220+230 or 220+230) facing the first electrode (250) and the second electrode pad (280), and
an antireflection coating (260) on the second side (top side) of the plurality of semiconductor layers (210+220+230 or 220+230) (see fig. 2 and [0031]).
Youtsey further discloses the solar cell is configured to be used for space or terrestrial application ([0035]).
However, Youtsey is silent as to a coverglass layer being configured to pass the solar radiation to the plurality of semiconductor layers and provide structural support for the plurality of semiconductor layers, the second side of the plurality of semiconductor layers facing the coverglass layer; a transparent conductive layer interposed between the plurality of semiconductor layers and the coverglass layer; a bond situated between the transparent conductive layer and the coverglass layer; and the coverglass is thicker than the plurality of semiconductor layers, wherein no metal layer is interposed between the plurality of semiconductor layers and the coverglass layer.
Swanson discloses a surface-mountable solar cell (solar cell module 100) (figures. 2 and 5C) (solar cell module 100 is a terrestrial solar cell module that is mounted on a terrestrial surface, [0018]), comprising: a plurality of semiconductor layers (front side diffusion region 207, wafer 203 and doped regions 204, fig. 2 and [0021]) having a first side (bottom or back side) and a second side (top or front side), the first side (bottom/back side) opposing the second side (top/front side), the plurality of semiconductor layers (204+203+207) configured to convert solar radiation to electrical energy ([0002]), the second side (top/front side) configured to face the solar radiation (see fig. 2 and [0020] – “The materials on the front side of the solar cell 200 are transparent by nature or thickness to allow solar radiation to shine through”); a coverglass layer (transparent cover 104 that is made of glass, [0018]) being configured to pass the solar radiation to the plurality of semiconductor layers (204+203+207) and provide structural support for the plurality of semiconductor layers (204+203+207) (see fig. 2), the second side (top/front side) of the plurality of semiconductor layers (204+203+207) facing the coverglass layer (104) (see fig. 2 or annotated figure); a transparent conductive layer (transparent conductive layer 502, shown in figure 5C, that is formed on the antireflective coating 201, and comprises transparent conductive oxide) (see [0041-0042]), interposed between the plurality of semiconductor layers (204+203+207) and the coverglass layer (104) (see figures 2 and 5C); and a bond (encapsulant 103-2) situated between the transparent conductive layer (502) and the coverglass layer (104); and a first electrode pad (metal 206 that is connected to p+ region) and a second electrode pad (metal 206 that is connected to n+ region) electrically coupled to the plurality of semiconductor layers (204+203+207) (see fig. 2 and [0022]), the first side (bottom/back side) of the plurality of semiconductor layers (204+203+207) facing the first electrode pad (metal 206 that is connected to p+ region) and the second electrode pad (metal 206 that is connected to n+ region), wherein no metal layer is interposed between the plurality of semiconductor layers and the coverglass layer (104) (see figs. 2 and 5C – layer 207 is made of n-type semiconductor, layer 202 and layer 201 are made of silicon oxide and silicon nitride, respectively, [0021], layer 502 as shown in fig. 5C is made of TCO, [0042], encapsulant 103-2 is made of EVA, [0018] – so there is no metal layer between semiconductor layer 203 and coverglass layer 104).
Swanson further discloses the dielectric layers (201 and 202), transparent conductive layer (502), bond/encapsulant (103-2) and the coverglass layer (104) on the top side forms a protective package that protects the semiconductor layers or layers underneath ([0018]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to have used the dielectric layers (201 and 202), transparent conductive layer (502), bond/encapsulant (103-2) and coverglass layer (104) as taught by Swanson in the solar cell of Youtsey to form a protective package that protects the semiconductor layers or layers underneath, as shown by Swanson ([0018]).
Youtsey as modified by Swanson discloses that there is there is no metal layer between semiconductor layer and coverglass layer.
However, Youtsey as modified by Swanson does not disclose that the coverglass layer is thicker than the plurality of semiconductor layers
Chary discloses a surface mount solar cell integrated with coverglass (figures 27 and 29A) comprising: a plurality of semiconductor layers (2705/2704) having a first side and a second side, the first side opposing the second side, the plurality of semiconductor layers configured to convert solar radiation to electrical energy, the second side configured to face the solar radiation; a coverglass layer (coverglass 2715) coupled to the second side via a bond
(optically clear adhesive 2714), the coverglass layer (2715) being configured to pass the solar radiation to the plurality of semiconductor layers and provide structural support for the plurality of semiconductor layers; and a first electrode pad (2720) and a second electrode pad (2719) coupled to the first side and electrically coupled to the plurality of semiconductor layers.
Chary further discloses that the coverglass has a thickness of 20-600 µm ([0050]) to protect the solar cell layers from harsh environments ([0050]). Chary further discloses that the semiconductor layers are thinned to less than 20 µm ([0136]) to allow for thinned device to be used in space or terrestrial applications ([0136]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to have used 20-600 µm thick coverglass as taught by Chary to form the transparent cover layer of Youtsey as modified by Swanson such that the solar cell layers are protected from harsh environments, as shown by Chary ([0050]) and also desired by Youtsey as modified by Swanson ([0018] of Swanson).
It would also have been obvious to one of ordinary skill in the art at the time of the invention to have used a thickness of less than 20 µm as taught by Chary to from the semiconductor layers of Youtsey as modified to allow for a thinned device to be used in space or terrestrial applications, as shown by Chary ([0136]) as also desired by Youtsey as modified by Swanson.
Regarding claim 18, Youtsey further discloses a through-via passing through the plurality of semiconductor layers (220+230) electrically connecting the first electrode pad (280) and to the transparent conductive layer (260) (see fig. 2).
Regarding claim 19, Youtsey as modified by Swanson discloses the transparent conductive layer (502, fig. 5C of Swanson) is a continuous plane deposited on the plurality of the semiconductor layers.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Youtsey et al. (US 2010/0126573 A1) in view of Swanson et al. (US 2006/0196535 A1) and Chary et al. (US 2017/0345955 A1) as applied above, and further in view of Chang et al. (US 2008/0053518 A1).
Regarding claim 20, Youtsey as modified does not disclose the top cover or coverglass layer includes sapphire.
Chang discloses a solar cell (10) (fig. 2) wherein light transparent substrate or cover (12) is made of sapphire ([0018]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to have used sapphire as taught by Chang to form the transparent top cover of Youtsey as modified because selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See MPEP § 2144.07.
Response to Arguments
Applicant's arguments with respect to claims 1-20 have been considered but are moot in view of the new ground(s) of rejection as necessitated by the amendments.
On pages 9-11 of Remarks, Applicant argues that Swanson fails to disclose a solar cell as required by amended claim 20 because in figure 1 or 7A of Swanson there is no transparent conductive layer between a coverglass layer and semiconductor layers, and a bond between the transparent conductive layer and the coverglass layer.
This is not persuasive because in fig. 5C, Swanson discloses alternative embodiment in which a TCO layer 502 is placed on top of layer 201.
With respect to claim 1 or 17, applicant argues that Youtsey as modified by Swanson does not disclose a transparent conductive layer between a coverglass layer and semiconductor layers, and a bond between the transparent conductive layer and the coverglass layer.
This is not persuasive because in fig. 5C, Swanson discloses alternative embodiment in which a TCO layer 502 is placed on top of layer 201.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Correspondence/Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GOLAM MOWLA whose telephone number is (571)270-5268. The examiner can normally be reached on M-Th, 7am - 4pm.
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/GOLAM MOWLA/ Primary Examiner, Art Unit 1721
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