Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. This communication is in response to the Applicant’s submission filed 27 July 2023, where:
Claims 1-20 are pending.
Claims 1-20 are rejected.
Claim Rejections – 35 U.S.C. § 112
3. The following is a quotation of 35 U.S.C. § 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
4. Claims 6, 7, 17, and 18 are rejected under 35 U.S.C. § 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 6, line 2, recites the limitation "the quantum circuit". There is insufficient antecedent basis for this limitation in the claim.
Claim 7, line 2, recites the limitation “an active qubit of the Pauli-term,” while claim 1, lines 4-5, from which claim 7 depends, recites the limitation “each Pauli-term of the plurality of Pauli-terms defines at least one active qubit from the plurality of qubits.” Claim 7 is indefinite because it is not clear whether “an active qubit” is intended as an additional occurrence of an “active qubit,” or is intended to draw antecedence from the initial occurrence of “at least one active qubit” of claim 1.
Claim 17, line 3, recites the limitation "the quantum circuit". There is insufficient antecedent basis for this limitation in the claim.
Claim 18, line 2, recites the limitation “an active qubit of the Pauli-term,” while claim 14, lines 7-8, from which claim 18 depends, recites the limitation “each Pauli-term of the plurality of Pauli-terms defines at least one active qubit from the plurality of qubits.” Claim 18 is indefinite because it is not clear whether “an active qubit” is intended as an additional occurrence of an “active qubit,” or is intended to draw antecedence from the initial occurrence of “at least one active qubit” of claim 1.
Claim Rejections - 35 U.S.C. § 101
3. 35 U.S.C. § 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
4. Claims 1-20 are rejected under 35 U.S.C. § 101 because the claimed invention is directed to an abstract idea without significantly more.
Claim 1 recites a method which is a process, and thus one of the statutory categories of patentable subject matter. (35 U.S.C. § 101).
However, under Step 2A Prong One, the claim recites the limitations of “generating an auxiliary graph that represents the plurality of Pauli-terms, the auxiliary graph comprising a plurality of graph nodes that represent the plurality of Pauli-terms, respectively” and “generating the multitree data structure based on the auxiliary graph.” The activities of “generating an auxiliary graph” and “generating the multitree data structure” contain limitations that can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
The claim also recites the “generating [the multitree data structure] comprising: generating a plurality of root nodes of the multitree data structure,” “determining a candidate list that represents a plurality of maximal interfaces between nodes of the auxiliary graph,” “selecting a widest interface from the candidate list,” “adding a new interface node to the multitree data structure,” “removing the widest interface from the candidate list,” “iteratively performing said selecting, said adding, and said removing, until the candidate list is empty,” and “in response to a determination that the candidate list is empty, determining for each node of the multitree data structure whether or not all active qubits of the each node are represented by descendant nodes of the each node.” The activities of “generating a plurality of root nodes,” “determining a candidate list,” “selecting a widest interface,” “adding a new interface node,” “re the widest interface,” “iteratively performing said selecting, said adding, and said removing,” and “determining for each node,” contain limitations that can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
[Examiner notes that the limitation “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure,” is contingent because it recites steps that are only required to be performed if their conditions precedent are met. Limitations “adding a leaf node” et seq. only needs to be performed if “in case an active qubit of the each node is not represented by any of the descendant nodes.” This condition is mutually exclusive, and therefore none of the subsequent limitations to the condition can be performed. Therefore, the broadest reasonable interpretation of the claim does not require the limitation “adding a leaf node to the multitree data structure” when the condition “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure” is left unsatisfied; accordingly, does not affect subject matter evaluation of the claim].
The claim recites more details or specifics to the abstract idea of “generating a plurality of root nodes,” where “the plurality of root nodes representing the plurality of Pauli-terms, respectively, the plurality of root nodes comprising first and second root nodes that represent the first and second Pauli-terms, respectively,” and accordingly, is merely more specific to the abstract idea.
The claim recites more details or specifics to the abstract idea of “selecting a widest interface,” where “the widest interface interfacing between the first and second consecutive graph nodes of the auxiliary graph, the widest interface representing a largest number of active qubits compared to any remaining interface in the candidate list,” and accordingly, is merely more specific to the abstract idea.
The claim also recites more details or specifics to the abstract idea of “adding a new interface node“ where “the new interface node representing the widest interface, the new interface node is configured to be a descendant node of the first and second root nodes,” and accordingly, is merely more specific to the abstract idea.
Under Step 2A Prong Two, the claim as a whole is not integrated into a practical application, because the additional elements recited in the claim beyond the identified judicial exception include “obtaining the plurality of Pauli-terms, the plurality of Pauli-terms are associated with a plurality of qubits,” which is a pre-processing insignificant extra-solution activity of data gathering, (MPEP § 2106.05(g)), that does not serve to integrate the abstract idea into a practical application. The claim also recites more details or specifics of the additional element of “obtaining the plurality of Pauli-terms,” “wherein each Pauli-term of the plurality of Pauli-terms defines at least one active qubit from the plurality of qubits, the plurality of Pauli-terms are ordered according to a defined order,” and accordingly, is merely more specific to the additional element. Therefore, claim 1 is directed to an abstract idea.
Finally, under Step 2B, the additional elements, taken alone or in combination, do not represent significantly more than the abstract idea itself. The additional elements recited in the claim beyond the identified judicial exception include “obtaining the plurality of Pauli-terms, the plurality of Pauli-terms are associated with a plurality of qubits,” which is a well-understood, routine, and conventional activity of receiving data over a network, (MPEP § 2106.05(d) sub II.i), that does not amount to significantly more than the abstract idea. The claim also recites more details or specifics of the additional element of “obtaining the plurality of Pauli-terms,” “wherein each Pauli-term of the plurality of Pauli-terms defines at least one active qubit from the plurality of qubits, the plurality of Pauli-terms are ordered according to a defined order,” and accordingly, is merely more specific to the additional element. Therefore, claim 1 is subject-matter ineligible.
Claim 14 recites a “computer program product,” which is a product, and thus one of the statutory categories of patentable subject matter. (35 U.S.C. § 101).
However, under Step 2A Prong One, the claim recites the limitations of “generating an auxiliary graph that represents the plurality of Pauli-terms, the auxiliary graph comprising a plurality of graph nodes that represent the plurality of Pauli-terms, respectively” and “generating the multitree data structure based on the auxiliary graph.” The activities of “generating an auxiliary graph” and “generating the multitree data structure” contain limitations that can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
The claim also recites the “generating [the multitree data structure] comprising: generating a plurality of root nodes of the multitree data structure,” “determining a candidate list that represents a plurality of maximal interfaces between nodes of the auxiliary graph,” “c.3)] selecting a widest interface from the candidate list,” “adding a new interface node to the multitree data structure,” “removing the widest interface from the candidate list,” “iteratively performing said selecting, said adding, and said removing, until the candidate list is empty,” and “in response to a determination that the candidate list is empty, determining for each node of the multitree data structure whether or not all active qubits of the each node are represented by descendant nodes of the each node.” The activities of “generating a plurality of root nodes,” “determining a candidate list,” “selecting a widest interface,” “adding a new interface node,” “removing the widest interface,” “iteratively performing said selecting, said adding, and said removing,” and “determining for each node,” contain limitations that can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
[Examiner notes that the limitation “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure,” is contingent because it recites steps that are only required to be performed if their conditions precedent are met. Limitations “adding a leaf node” et seq. only needs to be performed if “in case an active qubit of the each node is not represented by any of the descendant nodes.” This condition is mutually exclusive, and therefore none of the subsequent limitations to the condition can be performed. Therefore, the broadest reasonable interpretation of the claim does not require the limitation “adding a leaf node to the multitree data structure” when the condition “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure” is left unsatisfied; accordingly, does not affect subject matter evaluation of the claim].
The claim recites more details or specifics to the abstract idea of “generating a plurality of root nodes,” where “the plurality of root nodes representing the plurality of Pauli-terms, respectively, the plurality of root nodes comprising first and second root nodes that represent the first and second Pauli-terms, respectively,” and accordingly, is merely more specific to the abstract idea.
The claim recites more details or specifics to the abstract idea of “selecting a widest interface,” where “the widest interface interfacing between the first and second consecutive graph nodes of the auxiliary graph, the widest interface representing a largest number of active qubits compared to any remaining interface in the candidate list,” and accordingly, is merely more specific to the abstract idea.
The claim also recites more details or specifics to the abstract idea of “adding a new interface node“ where “the new interface node representing the widest interface, the new interface node is configured to be a descendant node of the first and second root nodes,” and accordingly, is merely more specific to the abstract idea.
Thus, claim 14 recites an abstract idea.
Under Step 2A Prong Two, the claim as a whole is not integrated into a practical application, because the additional elements recited in the claim beyond the identified judicial exception include “a non-transitory computer readable medium retaining program instructions, which program instructions when read by a processor, cause the processor to construct a multitree data structure,” which are recited at a high-level of generality, and therefore, are generic computer components (non-transitory computer readable medium, processor) used to implement the abstract idea. (MPEP § 2106.05(f)). Also, the claim recites “obtaining the plurality of Pauli-terms, the plurality of Pauli-terms are associated with a plurality of qubits,” which is a pre-processing insignificant extra-solution activity of data gathering, (MPEP § 2106.05(g)), that does not serve to integrate the abstract idea into a practical application. The claim also recites more details or specifics of the additional element of “obtaining the plurality of Pauli-terms,” “wherein each Pauli-term of the plurality of Pauli-terms defines at least one active qubit from the plurality of qubits, the plurality of Pauli-terms are ordered according to a defined order,” and accordingly, is merely more specific to the additional element. Therefore, claim 14 is directed to an abstract idea.
Finally, under Step 2B, the additional elements, taken alone or in combination, do not represent significantly more than the abstract idea itself. The additional elements recited in the claim beyond the identified judicial exception include “a non-transitory computer readable medium retaining program instructions, which program instructions when read by a processor, cause the processor to construct a multitree data structure,” which are recited at a high-level of generality, and therefore, are generic computer components used to implement the abstract idea. (MPEP § 2106.05(f)). Also, the claim recites “obtaining the plurality of Pauli-terms, the plurality of Pauli-terms are associated with a plurality of qubits,” which is a well-understood, routine, and conventional activity of receiving data over a network, (MPEP § 2106.05(d) sub II.i), that does not amount to significantly more than the abstract idea. The claim also recites more details or specifics of the additional element of “obtaining the plurality of Pauli-terms,” “wherein each Pauli-term of the plurality of Pauli-terms defines at least one active qubit from the plurality of qubits, the plurality of Pauli-terms are ordered according to a defined order,” and accordingly, is merely more specific to the additional element. Therefore, claim 14 is subject-matter ineligible.
Claim 20 recites an “apparatus,” which is a product, and thus one of the statutory categories of patentable subject matter. (35 U.S.C. § 101).
However, under Step 2A Prong One, the claim recites the limitations of “generating an auxiliary graph that represents the plurality of Pauli-terms, the auxiliary graph comprising a plurality of graph nodes that represent the plurality of Pauli-terms, respectively” and “generating the multitree data structure based on the auxiliary graph.” The activities of “generating an auxiliary graph” and “generating the multitree data structure” contain limitations that can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
The claim also recites the “generating [the multitree data structure] comprising: generating a plurality of root nodes of the multitree data structure,” “determining a candidate list that represents a plurality of maximal interfaces between nodes of the auxiliary graph,” “selecting a widest interface from the candidate list,” “adding a new interface node to the multitree data structure,” “removing the widest interface from the candidate list,” “iteratively performing said selecting, said adding, and said removing, until the candidate list is empty,” and “in response to a determination that the candidate list is empty, determining for each node of the multitree data structure whether or not all active qubits of the each node are represented by descendant nodes of the each node.” The activities of “generating a plurality of root nodes,” “determining a candidate list,” “selecting a widest interface,” “adding a new interface node,” “removing the widest interface,” “iteratively performing said selecting, said adding, and said removing,” and “determining for each node,” contain limitations that can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)).
[Examiner notes that the limitation “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure,” is contingent because it recites steps that are only required to be performed if their conditions precedent are met. Limitations “adding a leaf node” et seq. only needs to be performed if “in case an active qubit of the each node is not represented by any of the descendant nodes.” This condition is mutually exclusive, and therefore none of the subsequent limitations to the condition can be performed. Therefore, the broadest reasonable interpretation of the claim does not require the limitation “adding a leaf node to the multitree data structure” when the condition “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure” is left unsatisfied; accordingly, does not affect subject matter evaluation of the claim].
The claim recites more details or specifics to the abstract idea of “generating a plurality of root nodes,” where “the plurality of root nodes representing the plurality of Pauli-terms, respectively, the plurality of root nodes comprising first and second root nodes that represent the first and second Pauli-terms, respectively,” and accordingly, is merely more specific to the abstract idea.
The claim recites more details or specifics to the abstract idea of “selecting a widest interface,” where “the widest interface interfacing between the first and second consecutive graph nodes of the auxiliary graph, the widest interface representing a largest number of active qubits compared to any remaining interface in the candidate list,” and accordingly, is merely more specific to the abstract idea.
The claim also recites more details or specifics to the abstract idea of “adding a new interface node“ where “the new interface node representing the widest interface, the new interface node is configured to be a descendant node of the first and second root nodes,” and accordingly, is merely more specific to the abstract idea.
Thus, claim 20 recites an abstract idea.
Under Step 2A Prong Two, the claim as a whole is not integrated into a practical application, because the additional elements recited in the claim beyond the identified judicial exception include “a processor and coupled memory,” which are recited at a high-level of generality, and therefore, are generic computer components used to implement the abstract idea. (MPEP § 2106.05(f)). Also, the claim recites “obtaining the plurality of Pauli-terms, the plurality of Pauli-terms are associated with a plurality of qubits,” which is a pre-processing insignificant extra-solution activity of data gathering, (MPEP § 2106.05(g)), that does not serve to integrate the abstract idea into a practical application. The claim also recites more details or specifics of the additional element of “obtaining the plurality of Pauli-terms,” “wherein each Pauli-term of the plurality of Pauli-terms defines at least one active qubit from the plurality of qubits, the plurality of Pauli-terms are ordered according to a defined order,” and accordingly, is merely more specific to the additional element. Therefore, claim 20 is directed to an abstract idea.
Finally, under Step 2B, the additional elements, taken alone or in combination, do not represent significantly more than the abstract idea itself. The additional elements recited in the claim beyond the identified judicial exception include “a processor and coupled memory,” which are recited at a high-level of generality, and therefore, are generic computer components used to implement the abstract idea. (MPEP § 2106.05(f)). Also, the claim recites “obtaining the plurality of Pauli-terms, the plurality of Pauli-terms are associated with a plurality of qubits,” which is a well-understood, routine, and conventional activity of receiving data over a network, (MPEP § 2106.05(d) sub II.i), that does not amount to significantly more than the abstract idea. The claim also recites more details or specifics of the additional element of “obtaining the plurality of Pauli-terms,” “wherein each Pauli-term of the plurality of Pauli-terms defines at least one active qubit from the plurality of qubits, the plurality of Pauli-terms are ordered according to a defined order,” and accordingly, is merely more specific to the additional element. Therefore, claim 20 is subject-matter ineligible.
Claim 2 depends from claim 1. Claim 15 depends from claim 14. With regard to the abstract idea of “generating the multitree data structure,” the claims further recite “in response to a determination that the widest interface shares one or more active qubits with a second interface of the candidate list, and the second interface comprises one or more remaining active qubits that are excluded from the widest interface, splitting the second interface into two candidate interfaces.” With regard to the multitree data structure, the activity of “splitting” contain limitations that can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, are a mental process, (MPEP § 2106.04(a)(2) sub III), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)). The claim recites more details or specifics to the abstract idea of “generating the multitree data structure,” where “the two candidate interfaces comprising a first candidate interface that represents the one or more active qubits, and a second candidate interface that represents the one or more remaining active qubits of the second interface” and “whereby the candidate list is modified to comprise the two candidate interfaces and to exclude the second interface,” which are merely more specific to the abstract idea. The additional elements of the claim does not serve to integrate the abstract idea into integrated into a practical application, (see MPEP § 2106.04(d)), nor do the additional elements amount to significantly more than the abstract idea, (MPEP § 2106.05 sub I; see also MPEP § 2106.05(a) – (h)), and thus, the claim recites no more than the abstract idea. Therefore, claims 2 and 15 are subject-matter ineligible.
Claim 3 depends directly or indirectly from claim 1. Claim 16 depends directly or indirectly from claim 14. The claim recites more details or specifics to the abstract idea of “iteratively performing,” where “analyzing the candidate list iteratively, as part of said iteratively performing, to determine whether said splitting should be performed for each interface of the candidate list,” and accordingly, are merely more specific to the abstract idea. The additional elements of the claim does not serve to integrate the abstract idea into integrated into a practical application, (see MPEP § 2106.04(d)), nor do the additional elements amount to significantly more than the abstract idea, (MPEP § 2106.05 sub I; see also MPEP § 2106.05(a) – (h)), and thus, the claim recites no more than the abstract idea. Therefore, claims 3 and 16 are subject-matter ineligible.
Claim 4 depends directly or indirectly from claim 1. The claim recites more details or specifics to the abstract idea of selecting a widest interface from the candidate list,” “wherein, in case that the widest interface shares an active qubit with a third interface of the candidate list, and the third interface does not comprise any active qubits that are excluded from the widest interface, retaining the third interface without splitting the third interface into two candidate interfaces, whereby the third interface in the candidate list is not modified,” and accordingly, is merely more specific to the abstract idea. The additional elements of the claim does not serve to integrate the abstract idea into integrated into a practical application, (see MPEP § 2106.04(d)), nor do the additional elements amount to significantly more than the abstract idea, (MPEP § 2106.05 sub I; see also MPEP § 2106.05(a) – (h)), and thus, the claim recites no more than the abstract idea. Therefore, claim 4 is subject-matter ineligible.
Claim 5 depends directly or indirectly from claim 1. The claim further recites “synthesizing, based on the multitree data structure, a quantum circuit that implements an exponentiation module represented by the plurality of Pauli-terms,” which under Step 2A Prong One, is an activity of data conversion that can practically be performed in the human mind, including, for example, observations, evaluations, judgments, and opinions, and accordingly, are a mental process, (MPEP § 2106.04(a)(2) sub III; see also Hawk Technology Systems, LLC v. Castle Retail, 60 F.4th 1349, 2023 USPQ2d 211 (Fed. Cir. 2023)), which is one of the groupings of abstract ideas. (MPEP § 2106.04(a)(2)). The additional elements of the claim does not serve to integrate the abstract idea into integrated into a practical application, (see MPEP § 2106.04(d)), nor do the additional elements amount to significantly more than the abstract idea, (MPEP § 2106.05 sub I; see also MPEP § 2106.05(a) – (h)), and thus, the claim recites no more than the abstract idea. Therefore, claim 5 is subject-matter ineligible.
Claim 6 depends directly or indirectly from claim 1. Claim 17 depends directly or indirectly from claim 14. The claims recite more details or specifics to the abstract idea of “generating the multitree data structure,” “wherein said generating the multitree data structure is performed by a classical computer, wherein the method further comprises executing the quantum circuit on a quantum computer,” which is merely more specific to the abstract idea. Further, the claims recite additional elements recited in the claim beyond the identified judicial exception including a “classical computer” and a “quantum computer,” which are recited at a high-level of generality, and accordingly, are generic computer components used to implement the abstract idea, (MPEP § 2106.05(f)), that do not serve to integrate the abstract idea into a practical application under Step 2A Prong Two, nor do they amount to significantly more than the abstract idea under Step 2B. Also, the broadest reasonable interpretation of the claim term “quantum circuit on a quantum computer” covers the teachings of a simulation, which is not inconsistent with the Applicant’s disclosure. (MPEP § 2111; Specification ¶ 0081 (“a logical representation of a quantum circuit that can be simulated by a classical computer or engine”)). Therefore, claims 6 and 17 are subject-matter ineligible.
Claims 7 and 13 depend directly or indirectly from claim 1. Claim 18 depends directly or indirectly from claim 14. The claims recite more details or specifics to the additional element of “obtaining the plurality of Pauli-terms,” (claims 7 and 18: “wherein a qubit of a Pauli-term of the plurality of Pauli-terms is considered an active qubit of the Pauli-term in case that the qubit is not marked by the Pauli-term as an identity gate”; claim 13: “wherein the defined order is stored in a multi-directed graph”), and accordingly, are merely more specific to the additional element. Claims 7 and 18 also recite more details or specifics to the abstract idea of “generating the multitree data structure,” “wherein each parent node of the new interface node must represent all active qubits of the widest interface, wherein the new interface node is configured to have a greatest distance from the first root node and from the second root node,” and accordingly, are merely more specific to the abstract idea. The additional elements of the claim does not serve to integrate the abstract idea into integrated into a practical application, (see MPEP § 2106.04(d)), nor do the additional elements amount to significantly more than the abstract idea, (MPEP § 2106.05 sub I; see also MPEP § 2106.05(a) – (h)), and thus, the claim recites no more than the abstract idea. Therefore, claims 7, 13, and 18 are subject-matter ineligible.
Claim 9 depends directly or indirectly from claim 1. Claim 9 recites more details or specifies to the limitation of “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure.”
As noted above, the limitation “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure,” is contingent because it recites steps that are only required to be performed if their conditions precedent are met. Limitations “adding a leaf node” et seq. only needs to be performed if “in case an active qubit of the each node is not represented by any of the descendant nodes.” This condition is mutually exclusive, and therefore none of the subsequent limitations to the condition can be performed. Therefore, the broadest reasonable interpretation of the claim does not require the limitation “adding a leaf node to the multitree data structure” when the condition “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure” is left unsatisfied; accordingly, does not affect subject matter evaluation of the claim.
Similarly, claim 9, reciting more details or specifics to the contingency of claim 1, and accordingly, does not affect subject matter evaluation of the claim.
Claims 8, 10, and 11 depend directly or indirectly from claim 1. Claim 19 depends directly or indirectly from claim 14. The claims recite more details or specifics to the abstract idea of “generating the multitree data structure,” (claims 8 and 19: “wherein each parent node of the new interface node must represent all active qubits of the widest interface, wherein the new interface node is configured to have a greatest distance from the first root node and from the second root node;” claim 10: “wherein the descendant nodes of the each node comprise at least one non-leaf node;” and claim 11: “wherein the candidate list is stored in a sorted dictionary that is sorted according to a size parameter, the size parameter associated with a number of active qubits in a respective interface”), and accordingly, are merely more specific to the abstract idea. The additional elements of the claim does not serve to integrate the abstract idea into integrated into a practical application, (see MPEP § 2106.04(d)), nor do the additional elements amount to significantly more than the abstract idea, (MPEP § 2106.05 sub I; see also MPEP § 2106.05(a) – (h)), and thus, the claim recites no more than the abstract idea. Therefore, claims 8, 10, and 11 are subject-matter ineligible.
Claim 12 depends directly or indirectly from claim 1. The claim recites more details or specifics to the abstract idea of “generating an auxiliary graph,” “wherein the auxiliary graph is a Directed Acyclic Graph (DAG),” and accordingly, is merely more specific to the abstract idea. The additional elements of the claim does not serve to integrate the abstract idea into integrated into a practical application, (see MPEP § 2106.04(d)), nor do the additional elements amount to significantly more than the abstract idea, (MPEP § 2106.05 sub I; see also MPEP § 2106.05(a) – (h)), and thus, the claim recites no more than the abstract idea. Therefore, claim 12 is subject-matter ineligible.
Examiner’s Comments
5. A comprehensive search for prior art has not resulted in a reference or references that anticipate under Sections 102(a)(1) & 102(a)(2), or render obvious under Section 103, the Applicant’s instant claims; however, for the claims to be in a condition for allowance, Applicant is required to overcome the rejections set out in this Office action. The closest art of record includes:
Peng et al., “Simulating Large Quantum Circuits on a Small Quantum Computer,” arXiv (2020) teaches, in relation to quantum circuit simulation derived from a multitree data structure.
Duncan et al., “Graph -Theoretic Simplification of Quantum Circuits with the ZX-calculus,” arXiv (2020) teaches a simplification strategy for ZX-diagrams that can be transformed back into a quantum circuit producing smaller circuits.
Li et al., “Paulihedral: A Generalized Block-Wise Compiler Optimization Framework For Quantum Simulation Kernels,” arXiv (2021) teaches a block-wise compiler framework that can deeply optimize a quantum simulation kernel by exploiting high-level program structure and optimization opportunities.
Bravyi et al., “Trading Classical and Quantum Computational Resources,” Physical Review X (2016) teaches a hybrid quantum-classical simulation where a classical computer assisted by a small quantum processor can efficiently simulate a larger quantum system.
Furnas et al., "Multitrees: Enriching and Reusing Hierarchical Structure," Human Factors in Computing Sys (1994) teaches multitrees, which are a class of directed acyclic graphs (DAGs), have the unusual property that they have large easily identifiable substructures that are trees, affording familiar, tree-based graphical interactions.
Regarding claims 1, 14, and 20, however, neither Peng nor any other prior art reference teaches or suggests, alone or in combination the generation of a plurality of Pauli-terms as an auxiliary graph from which to generate a multitree data structure in the manner set out by the claims, where:
* * *
generating an auxiliary graph that represents the plurality of Pauli-terms, the auxiliary graph comprising a plurality of graph nodes that represent the plurality of Pauli-terms, respectively,
wherein the plurality of graph nodes are ordered consecutively according to the defined order, wherein an interface between first and second consecutive graph nodes of the plurality of graph nodes represents a set of active qubits,
the set of active qubits is active in first and second Pauli-terms from the plurality of Pauli-terms, the first and second Pauli-terms are represented by the first and second consecutive graph nodes, respectively; and
generating the multitree data structure based on the auxiliary graph, said generating comprising:
generating a plurality of root nodes of the multitree data structure,
the plurality of root nodes representing the plurality of Pauli-terms, respectively, the plurality of root nodes comprising first and second root nodes that represent the first and second Pauli-terms, respectively;
determining a candidate list that represents a plurality of maximal interfaces between nodes of the auxiliary graph;
selecting a widest interface from the candidate list,
the widest interface interfacing between the first and second consecutive graph nodes of the auxiliary graph, the widest interface representing a largest number of active qubits compared to any remaining interface in the candidate list;
adding a new interface node to the multitree data structure,
the new interface node representing the widest interface, the new interface node is configured to be a descendant node of the first and second root nodes;
removing the widest interface from the candidate list;
iteratively performing said selecting, said adding, and said removing, until the candidate list is empty;
* * *
(claim 1, lines 7-31; see also claim 14, lines 10-34, claim 20, lines 8-32).
As noted above by Examiner, the limitation “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure,” is contingent because it recites steps that are only required to be performed if their conditions precedent are met. Limitations “adding a leaf node” et seq. only needs to be performed if “in case an active qubit of the each node is not represented by any of the descendant nodes.” This condition is mutually exclusive, and therefore none of the subsequent limitations to the condition can be performed. Therefore, the broadest reasonable interpretation of the claim does not require the limitation “adding a leaf node to the multitree data structure” when the condition “in case an active qubit of the each node is not represented by any of the descendant nodes, adding a leaf node to the multitree data structure” is left unsatisfied; accordingly, affect the scope of the instant claims.
Claim 9 depends directly or indirectly from claim 1, and similarly, is also subject to the contingency of “in case an active qubit of the each node is not represented by any of the descendant nodes,” and is not required under the broadest reasonable interpretation of the claims.
Conclusion
6. Any inquiry concerning this communication or earlier communications from the Examiner should be directed to KEVIN L. SMITH whose telephone number is (571) 272-5964. Normally, the Examiner is available on Monday-Thursday 0730-1730.
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If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s supervisor, KAKALI CHAKI can be reached on 571-272-3719. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/K.L.S./
Examiner, Art Unit 2122
/KAKALI CHAKI/Supervisory Patent Examiner, Art Unit 2122
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