DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to the claims have been considered but are moot because the new ground of rejection does not rely on the references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5-20 are rejected under 35 U.S.C. 103 as being unpatentable over Luong (US 20200349103) in view of Pearson et al (US 20170308325, Pearson).
As to claim 1, Luong discloses a network device (fig. 1, computing unit 100) comprising:
a port of a given port type (one of PCIe port 118-122) having one or more physical lanes (par. 23); and
control circuitry (module 102-106) configured to:
store a port profile library (par. 78, “chipset description table… are stored”) containing
a first port profile (first row of fig. 2) that is usable to configure any port of the given port type (“PCIe”) and that specifies a first interface-to-port-lane mapping for any port of the given port type (“1x16, 2x8…” for PCIe port type. Note: The profile is usable for port 1, port 2), and
a second port profile (second row of fig. 2) that is usable to configure any port of the given port type (“PCIe”) and that specifies a second interface-to-port-lane mapping for any port of the given port type (“1x16, 2x8” for PCIe port type. Note: The profile is usable for port 1, port 2);
receive an input that indicates the first port profile, from the port profile library (fig. 4), for configuring the port (fig. 7 s710 “determine a chipset description”); and
generate at least a given interface using the one or more physical lanes based on the first port profile being indicated by the received input (s750).
Luong does not disclose receiving user input (instead discloses the input indicative as fig. 4). In the same field of art (peripheral configuration), Pearson discloses a system (e.g. a computer, a storage server, a communication server, etc.) can include ports to which electronic cards (also referred to as peripheral cards, expansion cards, etc.) can be removably connected (par. 9). In one embodiment, Pearson discloses the step receiving user input indicative of an interface-to- lane mapping for the port (par. 49 “a user, who is able to select a configuration of the port”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Luong and Pearson, by receiving user input that indicates the first port profile, from the port profile library, for configuring the port; and generating at least a given interface using the one or more physical lanes based on the first port profile being indicated by the received user input. The motivation is to improve the flexibility of the system (par. 49, because the device is configured by a user).
As to claim 5, Luong/Pearson discloses the network device defined in claim 1 further comprising:
an additional port of the given port type (Luong, fig. 1 second port of 116-122), wherein the control circuitry is configured to generate at least an additional interface using the additional port (fig. 2. Note: SATA or Glink are an additional interface which is usable for other ports) based on the first port profile (fig. 2 first row profile) and wherein the given interface and the additional interface each have the first interface-to-port-lane mapping (fig. 2. Note: SATA and PCIe have same mapping such as: 1x16, 2x8).
As to claim 6, Luong/Pearson discloses the network device defined in claim 5 further comprising:
a third port of the given port type (Luong, fig. 1 third port of 116-122), wherein the control circuitry is configured to generate at least a third interface using the third port (fig. 2. Note: SATA is an additional interface which is usable for other ports) based on the second port profile (fig. 2, second row profile) and wherein the third interface has the second interface-to-port-lane mapping (Note: SATA has “1x16, 2x8” mapping).
As to claim 7, Luong/Pearson discloses the network device defined in claim 6, wherein the received user input specifies a profile that identifies the first port profile for the first port and the additional port and that identifies the second port profile for the third port (Pearson, par 49).
As to claim 8, Luong/Pearson discloses the network device defined in claim 1 wherein the user input specifies a module profile from a module profile library stored by the control circuitry and wherein the module profile identifies the first port profile (Pearson, par. 49).
As to claim 9, Luong/Pearson discloses the network device defined in claim 1, wherein the port is an external port configured to receive equipment external to the network device or is an internal port configured to connect to a component internal to the network device (Luong, par. 25).
As to claim 10, Luong discloses a method of operating a network device (par. 20) having a port with a plurality of lanes, the method comprising:
storing a port profile library (par. 78, “chipset description table… are stored”) that includes a plurality of port profiles (fig. 2), the plurality of port profiles containing first and second port profiles (first and second rows in fig. 2) for a first port type (for instance, “1x16”, 4x4 for PCIe port type) and a third port profile (third row in fig. 2) for a second port type (for instance, 4x4, 2x4x8 for Glink port type), wherein the port is of the first port type (Note: The port can be PCIe or Glink type);
receiving, by the network device, input indicative of an interface-to-lane mapping for the port (fig. 7 s710, “determine a chipset description”), wherein the input specifies the first port profile from the port profile library (fig. 4) and specifies the port for which interface configuration is performed based on the first port profile (fig. 2 port ID 208) and wherein the second port profile, if applied to the port, provides an additional interface-to-lane-mapping for the port (Note: The second profile can be applied to the port); and
generating one or more interfaces on the port each based on one or more corresponding lanes of the plurality of lanes indicated by the interface-to-lane-mapping (fig. 4).
Luong does not disclose receiving user input indicative (instead discloses the input indicative as fig. 4). In the same field of art (peripheral configuration), Pearson discloses a system (e.g. a computer, a storage server, a communication server, etc.) can include ports to which electronic cards (also referred to as peripheral cards, expansion cards, etc.) can be removably connected (par. 9). In one embodiment, Pearson discloses the step receiving user input indicative of an interface-to-lane mapping for the port (par. 49 “a user, who is able to select a configuration of the port”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Luong and Pearson, by receiving, by the network device, user input indicative of an interface-to-lane mapping for the port, wherein the user input specifies the first port profile from the port profile library and specifies the port for which interface configuration is performed based on the first port profile. The motivation is to improve the flexibility of the system (par. 49, because the device is configured by a user).
As to claim 11, Luong/Pearson discloses the method defined in claim 10, wherein the interface-to-lane mapping identifies a first interface on the port (Luong, fig. 6. “Glink”) and at least a first lane of the port associated with the first interface (start lane 0) and identifies a second interface on the port (“PCIe”) and at least a second lane of the port associated with the second interface (start lane 4) and wherein the generated one or more interfaces comprise the first and second interfaces (fig. 7 s740).
As to claim 12, Luong/Pearson discloses the method defined in claim 11 further comprising:
receiving, by the network device, additional user input indicative of interface parameters for the first and second interfaces, wherein the generated one or more interfaces comprise the first and second interfaces exhibiting the interface parameters (Luong, fig. 4, fig. 7, s740-770).
As to claim 13, Luong discloses a network device (fig. 1 device 100) comprising:
a module that includes first and second ports each a port (port 1 and 2) having a plurality of physical lanes (par. 23);
memory circuitry configured to store a library (par. 78) containing a plurality of port profiles (fig. 2, rows 1-4) and containing a plurality of module profiles (Note: Each module profile is the combination of 2 rows), a given module profile of the plurality of module profiles specifies use of a given port profile of the plurality of port profiles for the first port (fig. 2, for instance 1x16, 2x8… for portid_01) and specifies use of the given port profile for the second port (for instance, 1x16, 2x8 for portid_02); and
processing circuitry coupled to the port (processor 102 and BIOS 104) and the memory circuitry (memory 106) and configured to:
receive input specifying the module and specifying the given module profile for performing interface configuration for the module based on the received input (fig. 7 s710 “determine a chipset description”), apply the given module profile to the module to generate a first set of one or more interfaces from the first port based on the given port profile (fig. 4, for instance Glink for portid_01) and to generate a second set of one or more interfaces from the second port based on the given port profile (s750, PCIe for portid_2).
Luong does not disclose receiving user input indicative (instead discloses the input indicative as fig. 4). In the same field of art (peripheral configuration), Pearson discloses a system (e.g. a computer, a storage server, a communication server, etc.) can include ports to which electronic cards (also referred to as peripheral cards, expansion cards, etc.) can be removably connected (par. 9). In one embodiment, Pearson discloses the step receiving user input indicative of an interface-to-lane mapping for the port (par. 49 “a user, who is able to select a configuration of the port”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Luong and Pearson, by receive user input specifying the module and specifying the given module profile for performing interface configuration for the module based on the received user input. The motivation is to improve the flexibility of the system (par. 49, because the device is configured by a user).
As to claim 14, Luong/Pearson discloses the network device defined in claim 13, wherein the module exhibits a first interface configuration (for instance, Glink 1 x16) when the given module profile is applied to the module (fig. 7, s750) and wherein module exhibits a second interface configuration (PCIe 4x4) when an additional module profile of the plurality of module profiles is applied to the module (s750).
As to claim 15, Luong/Pearson discloses the network device defined in claim 13, wherein the given module profile specifies a same interface-to-port-lane mapping for the first port and for the second port and wherein the interface-to-port-lane mapping is defined by given port profile (fig. 2. Note: 1x16, 2x8 is a same mapping for portid_1 and portid_2).
As to claim 16, Luong/Pearson discloses the network device defined in claim 13, wherein the plurality of port profiles each identify a corresponding interface-to-port-lane mapping (fig. 2 “1x16”, “2x8”).
As to claim 17, Luong/Pearson discloses the network device defined in claim 16, wherein the plurality of port profiles each identify interface parameters for the corresponding interface-to-port-lane mapping (fig. 2 “hot plug”, “power capability”).
As to claim 18, Luong/Pearson discloses the network device defined in claim 17, wherein the interface parameters comprise information identifying an interface speed, an interface lane count (“bifurcation support 218”), an interface pause setting, a forward error correction setting, an auto-negotiation setting, or a hardware resource allocation.
As to claim 19, Luong/Pearson discloses the network device defined in claim 13, wherein the first port (portid_1) is configurable based on multiple port profiles (fig. 2, 1x16, 2x8, 4x4) to generate corresponding sets of one or more interfaces (fig. 4, “Glink”, SATA, “PCIe”), wherein the multiple port profiles include the given port profile of the plurality of port profiles (Glink), and wherein the corresponding sets of one or more interfaces include the first set of one or more interfaces (PCIe, SATA).
As to claim 20, Luong/Pearson discloses the network device defined in claim 19, wherein the first set of one or more interfaces is in a first breakout configuration for the first port (“Glink” is one of multiple configuration from portid_01) and wherein the set of one or more interfaces include an additional set of one or more interfaces (PCIe) in a second breakout configuration for the first port (PCIe is a second configuration of portid_01).
Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Luong in view of Pearson and further in view of Kim (US 20220050800).
As to claim 2, Luong/Pearson discloses the network device defined in claim 1, wherein each of the one or more physical lanes has a corresponding lane identifier (fig. 6, lane 0…lane 15) but does not disclose the limitations in claim 2. In the same field of art (peripheral configuration), Kim discloses a method of operating a memory controller capable of connecting to various connectors (par. 6). In one embodiment, Kim discloses a control circuitry is configured to identify the given interface by an interface identifier (fig. 7, s103) independent of the one or more lane identifiers of the one or more physical lanes (fig. 6, Note: Sig1, sig2, sig3 are independent to lane identifiers). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Luong/Pearson and Kim, by comprising the control circuitry configured to identify the given interface by an interface identifier independent of the one or more lane identifiers of the one or more physical lanes. The motivation is to improve the flexibility of the system (par. 6 “various connectors”).
As to claim 3, Luong/Pearson/Kim discloses the network device defined in claim 2, wherein the interface identifier does not include any of the one or more lane identifiers (Luong, fig. 2, “Glink”, “PCIe” as interface identifiers do not include lane identifiers).
As to claim 4, Luong/Pearson/Kim discloses the network device defined in claim 2 further comprising:
a physical layer interface module that includes the port (Luong, par. 22), wherein the interface identifier includes an identifier for the physical layer interface module (e.g. SATA, Glink, Ethernet, etc.).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.P/Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184