DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I in the reply filed on 26 June 2026 is acknowledged. The traversal is on the ground(s) that examination of the entire application can be made without serious burden. This is not found persuasive because an entire search would require searching for method for manufacturing the piezoelectric substrate by polishing.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 6-7, 9 and 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Daimon (PG Pub 20210399712).
Considering claim 1, Daimon (Figure 1) teaches a composite substrate, comprising: a piezoelectric layer (7 + paragraph 0030); and a reflective layer arranged on a back surface side (5 + 4 + paragraph 0029) of the piezoelectric layer, the reflective layer including a low impedance layer containing silicon oxide (4 + paragraph 0029) and a high impedance layer (5 + paragraph 0029), wherein the piezoelectric layer has a modified layer (6 + paragraph 0030) formed in an end portion on the back surface side thereof, and wherein the low impedance layer has a density of 2.15 g/cm^3 or more (5 + paragraph 0029 + implicit the limitation is met since the same material is used for the low impedance layer (silicon oxide)).
Considering claim 2, Daimon (Figure 1) teaches wherein the modified layer has a thickness of 0.3 nm or more (6 + paragraph 0058).
Considering claim 3, Daimon (Figure 1) teaches wherein the modified layer has a thickness of 4.5 nm or less (6 + paragraph 0058).
Considering claim 6, Daimon (Figure 1) teaches wherein the high impedance layer contains at least one selected from: hafnium oxide, tantalum oxide, zirconium oxide and aluminum oxide (4 + paragraph 0028).
Considering claim 7, Daimon teaches wherein the high impedance layer and the low impedance layer each have a thickness of from 0.01 microns to 1 micron (paragraphs 0038-0039).
Considering claim 9, Daimon (Figure 1) teaches comprising a support substrate (3 + paragraph 0027) arranged on a back surface side of the reflective layer.
Considering claim 11, Daimon (Figure 1) teaches a surface acoustic wave element (1 + paragraph 0025), comprising the composite substrate.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Daimon (PG Pub 20210399712) and in view of Miyagawa (JP 2018074430).
Considering claim 4, Daimon teaches the modified layer as described above.
However, Daimon does not teach wherein the modified layer contains an amorphous substance.
Miyagawa teaches wherein the modified layer contains an amorphous substance (paragraph 0019).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to include the modified layer contains an amorphous substance into Daimon’s device for the benefit of bonding two separate substrate to form a wafer.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Daimon (PG Pub 20210399712).
Considering claim 5, Daimon disclosed the claimed invention except for wherein the modified layer has a silicon atom content of less than 10 atom%. It would have been obvious to one having ordinary skill in the art at the time of the invention was made to have the modified layer has a silicon atom content of less than 10 atom%, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art.
Claim(s) 8 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Daimon (PG Pub 20210399712) and in view of Kimura (PG 20140152146).
Considering claim 8, Daimon teaches the composite substrate as described above.
However, Daimon does not teach wherein the high impedance layer and the low impedance layer are alternately laminated in the reflective layer.
Kimura (Figure 1A) teaches wherein the high impedance layer (3a + 3c + paragraph 0036) and the low impedance layer (3b + 3d + paragraph 0036) are alternately laminated in the reflective layer (3 + paragraph 0036).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to include the high impedance layer and the low impedance layer are alternately laminated in the reflective layer into Daimon’s device for the benefit of providing an elastic wave device that offers good characteristics and improved temperature characteristics.
Considering claim 10, Kimura teaches comprising a joining layer (paragraph 0075) arranged between the reflective layer and the support substrate.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRYAN P GORDON whose telephone number is (571)272-5394. The examiner can normally be reached M-F 8 a.m. - 4:30 p.m..
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/BRYAN P GORDON/Primary Examiner, Art Unit 2837
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