Prosecution Insights
Last updated: April 19, 2026
Application No. 18/363,160

System and method for processing data interactions using optical computing

Non-Final OA §102
Filed
Aug 01, 2023
Examiner
MANOSKEY, JOSEPH D
Art Unit
2113
Tech Center
2100 — Computer Architecture & Software
Assignee
BANK OF AMERICA CORPORATION
OA Round
1 (Non-Final)
93%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
84%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allow Rate
849 granted / 910 resolved
+38.3% vs TC avg
Minimal -9% lift
Without
With
+-9.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
18 currently pending
Career history
928
Total Applications
across all art units

Statute-Specific Performance

§101
17.7%
-22.3% vs TC avg
§103
28.7%
-11.3% vs TC avg
§102
34.3%
-5.7% vs TC avg
§112
7.5%
-32.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 910 resolved cases

Office Action

§102
DETAILED ACTION This Office Action is in response to Application filed on 01 August 2023. Claims 1-20 are pending. The claims have been considered and examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 5, 6, 8, 9, 12, 13, 15, 16, 19, 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bunandar et al., U.S Patent App. Pub. 2019/0356394, hereinafter referred to as “Bunandar”. Referring to claim 1, Bunandar discloses a system (See paragraph 0010). - A system comprising: Bunandar discloses a memory for storing matrix for the photonic processor, the matrices can be images (See paragraphs 0099-0100 and 0357). - a memory configured to store a plurality of reference process images: Bunandar discloses processor connected to the memory (See Fig. 1-1, paragraph 0099). - a processor communicably coupled to the memory and configured to: Bunandar discloses photonic processors complete jobs (See paragraph 0223). - receive a command to process a job; Bunandar discloses the job is for the photonic processors (See paragraph 0223). - generate a plurality of process images associated with processing the job, wherein each process image represents a portion of the processing of the job; Bunandar discloses subdividing the matrices into submatrices for processing on the photonic processor (See paragraphs 0033 and 0239). - deploy the plurality of process images for processing on a plurality of optical computing nodes, wherein each of the plurality of optical computing nodes is assigned a portion of the process images; Bunandar discloses determining errors in the output of the photonic processor (See paragraph 0203). - detect that a first process image failed to process at a first optical computing node of the plurality of optical computing nodes; Bunandar discloses a precomputed test signal for the detectors (See paragraph 0203). - access from the memory, a first reference process image corresponding to the failed first process image; Bunandar discloses determining the difference between the pre-computed test signals and the measured test signals to determine the error (See paragraphs 0203-0204). - compare the failed first process image to the first reference process image, wherein the comparison includes comparing metadata associated with the failed first process image and the first reference process image; Bunandar discloses determining cause of the error via phase shift (See paragraph 0203-0205). - determine, based on the comparison, a root cause that caused the first process image to fail at the first optical computing node, wherein the root cause includes an inconsistency in the metadata between the failed first process image and the first reference process image; Bunandar discloses calibrating the system based on the total systemic phase error (See paragraph 0203). - resolve the root cause associated with the first process image by removing the inconsistency between the first process image and the first reference process image; and Bunandar discloses distributing the computation among multiple photonic processors (See paragraph 0222). - re-deploy the first process image for processing at the first optical computing node or a second optical computing node. Referring to claim 2, Bunandar discloses determining errors in the output of the photonic processor (See paragraph 0203). - The system of Claim 1, wherein the processor is further configured to: detect that the root cause that caused the first process image to fail is associated with a malfunction associated with the first optical computing node; and Bunandar discloses distributing the computation among multiple photonic processors (See paragraph 0222). - in response to detecting that the root cause that caused the first process image to fail is associated with a malfunction associated with the first optical computing node, re-deploy the first process image for processing at the second optical computing node. Referring to claim 5, Bunandar discloses calibrating the system based on the total systemic phase error (See paragraph 0203). - The system of Claim 1, wherein the processor is configured to re-deploy the first process image by: generating an updated first process image after resolving the root cause associated with the first process image; and Bunandar discloses distributing the computation among multiple photonic processors (See paragraph 0222). - deploying the updated first process image for processing at the first optical computing node. Referring to claim 6, Bunandar discloses calibrating the system based on the total systemic phase error (See paragraph 0203). - The system of Claim 1, wherein the processor is configured to re-deploy the first process image by: generating an updated first process image after resolving the root cause associated with the first process image; and Bunandar discloses distributing the computation among multiple photonic processors (See paragraph 0222). - deploying the updated first process image for processing at the second optical computing node. Claims 8, 9, 12 and 13 are rejected for similar reasons as claims 1, 2, 5 and 6 respectively, see above rejections. Additionally, Bunandar discloses a method (See paragraph 0011). Claims 15, 16, 19, and 20 are rejected for similar reasons as claims 1, 2, 5, and 6 respectively, see above rejections. Additionally, Bunandar discloses non-transitory computer-readable storage medium with instructions to be executed by a processor (See paragraph 0410). Allowable Subject Matter Claims 3, 4, 7, 10, 11, 14, 17, and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent 12,443,356 to Tuner et al. - Optical computing with disaggregated memory U.S. Patent 8,218,965 to Uhlhorn et al. - Optical failover routing U.S. Patent App. Pub. 2025/0251970 to Singh et al. - Job scheduler in Photonic quantum computing Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSEPH D MANOSKEY whose telephone number is (571)272-3648. The examiner can normally be reached M-F 7:30am to 3:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo can be reached at 571-272-3655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSEPH D MANOSKEY/Primary Examiner, Art Unit 2113 February 20, 2026
Read full office action

Prosecution Timeline

Aug 01, 2023
Application Filed
Feb 20, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
93%
Grant Probability
84%
With Interview (-9.2%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 910 resolved cases by this examiner. Grant probability derived from career allow rate.

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