Prosecution Insights
Last updated: April 19, 2026
Application No. 18/363,472

Solid-State Cooler Device with Normal Metal Substrates

Non-Final OA §103§112
Filed
Aug 01, 2023
Examiner
MOORE, DEVON TYLEN
Art Unit
3763
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Northrop Grumman Systems Corporation
OA Round
1 (Non-Final)
47%
Grant Probability
Moderate
1-2
OA Rounds
2y 11m
To Grant
76%
With Interview

Examiner Intelligence

Grants 47% of resolved cases
47%
Career Allow Rate
70 granted / 150 resolved
-23.3% vs TC avg
Strong +29% interview lift
Without
With
+28.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
88 currently pending
Career history
238
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
54.9%
+14.9% vs TC avg
§102
11.4%
-28.6% vs TC avg
§112
31.8%
-8.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 150 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Invention I (Claims 1-10) in the reply filed on January 05th, 2026 is acknowledged. Claims 11-21 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Inventions II and III, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on January 05th, 2026. Claim Objections Claims 2 and 9-10 are objected to because of the following informalities: Claim 2, line 1: “a normal metal substrate layer” should read “the normal metal substrate layer” Claim 9, line 2: “quasiparticles from the from the” should read “quasiparticles from the” Claim 10, lines 1-2: “wherein a last stage” should read “wherein a last refrigeration stage of the plurality of refrigeration stages” Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 5-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The term “large” in claim 5 is a relative term which renders the claim indefinite. The term “large” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The size of the contact area is rendered indefinite by the use of the term “large” for purposes of examination, the Examiner will interpret the claim to simply require a contact area. Claim 5 recites the limitation "the quasiparticles" in line 3. There is insufficient antecedent basis for this limitation in the claim. The Examiner recommends changing “the quasiparticles" in line 3 of claim 5 to “quasiparticles”. Claim 6 is also rejected by virtue of its dependency on claim 5. Claim 7 is also rejected by virtue of its dependency on claim 6. Claim 8 is also rejected by virtue of its dependency on claim 7. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1, 3-5, and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Young et al. (US Patent No. 11,333,413), hereinafter Young in view of Hathaway et al. (US Patent No. 11,189,773), hereinafter Hathaway. Regarding claim 1, Young discloses a solid-state cooler device (Fig. 1, solid state cooler device 10) comprising: a first portion having a substrate heat sink layer (Fig. 1, substate 12; Col. 4, lines 2-3, a substrate 12 that is disposed on a hot side of a refrigeration stage; Further, as Fig. 1 depicts cooling of 70 mK to be applied to layer 32 and 500 mk to be applied to first and second conductive pads 14 and 16, the substate 12 which is connected to the first and second conductive pads 14 and 16 is functioning as a heat sink); and a second portion having a normal metal layer, insulator layer, superconductor layer (NIS) junction, the second portion being coupled to the first portion via a plurality of point contacts (Fig. 1, normal metal layer 32, first insulating layer 28, second insulating layer 30, first superconductor pad 20, second superconductor pad 24, first conductive pad contact interfaces 22, second conductive pad contact interfaces 26), wherein the normal metal heat sink layer a substrate layer (Fig. 1, substate 12; Col. 4, lines 2-3, a substrate 12 that is disposed on a hot side of a refrigeration stage). However, Young does not explicitly disclose the substate to be a normal metal layer. Hathaway teaches first portion to include a normal metal layer (Fig. 1, superconductor thermal filter 10, normal metal quasiparticle trap 22; Col. 4, lines 15-17, A normal metal quasiparticle trap 22 is disposed on a second or hot side of the multilayer superconductor structure 15). Young fails to teach the first portion substate heat sink layer to be a normal metal, however Hathaway teaches that it is a known method in the art of solid-state coolers to include the first portion substate heat sink layer to be a normal metal. This is strong evidence that modifying Young as claimed would produce predictable results (i.e. providing a quasiparticle trap in the substate heat sink layer to improve overall heat exchange capacity). Accordingly, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Young by Hathaway and arrive at the claimed invention since all claimed elements were known in the art and one having ordinary skill in the art could have combined the elements as claimed by known methods with no changes in their respective functions and the combination would have yielded the predictable result of providing a quasiparticle trap in the substate heat sink layer to improve overall heat exchange capacity. Further, the modification of references used in the rejection of claim 1 result in the substate heat sink layer being a normal metal substate layer. Regarding claim 3, Young as modified discloses the solid-state cooler device of claim 1 (see the combination of references used in the rejection of claim 1 above), wherein normal metal materials of the solid-state cooler are selected from the group comprising gold (Au), platinum (Pt), tungsten (W), titanium tungsten (TiW), copper (Cu), titanium (Ti), silver (Ag), and chromium (Cr) (Young, Col. 5, lines 9-12, The normal metal layer 32 can be formed of a normal metal such as gold, platinum, or a metal that is above its superconducting transition temperature, such as titanium or chromium, or a combination thereof). Regarding claim 4, Young as modified discloses the solid-state cooler device of claim 1 (see the combination of references used in the rejection of claim 1 above), wherein superconductor materials of the solid-state cooler are selected from the group comprising indium (In), niobium (Nb), aluminum (Al), titanium (Ti), tin (Sn), molybdenum (Mo), tantalum (Ta), and Vanadium (V) (Young, Col. 5, lines 12-15, The first and second superconductor pads 20 and 24 can be formed of indium, niobium, aluminum, or some other superconducting metal). Regarding claim 5, Young as modified discloses the solid-state cooler device of claim 1 (see the combination of references used in the rejection of claim 1 above), further comprising an interface layer disposed between the plurality of point contacts and the normal metal heat sink layer, the interface layer providing a large contact area for the quasiparticles to spread out and enter the normal metal heat sink layer (Young, Fig. 1, first conductive pad 14, second conductive pad 16; Col. 4, lines 56-58, The first conductive pad 14 and the second conductive pad 16 act as a quasi-particle trap when formed of a normal metal; Hathaway, Col. 4, lines 15-17, A normal metal quasiparticle trap 22 is disposed on a second or hot side of the multilayer superconductor structure 15; Further, the result of the modification of references used in the rejection of claim 1 above result in quasiparticles being trapped in the normal metal substate layer 12 as modified herein; Further, the substate layer 12 as modified herein has the same structure as the claimed normal metal heat sink layer and is capable of functioning in the manner claimed). Regarding claim 9, Young as modified discloses the solid-state cooler device of claim 1 (see the combination of references used in the rejection of claim 1 above), wherein the solid-state cooler device is configured to move quasiparticles from the from the normal metal layer of the NIS junction to the normal metal heat sink layer in response to an electric current that flows across the NIS junction (Young, Col. 4, lines 43-58, A graph 34 illustrates the principle of operation, where hot electrons above the Fermi level tunnel across the insulating layers 28 and 30 into the superconductor pads 20 and 24, respectively, thus removing heat from the normal metal layer 32. The use of the plurality of first conductive pad contact interfaces 22, and the plurality of second conductive pad contact interfaces 26 provides for a reduction of temperature and an increase delta temperature between the hot side and cold side of the solid state cooler device 10 relative to conventional devices. The first conductive pad 14 and the second conductive pad 16 can be formed from a normal metal or a superconducting metal. The first conductive pad 14 and the second conductive pad 16 act as a quasi-particle trap when formed of a normal metal; Hathaway, Col. 4, lines 25-47, A bias voltage (+V/-V) is applied between the normal metal layer 12 disposed on the cold side of the superconductor thermal filter 10 and the normal metal quasiparticle trap 22 disposed on the hot side of the superconductor thermal filter 10. The bias voltage (V +/-V) raises the energy level of the hot electrons on the normal metal layer 12. FIG. 2 illustrates a graph 30 that shows the principle of operation and the net heat flow of the superconductor thermal filter 10 of FIG. 1, where hot electrons in the normal metal layer 12 above the Fermi level tunnel across the insulator layer 14 into the first superconductor layer 16, thus removing heat from the normal metal layer 12. The hot electrons then move readily to the second superconductor layer 18 since it has a lower energy bandgap that the first superconductor layer 16. These hot electrons then move readily to the third superconductor layer 20 since it has a lower energy bandgap that the second superconductor layer 18. Finally, the hot electrons move into the normal metal quasiparticle trap 22 on the hot side of the superconductor thermal filter 10. The decreasing superconducting energy gaps reduces the quasiparticle backflow, while the use of a quasiparticle trap prevents the quasi particles from reintegrating into phonons while in the superconducting material; Further, the solid-state cooler 10 of Young as modified as described herein has the same structure as the claimed solid-state cooler and is capable of functioning in the manner claimed). Further, the limitations of claim 9 are the result of the modification of references used in the rejection of claim 1 above. Regarding claim 10, Young as modified discloses a refrigeration system comprising a plurality of refrigeration stages, wherein a last stage comprises a refrigeration container formed from one or more plates and a plurality of solid-state cooler devices as claimed in claim 1 disposed about the outside of the refrigeration container (See the combination of references used in the rejection of claim 1 above; Young, Fig. 11, refrigeration system 110, plurality of stages 1, 2, N, refrigeration container 120, plurality of solid state devices 122; Col. 7, lines 11-35, FIG. 11 illustrates a block diagram of a refrigeration system 110 that employs solid state devices such as the solid state device 10 of FIG. 1. The refrigeration system 10 includes a plurality of stages labeled stage #1 to stage #N, where N is an integer greater than or equal to 2. Each refrigeration stage provides an additional temperature drop from the previous stage, such that the Nth stage is the final stage and provides the last temperature drop and lowest temperature of the refrigeration system 110. In other examples, the Nth stage is a first or intermediary stage as opposed to the last stage. Stage #N in the refrigeration system 110 includes a refrigeration container 120 with a plurality of solid state devices 122 similar to that illustrated in FIG. 1 disposed about the container and cooperating to provide the final lowest temperature of the refrigeration system 110 within the container 120. The container 120 can be in a vacuum environment and be configured to house superconducting circuitry. In another example, one or more of the other stages employ solid state devices similar to those in stage #N to provide incremental temperature drops across the refrigeration system 110. In other examples, the refrigeration container 120 can be formed of a normal metal that provides the final normal metal layer of each solid state device 122; Further, the teachings of Young which recite “the refrigeration container 120 can be formed of a normal metal that provides the final normal metal layer of each solid state device 122” at least imply the solid state devices 122 are disposed on the outside of the container 120 since it has been held in considering the disclosure of a reference, it is proper to take into account not only specific teachings of the reference but also the inferences which one skilled in the art would reasonably be expected to draw therefrom (MPEP 2144.01)). Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Young as modified by Hathaway as applied to claim 1 above, and further in view of Hathaway et al. (US Patent No. 10,644,218), hereinafter Hathaway ‘218. Regarding claim 2, Young as modified discloses the solid-state cooler device of claim 1 (see the combination of references used in the rejection of claim 1 above). However, Young as modified does not disclose wherein a normal metal substrate layer has a thickness from about 100 microns to about 1500 microns. Hathaway ‘218 teaches selecting thickness of both superconducting metals and normal metals based on 2 coherence lengths of the type of superconducting metal in the solid-state cooler device (Col. 4, lines 41-47, The thickness of each metal layer can be selected to be greater than a thickness of at least 2 coherence lengths of the type of superconducting metal in the superconducting metal layer 20 to assure that the superconducting metal layer 20 retains its superconducting properties, and that the first normal metal layer 18 and the second normal metal layer 20 retains its normal metal properties). AS such, the thickness of the metal layers within the solid-state cooler device, including the normal metal substrate layer, is disclosed to be a result effective variable in that changing the superconducting material used in the solid-state cooler changes the required thickness of all of the metal layers in the system, including the normal metal substrate layer. Therefore, it would have been obvious to one having ordinary skill in the art at the time of the invention to modify the solid-state cooler device of Young as modified by making the thickness of the normal metal substrate layer be between about 100 microns to about 1500 microns as a matter of routine optimization since it has been held that “where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). (MPEP 2144.05-II-A). Claims 6-8 is rejected under 35 U.S.C. 103 as being unpatentable over Young as modified by Hathaway as applied to claim 5 above, and further in view of Dahlberg (EP 0021025), hereinafter Dahlberg. Regarding claim 6, Young as modified discloses the solid-state cooler device of claim 5 (see the combination of references used in the rejection of claim 5 above). However, Young as modified does not disclose further comprising a plurality of first parallel ridges over the normal metal heat sink layer and a plurality of second parallel ridges disposed over the superconductor layer of the NIS junction, wherein the plurality of first parallel ridges are in contact and orthogonal to the plurality of second parallel ridges to provide a plurality of grid point contacts corresponding to the plurality of point contacts. Dahlberg teaches Josephson junctions for electrical connections between two portions of a solid-state device containing superconductors which include a plurality of first parallel ridges over a first portion of the solid-state device containing superconductors and a plurality of second parallel ridges disposed over a second portion of the solid-state device containing superconductor, wherein the plurality of first parallel ridges are in contact and orthogonal to the plurality of second parallel ridges to provide a plurality of grid point contacts corresponding to the plurality of point contacts (Fig. 2a-2c, plates 1 and 2, parallel ridges 3, point contacts 4; Pg. 2, Fig. 2a shows schematically two plates 1, 2 made of niobium, each carrying a structure on one side with walls 3 running parallel to one another, each of which is separated from one another by trenches. The structures on both plates 1, 2 are marked with a 1. 10-4 cm thick layer 7 of NbN coated. The plate 1 is rotated in Fig. 2b by the angle a = 90 ° in the plate plane with respect to the plate 2. Both panels are joined together with the structured surfaces under pressure. The intersecting and touching ramparts 3 in the structures of the plates 1, 2 thereby form a multiplicity of regularly distributed, equally large, electrically parallel point contacts 4, as schematically shown in FIG. 2c a section through the plane of contact). Young as modified fails to teach a plurality of first parallel ridges over the normal metal heat sink layer and a plurality of second parallel ridges disposed over the superconductor layer of the NIS junction, wherein the plurality of first parallel ridges are in contact and orthogonal to the plurality of second parallel ridges to provide a plurality of grid point contacts corresponding to the plurality of point contacts, however Dahlberg teaches that it is a known method in the art of superconductor connections in solid-state devices to include Josephson junctions for electrical connections between two portions of a solid-state device containing superconductors which include a plurality of first parallel ridges over a first portion of the solid-state device containing superconductors and a plurality of second parallel ridges disposed over a second portion of the solid-state device containing superconductor, wherein the plurality of first parallel ridges are in contact and orthogonal to the plurality of second parallel ridges to provide a plurality of grid point contacts corresponding to the plurality of point contacts. This is strong evidence that modifying Young as modified as claimed would produce predictable results (i.e. controlling heat flow without the addition of parasitic heat to improve overall heat exchange capacity). Accordingly, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Young as modified by Dahlberg and arrive at the claimed invention since all claimed elements were known in the art and one having ordinary skill in the art could have combined the elements as claimed by known methods with no changes in their respective functions and the combination would have yielded the predictable result of controlling heat flow without the addition of parasitic heat to improve overall heat exchange capacity. Regarding claim 7, Young as modified discloses the solid-state cooler device of claim 6 (see the combination of references used in the rejection of claim 6 above). However, Young as modified does not explicitly disclose wherein two or more of the materials that form the superconductor material layer of the NIS junction, the plurality of second parallel ridges, the plurality of first parallel ridges and the interface layer are formed of a normal-metal or of different superconductor materials that have progressingly decreasing superconducting energy bandgaps from the superconductor material layer of the NIS junction to the interface layer. Hathaway teaches wherein two or more of the materials that form the superconductor material layer of the NIS junction, the plurality of second parallel ridges, the plurality of first parallel ridges and the interface layer are formed of a normal-metal or of different superconductor materials that have progressingly decreasing superconducting energy bandgaps from the cold side to the hot side (Fig. 1, multilayer semiconductor structure 15, first superconductor layer 16, second superconductor layer 1, third superconductor layer 20; Col. 4, lines 15-24, A normal metal quasiparticle trap 22 is disposed on a second or hot side of the multilayer superconductor structure 15. The multilayer superconductor structure 15 includes a first superconductor layer 16 (S1) with a first energy bandgap, a second superconductor layer 18 (S2) with a second energy bandgap and a third superconductor layer (S3) with a third energy bandgap. The first energy bandgap is greater than the second energy bandgap, and the second energy bandgap is greater than the third energy bandgap). Young as modified fails to teach wherein two or more of the materials that form the superconductor material layer of the NIS junction, the plurality of second parallel ridges, the plurality of first parallel ridges and the interface layer are formed of a normal-metal or of different superconductor materials that have progressingly decreasing superconducting energy bandgaps from the superconductor material layer of the NIS junction to the interface layer, however Hathaway teaches that it is a known method in the art of solid-state coolers to include two or more of the materials that form the superconductor material layer of the NIS junction, the plurality of second parallel ridges, the plurality of first parallel ridges and the interface layer are formed of a normal-metal or of different superconductor materials that have progressingly decreasing superconducting energy bandgaps from the cold side to the hot side. This is strong evidence that modifying Young as modified as claimed would produce predictable results (i.e. the decreasing superconducting energy gaps reduces the quasiparticle backflow, while the use of a quasiparticle trap prevents the quasi particles from reintegrating into phonons while in the superconducting material (Hathaway, Col. 4, lines 43-47)). Accordingly, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Young as modified by Hathaway and arrive at the claimed invention since all claimed elements were known in the art and one having ordinary skill in the art could have combined the elements as claimed by known methods with no changes in their respective functions and the combination would have yielded the predictable result of the decreasing superconducting energy gaps reduces the quasiparticle backflow, while the use of a quasiparticle trap prevents the quasi particles from reintegrating into phonons while in the superconducting material (Hathaway, Col. 4, lines 43-47). Regarding claim 8, Young as modified discloses the solid-state cooler device of claim 7 (see the combination of references used in the rejection of claim 7 above). However, Young as modified does not explicitly disclose wherein the plurality of first parallel ridges are about 50 nm to about 500 nm wide and spaced apart from one another by about 1 μm to about 5 μm spaces, and the plurality of second parallel ridges are about 50 nm to about 500 nm wide and spaced apart from one another by about 1 μm to about 5 μm spaces. Young as modified teaches the claimed invention except for wherein the plurality of first parallel ridges are about 50 nm to about 500 nm wide and spaced apart from one another by about 1 μm to about 5 μm spaces, and the plurality of second parallel ridges are about 50 nm to about 500 nm wide and spaced apart from one another by about 1 μm to about 5 μm spaces. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include wherein the plurality of first parallel ridges are about 50 nm to about 500 nm wide and spaced apart from one another by about 1 μm to about 5 μm spaces, and the plurality of second parallel ridges are about 50 nm to about 500 nm wide and spaced apart from one another by about 1 μm to about 5 μm spaces, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges [ or optimum value ] involves only routine skill in the art. In re Aller, 105 USPQ 233. MPEP 2144.05-II-A. Furthermore, since applicants have not disclosed that these modifications solve any stated problem or are for any particular purpose and it appears that the device would perform equally well with either designs, these modifications are a matter of design choice. Absent a teaching as to criticality of wherein the plurality of first parallel ridges are about 50 nm to about 500 nm wide and spaced apart from one another by about 1 μm to about 5 μm spaces, and the plurality of second parallel ridges are about 50 nm to about 500 nm wide and spaced apart from one another by about 1 μm to about 5 μm spacesthis particular arrangement is deemed to have been known by those skilled in the art since the instant specification and evidence of record fail to attribute any significance (novel or unexpected results) to a particular arrangement. In re Kuhle, 526 F.2d 553,555,188 USPQ 7, 9 (CCPA 1975). MPEP 2144.05. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hathaway et al. (US 20210257533) discloses a similar solid-state cooler device. Chew et al. (US Patent No. 5,821,556) discloses a similar Josephson junction for use in solid-state devices with superconductors. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEVON T MOORE whose telephone number is 571-272-6555. The examiner can normally be reached M-F, 7:30-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Frantz Jules can be reached at 571-272-6681. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DEVON MOORE/Examiner, Art Unit 3763 January 23rd, 2026 /FRANTZ F JULES/Supervisory Patent Examiner, Art Unit 3763 /FRANTZ F JULES/Supervisory Patent Examiner, Art Unit 3763
Read full office action

Prosecution Timeline

Aug 01, 2023
Application Filed
Jan 26, 2026
Non-Final Rejection — §103, §112
Mar 31, 2026
Examiner Interview Summary
Mar 31, 2026
Applicant Interview (Telephonic)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12595948
ICE MAKER, REFRIGERATOR, AND METHOD FOR CONTROLLING THE REFRIGERATOR
2y 5m to grant Granted Apr 07, 2026
Patent 12566016
AUTONOMOUS PORTABLE REFRIGERATION UNIT
2y 5m to grant Granted Mar 03, 2026
Patent 12553646
DILUTION REFRIGERATION DEVICE AND METHOD
2y 5m to grant Granted Feb 17, 2026
Patent 12553578
CRYOGENIC LIQUID STORAGE APPARATUS AND LIQUID LEVEL MEASUREMENT DEVICE
2y 5m to grant Granted Feb 17, 2026
Patent 12546516
A HEAT EXCHANGER AND REFRIGERATION SYSTEM AND METHOD
2y 5m to grant Granted Feb 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
47%
Grant Probability
76%
With Interview (+28.9%)
2y 11m
Median Time to Grant
Low
PTA Risk
Based on 150 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month