Prosecution Insights
Last updated: May 29, 2026
Application No. 18/366,597

DISPLAY APPARATUS

Final Rejection §102§103
Filed
Aug 07, 2023
Priority
Dec 16, 2022 — RE 10-2022-0176878
Examiner
FEATHERLY, HANA SANEI
Art Unit
2875
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
2 (Final)
74%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
482 granted / 656 resolved
+5.5% vs TC avg
Strong +19% interview lift
Without
With
+19.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
16 currently pending
Career history
678
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
76.9%
+36.9% vs TC avg
§102
18.2%
-21.8% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 656 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment(s) The Amendment, filed on 4/7/2026, has been entered and acknowledged by the Examiner. Cancellation of claim(s) 7-8 has been entered. Claim(s) 1-6, 9-25 are pending in the instant application. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55, which papers have been placed of record in the file. Drawings The drawings were received on 8/7/2023. These drawings are considered acceptable by Examiner. Response to Arguments Applicant's argument(s) filed on 4/7/2026 have been fully considered but are not found to be persuasive by Examiner. A. In response to Applicant's arguments that the prior art of record does not disclose the claimed invention, the Examiner respectfully disagrees. Examiner maintains that Kim et al., does indeed disclose a second substrate (ENC) disposed on the cathode (CAT) with an adhesive layer (¶ [0028]) interposed therebetween, a black matrix (BM) disposed on the second substrate (ENC) facing the second sub-pixel; and a reflective layer (AG) disposed on the black matrix (BM), wherein the reflective layer (AG) contacts the black matrix (BM) and the adhesive layer. Specifically, the reflective layer (AG) does indeed “contact” the black matrix (BM) indirectly via subsequent intermediate elements within the device housing. For purposes of expediting examination, Examiner suggests including language such as -- directly contact -- in order to improve specificity of the elements in relation to one another. For the reasons stated above, the rejection of the claims is deemed proper. America Invents Act In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 1. Claim(s) 1-6, 9-10, 13-23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al., (U.S. Pub. No. 2019/0189727 A1) as previously cited by Examiner. Regarding Claim 1, Kim et al., teaches a display apparatus, comprising: a first substrate (SUB, “substrate,” ¶ [0040]-¶ [0060]; see at least Figs. 3-5) including a plurality of first sub-pixels (TE, “a top light-emitting area”) and a plurality of second sub-pixels (BE, “bottom light-emitting area”); a first thin film transistor (TT, “top-emitting thin-film transistors”) and a second thin film transistor (BT, “bottom-emitting thin-film transistors”) disposed in a first sub-pixel of the first sub-pixels of the first substrate (SUB); a first anode (ANOT) disposed in the first sub-pixel of the first substrate (SUB) and connected to the first thin film transistor (TT); a second anode (ANOB) disposed in a second sub-pixel of the second sub-pixels of the first substrate (SUB) and connected to the second thin film transistor (BT); a first emission part disposed on the first anode (ANOT); a second emission part disposed on the second anode (ANOB); and a cathode (CAT) disposed on the first emission part and the second emission part; a second substrate (ENC) disposed on the cathode (CAT) with an adhesive layer (¶ [0028]) interposed therebetween, a black matrix (BM) disposed on the second substrate (ENC) facing the second sub-pixel; and a reflective layer (AG) disposed on the black matrix (BM), wherein the reflective layer (AG) contacts the black matrix (BM) and the adhesive layer. Regarding Claim 2, Kim et al., teaches the display apparatus of claim 1, wherein the plurality of first sub-pixels (TE) and the plurality of second sub-pixels (BE) are alternately disposed adjacent to each other row by row (as clearly depicted in Figs. 1& 3). Regarding Claim 3, Kim et al., teaches the display apparatus of claim 1, wherein the plurality of first sub-pixels (TE) and the plurality of second sub-pixels (BE) are adjacent to each other in a first direction, wherein the plurality of first sub-pixels (TE) are disposed adjacent to each other in a second direction, and wherein the plurality of second sub-pixels (BE) are disposed adjacent to each other in the second direction (Fig. 3). Regarding Claim 4, Kim et al., teaches the display apparatus of claim 1, wherein the first sub-pixel is configured to display an image toward the cathode (CAT), and wherein the second sub-pixel is configured to display an image toward the first substrate (SUB). Regarding Claim 5, Kim et al., teaches the display apparatus of claim 1, wherein the first anode (ANOT) and the second anode (ANOB) include a transparent conductive layer (ITO, ¶ [0063]), and wherein the first anode (ANOT) further includes a reflective layer (AG, “a reflective electrode layer,” ¶ [0063]). Regarding Claim 6, Kim et al., teaches the display apparatus of claim 1, wherein the cathode (CAT) is commonly disposed in the first sub-pixel and the second sub-pixel, and wherein the cathode (CAT) includes a transflective electrode (¶ [0065]). Regarding Claim 9, Kim et al., teaches the display apparatus of claim 1, wherein the reflective layer (AG) is disposed on the cathode (CAT) facing the black matrix (BM). Regarding Claim 10, Kim et al., teaches the display apparatus of claim 1, further comprising: a planarization layer (OC, “first planarization layer,” ¶ [0091]) disposed on the first thin film transistor (TT) and the second thin film transistor (BT); and a bank (BN) disposed on the first anode (ANOT), the second anode (ANOB), and the planarization layer (OC). Regarding Claim 13, Kim et al., teaches the display apparatus of claim 1, wherein the first emission part includes: a first individual layer (OC, overlapping first emission part) disposed in the first sub-pixel; and a common layer (CAT) disposed on the first individual layer (ITO). Regarding Claim 14, Kim et al., teaches the display apparatus of claim 13, wherein the second emission part includes: a second individual layer (ANOB) disposed in the second sub-pixel; and the common layer (CAT) disposed on the second individual layer (ANOB). Regarding Claim 15, Kim et al., teaches the display apparatus of claim 14, wherein the first individual layer (OC) has a greater thickness than the second individual layer (ANOB). Regarding Claim 16, Kim et al., teaches the display apparatus of claim 14, wherein the first individual layer (OC) and the second individual layer (ANOB) are formed by a solution process. The applicant is claiming the product of the above element including a method (i.e. a process) of making by employing a solution process, consequently, this claim is considered a “product-by-process” claim. In spite of the fact that the product-by-process claim may recite only process limitations, it is the product and not the recited process that is covered by the claim. Further, patentability of a claim to a product does not rest merely on the difference in the method by which the product is made. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior art product was made by a different process. Furthermore, it is well established that a claimed apparatus cannot be distinguished over the prior art by a process limitation. Consequently, absent a showing of an unobvious difference between the claimed product and the prior art, the subject product-by-process claim limitation is not afforded patentable weight (see MPEP 2113). Regarding Claim 17, Kim et al., teaches the display apparatus of claim 1, wherein the first substrate (SUB) further includes a plurality of third sub-pixels (of sub-pixels SPR, SPW, SPG, SPB), and wherein the plurality of first sub-pixels (TE), the plurality of second sub-pixels (BE), and the plurality of third sub-pixels are alternately disposed adjacent to one another row by row (¶ [0012]-¶ [0013]). Regarding Claim 18, Kim et al., teaches the display apparatus of claim 17, wherein the plurality of first sub-pixels (TE), the plurality of second sub-pixels (BE), and the plurality of third sub-pixels (of sub-pixels SPR, SPW, SPG, SPB) are adjacent to one another in a first direction, wherein the plurality of first sub-pixels (TE) are adjacent to each other in a second direction, wherein the plurality of second sub-pixels (BE) are adjacent to each other in the second direction, and wherein the plurality of third sub-pixels (of sub-pixels SPR, SPW, SPG, SPB) are adjacent to each other in the second direction (Fig. 3). Regarding Claim 19, Kim et al., teaches the display apparatus of claim 17, wherein a first number of first sub-pixels among the plurality of first sub-pixels (TE), the first number of second sub-pixels among the plurality of second sub-pixels (BE), and the first number of third sub-pixels among the plurality of third sub-pixels (of sub-pixels SPR, SPW, SPG, SPB) constitute a pixel, and wherein the pixel further includes a plurality of data lines and a plurality of scan lines (of each transistor) disposed in the pixel. Regarding Claim 20, Kim et al., teaches the display apparatus of claim 19, wherein the plurality of data lines (¶ [0039]) include first data lines and second data lines disposed on both sides of the first sub-pixels, the second sub-pixels, and the third sub-pixels in respective columns (data lines, first, second, as clearly depicted in Fig 2). Regarding Claim 21, Kim et al., teaches the display apparatus of claim 20, wherein the first data lines (¶ [0039]) are electrically connected to the first sub-pixels and transmit a first data signal, and wherein the second data lines are electrically connected to the second sub-pixels (¶ [0039]) and transmit a second data signal that is the same as or different from the first data signal (Fig. 2). Regarding Claim 22, Kim et al., teaches the display apparatus of claim 19, further comprising: at least one high potential power supply line disposed on one side of the one pixel (based on high wavelength of respective RGB lights); and at least one low potential power supply line (based on lower wavelength of respective RGB lights) disposed on the other side of the one pixel. Regarding Claim 23, Kim et al., teaches the display apparatus of claim 22, wherein the high potential power line (data line, to supply adequate power, ¶ [0039]) is electrically connected to each of the first thin film transistor (TT) and the second thin film transistor (BT). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 2. Claim(s) 11-12, 24-25 are rejected under 35 U.S.C. 103 as being obvious over Kim et al., in view of Gee et al., (U.S. Pub. No. 2020/0212133 A1) as previously cited. Regarding Claim 11, Kim et al., teaches the invention set forth above (see rejection in the corresponding claim(s) above) and further teaches a first bank (BN) and second bank (SP). Kim et al., is silent regarding the first bank having a hydrophilic material and the second bank having a hydrophobic material on the first bank (Kim et al., is silent regarding any disclosure of specific material). In the same field of endeavor, Gee et al., teaches an organic display device (Fig. 2) wherein a first bank (142, “first bank” is “made of hydrophilic material,” ¶ [0062]) having a hydrophilic material; and a second bank (144, “second bank” is “made of hydrophobic material,” ¶ [0062]) having a hydrophobic material on the first bank (142) in order to encourage thermal evaporation that would otherwise not occur (¶ [0006]). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the bank materials, as disclosed by Gee et al., in the display device of Kim et al., in order to encourage thermal evaporation that would otherwise not occur (¶ [0006]). Regarding Claim 12, Kim et al., teaches the display apparatus of claim 11, wherein the first anode (ANOT) and the second anode (ANOB) are spaced apart from each other, and a portion of an upper surface of the planarization layer (OC) is exposed (as depicted in Fig. 3), and wherein the first bank (BN) covers one end of the first anode (ANOT) and one end of the second anode (ANOB) and is in contact with the exposed upper surface of the planarization layer (OC) between the first anode (ANOT) and the second anode (ANOB). Regarding Claim 24, Kim et al., teaches the invention set forth above (see rejection in the corresponding claim(s) above) and further teaches a first planarization layer (OC) and a second planarization layer (PAS) disposed on the first thin film transistor (TT) and the second thin film transistor (BT); and a bank (BN) disposed on the first anode (ANOT), the second anode (ANOB), and the first and second planarization layer (OC/PAS). Kim et al., is silent regarding the first bank having a hydrophilic material and the second bank having a hydrophobic material on the first bank (Kim et al., is silent regarding any disclosure of specific material). In the same field of endeavor, Gee et al., teaches an organic display device (Fig. 2) wherein a first bank (142, “first bank” is “made of hydrophilic material,” ¶ [0062]) having a hydrophilic material; and a second bank (144, “second bank” is “made of hydrophobic material,” ¶ [0062]) having a hydrophobic material on the first bank (142) in order to encourage thermal evaporation that would otherwise not occur (¶ [0006]). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the bank materials, as disclosed by Gee et al., in the display device of Kim et al., in order to encourage thermal evaporation that would otherwise not occur (¶ [0006]). Regarding Claim 25. Kim et al., teaches the display apparatus of claim 24, wherein the first bank (BN) extends to a third sub-pixel (of SPR, SPW, SPG, SPG) and is disposed in an entire surface of the third sub-pixel, and wherein the second planarization layer (OC) and the second bank (SP) are partially removed from the third sub-pixel. Examiner notes that the phrase “partially removed” does not recite a positive limitation and instead attempts to claim the disclosed invention by excluding what the applicants did not disclose or invent, rather than distinctly and particularly pointing out what the applicants did disclose or invent. Essentially this claim language fails to provide any structural element or concrete component. Conclusion Applicant's amendment does not overcome the current prior art of record, therefore: THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Examiner H. Featherly whose telephone number is 571-272-8654. The examiner can normally be reached on M-. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James R. Greece can be reached on 571-272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-272-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /H. Featherly/ Examiner Featherly Art Unit 2875 Patent Examiner /JAMES R GREECE/Supervisory Patent Examiner, Art Unit 2875
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Prosecution Timeline

Aug 07, 2023
Application Filed
Jan 07, 2026
Non-Final Rejection mailed — §102, §103
Apr 07, 2026
Response Filed
May 11, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
74%
Grant Probability
92%
With Interview (+19.0%)
2y 8m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 656 resolved cases by this examiner. Grant probability derived from career allowance rate.

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