Prosecution Insights
Last updated: April 19, 2026
Application No. 18/367,273

LIGHT-EMITTING DEVICE WITH QUANTUM DOTS AND MANUFACTURING METHOD THEREOF

Non-Final OA §102
Filed
Sep 12, 2023
Examiner
SANTIAGO, MARICELI
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Qdlux Inc.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
91%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
816 granted / 1013 resolved
+12.6% vs TC avg
Moderate +11% lift
Without
With
+10.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
25 currently pending
Career history
1038
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
42.1%
+2.1% vs TC avg
§102
40.1%
+0.1% vs TC avg
§112
13.1%
-26.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1013 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group I, claims 1-7, in the reply filed on February 6, 2026 is acknowledged. Claims 8-17 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2 and 4-7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liu et al. (CN 108767085 A). Regarding claim 1, Liu discloses a light-emitting device with quantum dots, comprising: a light-emitting diode chip (1); a transparent barrier layer (3), disposed on the light-emitting diode chip; a quantum dot film (7), disposed on the transparent barrier layer, such that the light-emitting diode chip (1) is separated from the quantum dot film (7) by the transparent barrier layer (3); and a transparent protective layer (6), disposed on the quantum dot film (7), such that the quantum dot film (7) is encapsulated between the transparent barrier layer (3) and the transparent protective layer (6). Regarding claim 2, Liu discloses a light-emitting device further comprising a base layer (2), configured to temporarily or permanently fix the light-emitting diode chip (1) on the base layer (2). Regarding claim 4, Liu discloses a light-emitting device wherein a material of the transparent protective layer is a coating film made of an inorganic material (silicone glue, ¶[0019]). Regarding claim 5, Liu discloses a light-emitting device wherein the transparent protective layer has a multi-layer structure (5, 6; Fig. 2) formed by different materials. Regarding claim 6, Liu discloses a light-emitting device further comprising a bracket (2) comprising a bottom part and a side part encircling to an edge of the bottom part (Fig. 1), wherein an accommodating space is formed between the bottom part and the side part, and the light-emitting diode chip (1) is fixed at the bottom part; and the transparent barrier layer (3), the quantum dot film (7) and the transparent protective layer (6) are sequentially disposed on the light-emitting diode chip and located at the accommodating space (Fig. 1). Regarding claim 7, Liu discloses a light-emitting device further comprising a plurality of additional quantum dot films (4, Fig. 2) and a plurality of additional transparent protective layers (5, Fig. 2), disposed above the transparent barrier layer (3), wherein each of the additional quantum dot films (4) is encapsulated between two of the additional transparent protective layers (5, Fig. 2). Claim(s) 1-4 and 6 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gao et al. (WO 2018/099081 A1). Regarding claim 1, Gao discloses a light-emitting device with quantum dots, comprising: a light-emitting diode chip (3); a transparent barrier layer (5), disposed on the light-emitting diode chip; a quantum dot film (8), disposed on the transparent barrier layer, such that the light-emitting diode chip (3) is separated from the quantum dot film (8) by the transparent barrier layer (5); and a transparent protective layer (9), disposed on the quantum dot film (8), such that the quantum dot film (8) is encapsulated between the transparent barrier layer (5) and the transparent protective layer (5). Regarding claim 2, Gao discloses a light-emitting device further comprising a base layer (1), configured to temporarily or permanently fix the light-emitting diode chip (3) on the base layer (1). Regarding claim 3, Gao discloses a light-emitting device wherein a material of each of the transparent barrier layer (Page 2, lines 10-11, 1st step), the quantum dot film (Page 2, lines 15-17, 4th step) and the transparent protective layer (Page 2, lines 23-24, 7th step) is a glue material. In regards to the limitation “capable of performing coating through dispensing and spray coating”, the limitation is directed to the method of manufacturing the layers, in view of an absent of a showing that the method imparts distinctive structural characteristics to the final product, the limitations directed to the method of manufacturing are not germane to the issue of patentability of the device. Regarding claim 4, Gao discloses a light-emitting device wherein a material of the transparent protective layer is a coating film made of an inorganic material (silicone glue, Page 5, lines 4-5). Regarding claim 6, Gao discloses a light-emitting device further comprising a bracket (1) comprising a bottom part and a side part encircling to an edge of the bottom part, wherein an accommodating space is formed between the bottom part and the side part, and the light-emitting diode chip (3) is fixed at the bottom part; and the transparent barrier layer (5), the quantum dot film (8) and the transparent protective layer (9) are sequentially disposed on the light-emitting diode chip and located at the accommodating space (Fig. 4). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim et al. (US 2010/0103648 A1) discloses a light emitting diode (LED) comprising a base including a cavity, an LED chip disposed on a bottom of the cavity and configured to generate a first light, and a light conversion layer, the light conversion layer including an upper substrate, a lower substrate and wavelength conversion particles. Wang et al. (CN 112635640 A) discloses a quantum dot light emitting device, comprising: packaging substrate comprising a containing groove; a light emitting chip set within the containing groove; a luminous function layer set at the opening of the containing groove; wherein the luminous function layer comprises a transparent substrate and a quantum dot film layer combined with the transparent substrate, a transparent packaging layer, set on the outer surface of the light emitting function layer. The rejections above rely on the references for all the teachings expressed in the text of the references and/or one of ordinary skill in the art would have reasonably understood or implied from the texts of the references. To emphasize certain aspects of the prior art, only specific portions of the texts have been pointed out. Each reference as a whole should be reviewed in responding to the rejection, since other sections of the same reference and/or various combinations of the cited references may be relied on in future rejections in view of amendments. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mariceli Santiago whose telephone number is (571) 272-2464. The examiner can normally be reached on Monday-Friday from 8:00 AM to 4:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han, can be reached on (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mariceli Santiago/Primary Examiner, Art Unit 2879
Read full office action

Prosecution Timeline

Sep 12, 2023
Application Filed
Mar 18, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604644
DISPLAY PANEL AND DISPLAY DEVICE
2y 5m to grant Granted Apr 14, 2026
Patent 12588394
DISPLAY DEVICE
2y 5m to grant Granted Mar 24, 2026
Patent 12588358
DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE
2y 5m to grant Granted Mar 24, 2026
Patent 12581800
DISPLAY PANEL AND MOBILE TERMINAL
2y 5m to grant Granted Mar 17, 2026
Patent 12581805
DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
91%
With Interview (+10.6%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 1013 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month