Prosecution Insights
Last updated: May 29, 2026
Application No. 18/368,003

LED DISPLAY SCREEN AND DATA DISPLAY CONTROL METHOD THEREFOR, AND SCREEN SYSTEM

Non-Final OA §103
Filed
Sep 13, 2023
Priority
Apr 01, 2021 — CN 202110360058.7 +1 more
Examiner
BODDIE, WILLIAM
Art Unit
2625
Tech Center
2600 — Communications
Assignee
Shenzhen Time Waying Technology Co. Ltd.
OA Round
2 (Non-Final)
26%
Grant Probability
At Risk
2-3
OA Rounds
2y 1m
Est. Remaining
51%
With Interview

Examiner Intelligence

Grants only 26% of cases
26%
Career Allowance Rate
52 granted / 196 resolved
-35.5% vs TC avg
Strong +24% interview lift
Without
With
+24.3%
Interview Lift
resolved cases with interview
Typical timeline
4y 10m
Avg Prosecution
21 currently pending
Career history
224
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
89.1%
+49.1% vs TC avg
§102
5.4%
-34.6% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 196 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . 2. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 3. Claim(s) 1-4 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yuan et al. (CN 105810112) in view of Luo (CN 206757805) and Park et al. (US 20190095167). Claims 1 and 4, Yuan discloses a data display control method for display screen, wherein the display screen comprises a plurality of LED boxes (fig. 1) and LED modules. The LED modules are inherently controlled to work simultaneously. Yuan does not, but Luo discloses generating a triggering signal and determining whether the triggering signal is a tampering signal ( the main board 2 is provided with a detecting circuit and tamper circuit, a detection circuit for detecting the main board 2 with the power off state between display module 1 and tamper circuit for detecting circuit detects the operation after being powered off for ensuring information security. detecting circuit capable of detecting main board 2 through conventional circuit is cut off and the display module 1 in the POS machine in the existing technology, the anti-dismantle circuit can be removed after operation of the display module 1 in the POS machine in the existing technology of circuit, can prompt the POS machine has been removed, prompting the information security.) In view of Luo, it would have been obvious to one of ordinary skill in the art before the effective filing of the application to determine all triggering signals emitted by the modules in the invention of Yuan so that tampering can be detected. The combined Yuan and Luo does not but Park discloses stop displaying data when the triggering signal is a tampering signal ([0025], [0352], [0438]-[0441]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing of the application to use Park ’s display function in the invention of the combined Yuan and Luo to stop displaying data when all tampering signals are detected so that display data can be protected. Claim 2, Luo further discloses a PCBA (2, fig. 1) being electrically connected to a display module (1, fig. 1), determining the triggering signal is the tampering signal when an interface status between the display module and the PCBA is disconnected; and determining the triggering signal is non-tampering signal when the interface status between the display module and the PCBA is connected ( the main board 2 is provided with a detecting circuit and tamper circuit, a detection circuit for detecting the main board 2 with the power off state between display module 1 and tamper circuit for detecting circuit detects the operation after being powered off for ensuring information security. detecting circuit capable of detecting main board 2 through conventional circuit is cut off and the display module 1 in the POS machine in the existing technology, the anti-dismantle circuit can be removed after operation of the display module 1 in the POS machine in the existing technology of circuit, can prompt the POS machine has been removed, prompting the information security.) Claim 3, Luo further discloses determining the triggering signal is the tampering signal when all of the interface statuses between any LED module and the PCBA are high level, determining the triggering signal is a non-tampering signal when the interface status between display module and the PCBA is low level, and controlling the display module to continue displaying data based on the non-tampering signal. ( the main board 2 is provided with a detecting circuit and tamper circuit, a detection circuit for detecting the main board 2 with the power off state between display module 1 and tamper circuit for detecting circuit detects the operation after being powered off for ensuring information security. detecting circuit capable of detecting main board 2 through conventional circuit is cut off and the display module 1 in the POS machine in the existing technology, the anti-dismantle circuit can be removed after operation of the display module 1 in the POS machine in the existing technology of circuit, can prompt the POS machine has been removed, prompting the information security.) Claim 11, Park further discloses a playback server connected to the display screen ([0004], [0076]) 4. Claim(s) 5-6, 12, 14-17, is/are rejected under 35 U.S.C. 103 as being unpatentable over Yuan et al., Luo et al. and Park et al. as applied to claim 1 above, and further in view of Choi et al. (CN 101388160). Claim 5, the combined Yuan, Luo and Park does not explicitly disclose a protection panel. However Choi discloses a PCBA (130, fig. 3), a protection panel (120, fig. 3) and a plurality of electrical connectors (display device 100 further comprises drive display module 110 parallel to rear part of display module 110 of printed circuit board 130. printed circuit board 130 can be connected to a display device 100 …), and the protection panel (120) being located between a display module (111 )and the PCBA (130) inside a box shell (fig. 3). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing of the application to use Choi’s features in the invention of the combined Yuan, Luo and Park to improve the structures of the LED module. Claims 6, 17, Choi discloses the PCBA (130) and the display module (111) are separated by the protection panel (120) (fig..3), and the PCBA (130) is connected to the display module (111). The protection pane (120) inherently comprises open structures for the electrical connectors to pass through. Claim 12, Luo further discloses a PCBA (2, fig. 1) being electrically connected to a display module (1, fig. 1), determining the triggering signal is the tampering signal when an interface status between the display module and the PCBA is disconnected; and determining the triggering signal is non-tampering signal when the interface status between the display module and the PCBA is connected ( the main board 2 is provided with a detecting circuit and tamper circuit, a detection circuit for detecting the main board 2 with the power off state between display module 1 and tamper circuit for detecting circuit detects the operation after being powered off for ensuring information security. detecting circuit capable of detecting main board 2 through conventional circuit is cut off and the display module 1 in the POS machine in the existing technology, the anti-dismantle circuit can be removed after operation of the display module 1 in the POS machine in the existing technology of circuit, can prompt the POS machine has been removed, prompting the information security.) Claim 14, Choi further discloses the protection panel partially contacts the LED modules, and is configured for limiting positions of the LED modules (Fig. 3). Claim 15, Choi’s the protection panel inherently limiting positions of the connectors (Fig. 3). Claim 16, Choi’s the connectors inherently comprises: a first connector port for electrically connecting the LED module, and a second connector port for electrically connecting the PCBA; the first connector port is connected to the second connector port; and the first connector port is provided at the backlight side of the LED module, and the second connector port is provided at a side of the PCBA adjacent to the backlight side of the LED module (display device 100 further comprises drive display module 110 parallel to rear part of display module 110 of printed circuit board 130. printed circuit board 130 can be connected to a display device 100 …) 5. Claim(s) 7-10, 13, 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yuan et al., Luo et al. Park et al and Choi et al. as applied to claim 5 above, and further in view of Zhu (CN 212033764). Claims 7, 18, the combined Yuan, Luo, Park and Choi does not but Zhu discloses an anti-tamper circuit being electrically connected to the LED modules, and the anti-tamper circuit comprises a first connection port for connecting the LED modules in parallel, a first switch unit being electrically connected to the first connection port, a second switch unit being connected to the first switch unit, a second connection port being electrically connected to the second switching unit and configured for connecting an external playback server, and first and second signal transmission units both being electrically connected to the first and second switching units, wherein the first signal transmission unit is for transmitting tampering signal, the second signal transmission unit is for transmitting non-tampering signal, and the first signal transmission unit and the second signal transmission unit are selectively conducted (abstract, figs. 1-4). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing of the application to use Zhu’s control features in the invention of the combined Yuan, Luo, Park and Choi to since the combined Yuan, Luo, Park and Choi does not teach using any specific control features in the PCBA. Claim 8, Zhu further discloses a charging and discharging unit being electrically connected to the first switch unit and the second switch unit, respectively, so as to supply power to the first switch unit and the second switch unit in case of power off (abstract, fig. 1-4). Claim 9, Zhu further discloses a first field-effect transistor and a fifth resistor, a gate of the first field-effect transistor is connected to the first connection port, a drain of the first field-effect transistor is connected to the charging and discharging unit through the fifth resistor, and a source of the first field-effect transistor is grounded; and the second switching unit comprises a second field-effect transistor and a seventh resistor, a gate of the second field-effect transistor is connected to a point of common coupling of the drain of the first field-effect transistor and the fifth resistor, a drain of the second field-effect transistor is connected to the charging and discharging unit through the seventh resistor, and a source of the second field-effect transistor is grounded (abstract, fig. 1-4). Claim 10., Zhu further discloses a charging terminal for connecting an external power source, a first diode, a first resistor, a second resistor, a first capacitor, a second capacitor and a discharging terminal for discharging, a positive pole of the first diode is for connecting the charging terminal, and a negative pole of the first diode is grounded through the second resistor and the second capacitor in sequence; the discharging terminal is grounded through the first resistor and the first capacitor in sequence, and a point of common coupling of the discharging terminal and the first resistor is connected to a point of common coupling of the negative terminal of the first diode and the second resistor (abstract, fig. 1-4). Claim 13, Luo further discloses determining the triggering signal is the tampering signal when all of the interface statuses between any LED module and the PCBA are high level, determining the triggering signal is a non-tampering signal when the interface status between display module and the PCBA is low level, and controlling the display module to continue displaying data based on the non-tampering signal. ( the main board 2 is provided with a detecting circuit and tamper circuit, a detection circuit for detecting the main board 2 with the power off state between display module 1 and tamper circuit for detecting circuit detects the operation after being powered off for ensuring information security. detecting circuit capable of detecting main board 2 through conventional circuit is cut off and the display module 1 in the POS machine in the existing technology, the anti-dismantle circuit can be removed after operation of the display module 1 in the POS machine in the existing technology of circuit, can prompt the POS machine has been removed, prompting the information security.) Claim 19, Zhu further discloses the first switching unit further comprises: a third resistor and a fourth resistor connected in serious; and one end of the third resistor is connected to the charging and discharging unit, a point of common coupling of the third resistor and the fourth resistor is connected to the gate of the first field-effect transistor, and another end of the fourth resistor is grounded; and wherein the second switching unit further comprises: a sixth resistor and a tenth resistor connected in series; and one end of the sixth resistor is connected to a point of common coupling of the first signal transmission unit and the second signal transmission unit, a point of common coupling of the sixth resistor and the tenth resistor is connected to the gate of the second field-effect transistor, and another end of the sixth resistor is grounded (figs. 1-4). Claim 20, the combined Yuan, Luo, Park, Choi and Zhu inherently discloses the anti-tamper circuit is integrated into a HUB board; the LED display screen has a plurality of HUB boards, and each of the HUB boards corresponds to a plurality of LED modules; and any one of the HUB boards transmits the tampering signal or the non-tampering signal to adjacent HUB boards through the first signal transmission unit or the second signal transmission unit of the anti-tamper circuit to the second connection port, so as to cause the external playback server to switch between normal and stopped working states. 6. Applicant's arguments filed 7/8/2025 have been fully considered but they are not persuasive. Applicant argues Luo fails to disclose "the triggering signals emitted by the LED modules of any LED box in the LED boxes" and "determining whether all of the triggering signals emitted by the LED modules of any LED box in the LED boxes are tampering signals". The examiner respectfully disagrees. Luo discloses determining a triggering signal emitted by a display module. Although, Luo discloses determining the triggering signal emitted by a display module. However, it would have been to one of ordinary skill in the art to use Luo’s determining means to determine all triggering signals emitted by a plurality of display modules because the plurality of display modules could be considered as a signal display module. Therefore, it is clear that the combination of Yuan and Luo teaches the claimed limitations as argued by the applicant. 7. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. 8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DENNIS CHOW whose telephone number is (571)272-7767. The examiner can normally be reached Monday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached on (571) 272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DOON Y CHOW/Primary Examiner, Art Unit 2627
Read full office action

Prosecution Timeline

Sep 13, 2023
Application Filed
Apr 10, 2025
Non-Final Rejection mailed — §103
Jul 08, 2025
Response Filed
Oct 06, 2025
Final Rejection mailed — §103
Dec 03, 2025
Response after Non-Final Action
May 01, 2026
Response after Non-Final Action

Precedent Cases

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Patent 12567373
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2y 2m to grant Granted Mar 03, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
26%
Grant Probability
51%
With Interview (+24.3%)
4y 10m (~2y 1m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 196 resolved cases by this examiner. Grant probability derived from career allowance rate.

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