DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/3/2023 is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-6, 9-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takeda et al (US 6,081,426 hereinafter Takeda).
Regarding Claim 1, Takeda discloses in Fig 7: A semiconductor device comprising:
a wiring substrate (12) including a first main surface and a second main surface opposite to the first main surface, the wiring substrate including an opening (See Fig 7) that penetrates completely through the wiring substrate from the first main surface to the second main surface, the opening having an inner side surface that surrounds the opening;
a metal substrate (30) fixed to the wiring substrate and covering the opening from a second main surface side (See Fig 7);
a semiconductor chip (34) fixed to a main surface of the metal substrate on a wiring substrate side, within the opening such that the inner side surface of the opening laterally surrounds the semiconductor chip (See Fig 7);
a resin (in 16: See Fig 11:73) covering the semiconductor chip from a first main surface side of the wiring substrate (12) and extending into the opening, the resin having a thermal expansion coefficient different from a thermal expansion coefficient of the wiring substrate (12); and
an adhesive (54) disposed, in a peripheral region of the opening (16) between the inner side surface of the opening, the main surface of the metal substrate, and the resin, wherein the adhesive contains a metal paste, and
wherein the adhesive is disposed on the main surface of the metal substrate (30: Fig 8) so that a thickness of the adhesive increases monotonically from a center side of the opening toward the inner side surface of the opening (See Fig 8) (Col 7 lines 25-67).
Regarding Claim 2, Takeda discloses in Fig 7: The semiconductor device according to claim 1, wherein, at the inner side surface of the opening (16).
Takeda specifically does not disclose: a dimension of the adhesive measured in a thickness direction of the wiring substrate is one-half or more of a thickness of the wiring substrate.
However, the Applicant has not disclosed that having the adhesive thickness in a specific range, solves any stated problem or is for any particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without the specific claimed values). On the other hand, one of ordinary skilled in the art would find it obvious that the height of the adhesive affects the adhesion and sealing capability and thus the adhesive thickness would be considered a result effective variable. Accordingly, the claim is obvious without showing that the claimed range(s) achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996) (claimed ranges of a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious). Therefore, one of ordinary skill in the art at the time of the invention would recognize that it would be obvious to optimize “an adhesive thickness” as a "result effective variable”, and arrive at the recited limitation.
Regarding Claim 3, Takeda discloses in Fig 7: The semiconductor device according to claim 1, wherein a thermal expansion coefficient of the wiring substrate (epoxy based) is twice or more of a thermal expansion coefficient of the resin (See Fig 11:73). The materials disclosed by Applicant in [0027, 0029] are same as the materials disclosed by Takeda in Figs 7 and 11.
Regarding Claim 4, Takeda discloses in Fig 7: The semiconductor device according to claim 1, wherein a straight line connecting (i) an end point of the
Adhesive (54) at the inner side surface of the opening on the first main surface side and (ii) an end point of the adhesive on the main surface of the metal substrate (30) at the center side of the opening forms an angle of 45 degrees or less with respect to the main surface of the metal substrate (See Fig 8).
Regarding Claim 5, Takeda discloses in Fig 7: The semiconductor device according to claim 1, further comprising a metal film provided on the main surface of the metal substrate, the metal film being formed of a metal material containing at least one of gold, silver, copper, iron, zinc, and tin (Col 7lines 25-30).
Regarding Claim 6, Takeda discloses in Fig 7: The semiconductor device according to claim 1, further comprising a second adhesive (36) different from the adhesive, the second adhesive being disposed inside the opening on the main surface of the metal substrate (30) on the wiring substrate side, wherein the adhesive and the second adhesive are spaced apart from each other on the main surface of the metal substrate (See Fig 7).
Regarding Claim 9, Takeda discloses in Fig 7: The semiconductor device according to claim 1, wherein the wiring substrate (12) contains at least one of an epoxy-based material, a fluorine-based material, a polyphenylene oxide-based material, and a phenol-based material, and the resin contains an epoxy-based material or a silicon-based material (Col 4 lines 60-67).
Regarding Claim 10, Takeda discloses in Fig 7: The semiconductor device according to claim 6, wherein a highest point of an exposed upper surface of the adhesive (54) at the inner side surface of the opening is located higher, in the thickness direction of the wiring substrate (12), than a highest point of an exposed upper surface of the second adhesive (36) at an edge portion of the semiconductor chip (See Fig 7 and 8).
Regarding Claim 11, Takeda discloses in Fig 7: The semiconductor device according to claim 6, wherein the adhesive (54) and the second adhesive (36) are separated from each other, and a portion of the resin (16) is interposed between the adhesive and the second adhesive in a region between the semiconductor chip (34) and the inner side surface of the opening.
Regarding Claim 12, Takeda discloses in Fig 7: The semiconductor device according to claim 1, wherein the adhesive (54) extends continuously along an entire perimeter of the inner side surface of the opening to form an annular fillet between the inner side surface, the main surface of the metal substrate (30), and the resin (Col 7 lines 50-67).
Claim(s) 7 is rejected under 35 U.S.C. 103 as being unpatentable over Takeda et al (US 6,081,426 hereinafter Takeda) in view of Cheng et al (US 2015/0235990 A1 hereinafter Cheng)
Regarding Claim 7, Takeda discloses in Fig 7: The semiconductor device according to claim 6.
Takeda does not disclose: wherein the adhesive and the second adhesive are formed of a same base resin material.
However, Cheng in a similar device teaches in [0026] wherein the adhesive and the second adhesive are formed of a same base resin material.
References Takeda and Cheng are analogous art because they both are directed to packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Takeda with the specified features of Cheng because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Takeda and Cheng so that the adhesive and the second adhesive are formed of a same base resin material as taught by Cheng in Takeda’s device since, resins are commonly used encapsulating and underfill materials in semiconductor arts.
Claim(s) 8 is rejected under 35 U.S.C. 103 as being unpatentable over Takeda et al (US 6,081,426 hereinafter Takeda) in view of Nakamura et al (US 2014/000 1648 A1 hereinafter Nakamura)
Regarding Claim 8, Takeda disclose: The semiconductor device according to claim 6. Takeda discloses that adhesive (54) includes gold (Col 7 l;ines 30-40).
Takeda does not disclose: wherein the second adhesive includes a metal paste containing at least one of gold, silver, copper, nickel, and aluminum.
However, Nakamura in a similar device teaches in [0039] wherein the second adhesive includes a metal paste containing at least one of gold, silver, copper, nickel, and aluminum.
References Takeda and Nakamura are analogous art because they both are directed to packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify device of Takeda with the specified features of Nakamura because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to combine teachings of Takeda and Nakamura so that wherein the second adhesive includes a metal paste containing at least one of gold, silver, copper, nickel, and aluminum as taught by Nakamura in Takeda’s device since, underfill materials with metal paste aid in thermal transfer in semiconductor arts.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NISHATH YASMEEN whose telephone number is (571)270-7564. The examiner can normally be reached Mon-Fri 9AM-6PM.
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/NISHATH YASMEEN/Primary Examiner, Art Unit 2811
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