Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 6-7, 19 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In claims 6-7 page 22 and claim 19 page 24, it is undisclosed as to what “third marking region” and “fourth marking region” refers to in the specification.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5, 9 are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1) in view of Fang et al. (US 20210327819 A1).
Regarding claim 1, Kang discloses a semiconductor package comprising (100A):
a first wiring structure (140) extending in a first direction and a second crossing the first direction (paragraph 25, Fig. 1);
a first semiconductor chip (120) stacked on the first wiring structure (140) in a third direction different from the first direction and the second direction (paragraph 24);
a second wiring structure (150) on the first semiconductor chip, the second wiring structure comprising an insulating layer (151) and a first metal layer (152) on the insulating layer (paragraph 31);
the marking plate comprising a first marking region (LA2) and a second marking region (LA1) different from the first marking region (Fig. 3),
a shape of an uneven structure in the first marking region and a shape of an uneven structure in the second marking region are different from each other (paragraph 39, Fig. 1)
a shape of the first marking region (LA2) and a shape of the first metal layer corresponding to the second marking region (LA1) are different from each other (paragraph 37, marking patterns (MP) are disposed on the insulating layer (151) (paragraph 35).
However, Kang does not disclose an alignment mark on the first metal layer.
On the other hand, Fang et al. disclose a semiconductor package comprising: an alignment mark (150) disposed on the first metal layer (140) (paragraph 35, Fig. 4). Kang et al. and Fang et al. are considered to be analogous to the claimed invention, because they are in the same field of endeavor wherein both are related to semiconductor packages.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang et al. in view of Fang et al. such that the first metal layer contains the marking regions and marking pattern. Doing so would enable better traceability and readability of unique IDs and other indicators.
Regarding claim 5, Kang discloses the first metal layer is not in the second marking region (LA1).
Regarding claim 9, Kang discloses an area of the first marking region (LA2) is larger than an area of the second marking region (LA1) in the first direction and the second direction (Fig. 3).
Claims 2, 6, and 8, are rejected under 35 U.S.C. 103 as being unpatentable over Kang et al. (US 20220165634 A1) and Fang et al. (US 20210327819 A1) as applied to claim 1 above, in further view of Han et al. (US 20200111742 A1).
Regarding claim 2, Kang et al. and Fang et al. are discussed above. Kang further discloses a first marking region (LA2) in the marking plate and a second marking region (LA1) (Fig. 3)
However, neither Kang et al. nor Fang et al. disclose a surface roughness of the first marking region included in the marking plate is greater than a surface roughness of the second marking region.
On the other hand, Han et al. disclose a surface roughness of the first marking region (M, Braille-type marking; shows surface roughness is greater, paragraph 63, Fig. 11) included in the marking plate is greater than a surface roughness of the second marking region (CP, paragraph 62, Fig. 9).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang according to Han et al. such that the surface roughness of the first marking region is greater than a surface roughness of the second marking region. Doing so would provide identification information by irradiating light to the rough surfaces and may be confirmed with the naked eyes.
Regarding claim 6, as best understood, Kang discloses a second wiring structure (150) above a semiconductor chip (120).
However, neither Kang et al. nor Fang et al. disclose the second wiring structure further comprises a second metal layer in the insulating layer, wherein the second metal layer comprises a third metal pattern below the first marking region and a fourth metal pattern below the second marking region in the third direction, and wherein a third convex portion is on an upper surface of the insulating layer, which corresponds to the third metal pattern.
However, Han et al. disclose the second wiring structure further comprises a second metal layer in the insulating layer (132), wherein the second metal layer comprises a third metal pattern (CP) below the first marking region (M), and wherein a third convex portion is on an upper surface of the insulating layer (132) (paragraph 113), which corresponds to the third metal pattern (Fig. 3).
None of the references above disclose a fourth metal pattern below the second marking region in the third direction. However, Han et al. teaches at least two metal patterns below the first marking region. It would have been obvious to create multiple metal patterns under the second marking region because duplication is within the routine skill level of one in the art. In re Harza, 274 F.2d 669 USPQ 378 (CCPA 1960).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang according to Han et al. such that the metal layer comprises of patterns in the first and second marking regions. Doing so would provide identification information by irradiating light to the rough surfaces and may be confirmed with the naked eyes.
Regarding claim 8, Kang discloses the second metal layer (instead it is an insulating layer 151, Fig. 1) is not in the second marking region (LA1) (paragraph 37).
Claims 3-4, 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Kang et al. (US 20220165634 A1) and Fang et al. (US 20210327819 A1) as applied to claims 1, 6 above, in further view of Han et al. (US 20200111742 A1) and Kumagai (US 20150108611 A1).
Regarding claim 3, Kang et al. and Fang et al. are discussed above. Kang discloses a first marking region (LA2) and a second marking region (LA1).
Neither Kang et al. nor Fang et al. disclose a first metal pattern below the first marking region and a second metal pattern below the second marking region in the third direction.
However, Kumagai et al. disclose a first metal pattern (M5) below the first marking region (3) and a second metal pattern below the second marking region (9) in the third direction. Duplication of parts is within the routine skill level of one in the art. In re Harza, 274 F.2d 669 USPQ 378 (CCPA 1960).
Neither Kang et al. nor Fang et al. disclose a first convex portion is on an upper surface of the marking plate corresponding to the first metal pattern, and wherein a second convex portion is on an upper surface of the marking plate corresponding to the second metal pattern.
However, Han et al. disclose a convex portion (CP, Fig. 9) on an upper surface (132) of the marking area. Duplication of parts is within the routine skill level of one in the art. In this case, one could obviously duplicate the convex portion in Han et al. to provide a second convex portion. In re Harza, 274 F.2d 669 USPQ 378 (CCPA 1960).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang according to the teachings of Kumagai et al. and Han et al. such that the metal layers are included in the convex portion of the marking patterns, and to have a second convex portion on the supper surface of the marking plate corresponding to the second metal pattern. Doing so would increase contrast to provide better identification and laser etching.
Regarding claim 4, Kang discloses a length of the second pattern (LA1) is longer than a length of the first pattern (LA2) in the first direction (Fig. 3).
However, Kang does not disclose metal patterns.
On the other hand, Fang et al. disclose an alignment mark (150) disposed on the first metal layer (140) (paragraph 35, Fig. 4).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang et al., Fang et al, Han et al. and Kumagai et al. with the additional teachings of Fang et al. such that the first metal layer contains the marking regions and marking pattern. Doing so would enable better traceability and readability of unique IDs and other indicators.
Regarding claim 7, as best understood, neither Kang et al. nor Fang et al. disclose a length of the fourth metal pattern is longer than a length of the third metal pattern in the first direction.
However, Kumagai et al. disclose the length of the metal pattern (3) is longer than a length of the metal pattern (9) in the first direction (Fig. 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang and Fang further in view of Han et al. with Kumagai et al. such that the length of the fourth metal pattern is longer than the third metal pattern in the first direction. Doing so would enable contrast and visual identification of the alignment marks and regions.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1) and Fang et al. (US 20210327819 A1) as applied to claim 1 above, in further view of Lee et al. (US 11417631 B2).
Regarding claim 10, none of the prior references disclose a third wiring structure and a second semiconductor chip stacked on the second wiring structure in the third direction.
However, Lee et al. disclose a PCB (210, third wiring structure) and a semiconductor chip (220A) disposed on the wiring board (210) (Paragraph 109-110, Fig. 15) stacked on the second wiring structure (132, Fig. 15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references according to Lee et al. such that the third wiring structure and second semiconductor chip are stacked on a second wiring structure in the third direction. Doing so would improve signal and power characteristics.
Claims 11-12, 14, 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1) in view of Lee et al. (US 11417631 B2), Bae et al. (US 20200105679 A1), and Han et al. (US 20200111742 A1).
Regarding claim 11, Kang discloses a semiconductor package comprising:
a first wiring structure (140) extending in a first direction and a second crossing the first direction (paragraph 25, Fig. 1);
a first semiconductor chip (120) stacked on the first wiring structure (140) in a third direction perpendicular to the first direction and the second direction (paragraph 24);
and a second marking plate (LA2) on the second dummy metal pattern (MP), the second marking plate extending along the surface of the second dummy metal pattern and the surface of the insulating layer (151) (Fig. 3)
However, Kang does not disclose a second wiring structure on the first semiconductor chip, the second wiring structure comprising an insulating layer.
Lee et al. disclose a second wiring structure (140) on the first semiconductor chip (120), the second wiring structure comprising an insulating layer (111a) (Fig. 15)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination as discussed above such that the wiring structure is on top of the first semiconductor chip. Doing so would allow for smaller form factor of the integrated circuit.
None of the prior references disclose a first dummy metal pattern, and a second dummy metal pattern longer than the first dummy metal pattern in the first direction;
a first marking plate on the first dummy metal pattern, the first marking plate extending along a surface of the first dummy metal pattern and a surface of the insulating layer;
and a second marking plate on the second dummy metal pattern, the second marking plate extending along the surface of the second dummy metal pattern and the surface of the insulating layer.
However, Bae et al. disclose a first dummy metal pattern (152M), and a second dummy metal pattern longer than the first dummy metal pattern in the first direction (Fig. 12); a first marking plate (MP) on the first dummy metal pattern (152M) (Fig. 11), the first marking plate extending along a surface of the first dummy metal pattern and a surface of the insulating layer (132, paragraph 70, Fig. 9).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination as discussed above such that the dummy metal patterns are on the metal plates and oriented in such a fashion. Doing so would improve identification of the device to the naked eyes.
None of the prior references disclose a surface roughness of the first marking region included in the marking plate is greater than a surface roughness of the second marking region.
On the other hand, Han et al. disclose a carved portion CP in the insulating layer (paragraph 62, Fig. 9) and Braille-type mark (M) that maybe be provided as a plurality of carved portions (paragraph 63, Fig. 11)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination as discussed above according to Han et al. such that the surface roughness of the first marking region is greater than a surface roughness of the second marking region. Doing so would provide identification information by irradiating light to the rough surfaces and may be confirmed with the naked eyes.
Regarding claim 12, none of the prior references disclose the second wiring structure further comprises a third dummy metal pattern and a fourth dummy metal pattern below the first dummy metal pattern and the second dummy metal pattern, respectively.
However, Lee et al. disclose a second connection structure (160, Fig 14) and dummy patterns formed by vias (113a, Fig. 10B).
Bae et al. also discloses metal patterns (152M, Fig. 12) disposed on the marking pattern (MP, Fig. 11).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination as discussed above such that the wiring structure contains dummy patterns below the first and second dummy patterns. Doing so would enhance contrast for identification and alignment of the semiconductor chip to other components.
Regarding claim 14, Kang does not disclose the first marking plate and the second marking plate comprise an insulating material.
However, Han et al. disclose marking (M) includes a carved portion (CP) in the insulating layer (132) (paragraph 62).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang according to the teachings of Han et al. such that the marking plate comprise of an insulating material. Doing so would allow for subsequent patterning doing lithography.
Regarding claim 16, Kang does not disclose a recess exposing at least a portion of the insulating layer is formed in the second wiring structure, and wherein the first marking plate and the second marking plate are included in the recess, but Kang does mention a first marking plate (LM2) and second marking plate (LM1).
Han et al. disclose marking (M) includes a carved portion (CP) in the insulating layer (132) (paragraph 62).
Lee et al. disclose a second connection structure (160, Fig 14).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang according to the teachings of Han et al. and Lee et al. such that a recess exposing at least a portion of the insulating layer is formed in the second wiring structure, and wherein the first marking plate and the second marking plate are included in the recess. Doing so would allow light to irradiate effectively to provide visual identification confirmation to the naked eye.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1), Lee et al. (US 11417631 B2), Bae et al. (US 20200105679 A1), and Han et al. (US 20200111742 A1) as applied to claim 11 above, in further view of Koketsu et al. (US 20090206411 A1).
Regarding claim 13, Kang discloses a first marking plate (LA2) and the second marking plate (LA1), but does not disclose it comprise a metal material.
However, Koketsu et al. disclose mark formed by a metal film (paragraph 5).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references in view of Koketsu et al. such that the marking plates are made of metal. Doing so would provide robust identification and durability.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1), Lee et al. (US 11417631 B2), Bae et al. (US 20200105679 A1), and Han et al. (US 20200111742 A1) as applied to claim 11 above, in further view of Park et al. (US 20130175701 A1).
Regarding claim 15, Kang discloses a first marking region (LA2) and a second marking region (LA1), but does not disclose the surface roughness of the first marking plate (LA2) is greater than or equal to five times the surface roughness of the second marking plate (LA1).
However, Park discloses a rough area (160) having a roughness greater than 1.2 micrometers, and a smooth area (158) having a roughness of less than 1 micrometer.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the prior references in view of Park et al. such that roughness of the first marking region is greater than or equal to five times the roughness of the second marking region. Doing so would increase visual and tactile contrast for identification markings.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1) in view of Fang et al. (US 20210327819 A1) and Lee et al. (US 11417631 B2).
Regarding claim 17, Kang discloses the first semiconductor package comprises: a first wiring structure (140) extending in a first direction and a second direction crossing the first direction (paragraph 25, Fig. 1);
a first semiconductor chip (120) stacked on the first wiring structure (140) in a third direction different from the first direction and the second direction (paragraph 24);
a second wiring structure (150) on the first semiconductor chip, the second wiring structure comprising an insulating layer (151) and a first metal layer (152) on the insulating layer (paragraph 31);
the marking plate comprising a first marking region (LA2) and a second marking region (LA1) different from the first marking region (Fig. 3), an uneven structure of the marking plate (MP) in the first marking region (LA2) and an uneven structure of the marking plate in the second marking region (LA1) are different from each other (paragraph 39, Fig. 1).
However, Kang does not disclose a marking plate on the first metal layer; a shape of the first metal layer corresponding to the first marking region and a shape of the first metal layer corresponding to the second marking region are different from each other, but does disclose the marking patterns (MP) are disposed on the insulating layer (151) (paragraph 35), and the first marking region (LA2) may have a shape that is different from the second marking region (LA1) (paragraph 37).
On the other hand, Fang et al. disclose an alignment mark (150) disposed on the first metal layer (140) (paragraph 35, Fig. 4).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang et al. in view of Fang et al. such that the first metal layer contains the marking regions and marking pattern. Doing so would enable better traceability and readability of unique IDs and other indicators.
However, Kang does not disclose a first semiconductor package and a second semiconductor package on the first semiconductor package.
Lee et al. discloses a first semiconductor package (P1) and a second semiconductor package (P2) on the first semiconductor package (paragraph 57, Fig 9)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang in view of Lee et al. such that the two semiconductor packages are stacked on top of one another. Doing so would save space on PCBs and improving performance.
However, Kang does not disclose a second metal layer in the insulating layer.
On the other hand, Lee et al. disclose a wiring board (210) may include an insulating layer and a conductive wiring layer formed in the insulating layer (paragraph 110).
Kang does not disclose a shape of the first metal layer and a shape of the second metal layer corresponding to the first marking region is different from a shape of the first metal layer and a shape of the second metal layer corresponding to the second marking region, but does disclose a first marking region (LA2) and second marking region (LA1) are of different shapes (Fig. 3).
On the other hand, Fang et al. disclose an alignment mark (150) disposed on the first metal layer (140) (paragraph 35, Fig. 4). Lee et al. disclose a wiring board (210) may include an insulating layer and a conductive wiring layer formed in the insulating layer (i.e. second metal layer, paragraph 110)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination as discussed above to have the first and second metal layers correspond to different marking regions of different sizes. Doing so would contrast the identification marks for easier visual identification.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1), Fang et al. (US 20210327819 A1) and Lee et al. (US 11417631 B2) as applied to claim 17 above, in further view of Lim (KR 20160001169 A)
Regarding claim 18, Kang does not disclose the first metal layer comprises a first metal pattern and a second metal pattern respectively corresponding to the first marking region (LA2) and the second marking region (LA1).
On the other hand, Fang et al. disclose an alignment mark (150) disposed on the first metal layer (140) (paragraph 35, Fig. 4). Lee et al. disclose a wiring board (210) may include an insulating layer and a conductive wiring layer formed in the insulating layer (i.e. second metal layer, paragraph 110)
Kang does not disclose a surface of the marking plate in the first marking region has a first height difference, and a surface of the marking plate in the second marking region has a second height difference smaller than the first height difference.
However, Lim discloses surface roughness of the marking layer (104) may be R1, and product information depth has a maximum marking depth (d1) from the surface (111) of the marking layer (paragraph 53, Fig. 8)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang according to Lim such that the height difference between the surface of the first and second marking regions are different. Doing so would provide identification information by irradiating light to the rough surfaces and may be confirmed with the naked eyes.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1), Fang et al. (US 20210327819 A1) and Lee et al. (US 11417631 B2) as applied to claim 17 above, in further view of Kumagai (US 20150108611 A1).
Regarding claim 19, as best understood, Kang discloses a first marking region (LA2) and second marking region (LA1), but does not disclose a second metal layer comprises a third metal pattern and a fourth metal pattern respectively corresponding to the first marking region (LA2) and the second marking region (LA1).
However, Kumagai et al. disclose the second metal layer (La) comprises a metal pattern (“third metal pattern”, 9) and a metal pattern (“fourth metal pattern”, 3) respectively corresponding to the first marking region and the second marking region (Fig. 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang according to Han et al. and Kumagai et al. such that the metal layer comprises of patterns in the first and second marking regions. Doing so would provide identification information by irradiating light to the rough surfaces and may be confirmed with the naked eyes.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20220165634 A1), Fang et al. (US 20210327819 A1) and Lee et al. (US 11417631 B2) as applied to claim 17 above, in further view of Han et al. (US 20200111742 A1).
Regarding claim 20, Kang discloses a first marking region (LA2) in the marking plate and a second marking region (LA1) (Fig. 3)
However, Kang does not disclose a surface roughness of the marking plate in the first marking region is greater than a surface roughness of the marking plate in the second marking region.
On the other hand, Han et al. disclose a carved portion CP in the insulating layer (paragraph 62, Fig. 9) and Braille-type mark (M) that maybe be provided as a plurality of carved portions (paragraph 63, Fig. 11)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kang according to Han et al. such that the surface roughness of the first marking region is greater than a surface roughness of the second marking region. Doing so would provide identification information by irradiating light to the rough surfaces and may be confirmed with the naked eyes.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVE Q PHAN whose telephone number is (571)272-1227. The examiner can normally be reached Monday - Friday 8am - 5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at (571) 272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/STEVE PHAN/Examiner, Art Unit 2817
/MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817