Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 21 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Liaw (US 20130154027) in view of Ohtsuki et al. (US 7,248,5230)
Regarding claims 21 and 22, Liaw (e.g. fig. 1 and 2) teaches a device comprising:
a plurality of bit cells including a first bit cell, a second bit cell, a third bit cell and a fourth bit cell, arranged in a 2x2 matrix (see fig. 2);
in which the first bit cell and the third bit cell are directly adjacent to the second bit cell and the fourth bit cell [i.e. fig. 2 depicts bit cells positioned directly adjacent to one another in both row and column directions];
the first bit cell and the second bit cell overlap in a first direction and the third bit cell and the fourth bit cell overlap in the first direction;
a first source/drain pattern and second source/drain pattern;
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wherein each of the plurality of bit cells (e.g. fig 1) comprises a first access transistor and a second access transistor [PG1/2], a first pull-up transistor and a second pull-up transistor [PU1/2], and a first pull-down transistor and a second pull-down transistor [PD 1/2],wherein the first bit cell and the second bit cell have structural contours that are joined together in a coupling arrangement [i.e. the diffusion regions are continuous across adjacent cells, the structural contours of the bit cells are physically joined together at these shared regions], and wherein the first bit cell and the second bit cell have multiple transistors arranged to store data [fig. 1 is a conventional SRAM cell comprising multiple transistors {8}, including access transistors and cross-coupled inverters transistors which inherently store data].
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Liaw does not explicitly disclose that the first source/drain pattern is a common source/drain of the first and second bit cells provided over an intersection of the first bit cell and the second bit cell, or that a corresponding second source/drain pattern is similarly provided with respect to the third and fourth bit cells.
Nevertheless, Ohtsuki teaches, in the SRAM art, arranging adjacent transistors such that the transistors share diffusion layer. See Ohtsuki, col. 4/ll. 8-28, and the corresponding layout illustration. Ohtsuki therefore teaches a known semiconductor-layout technique in which source/drain regions of adjacent transistors are implemented using a shared diffusion region.
It would have been obvious to one of ordinary skill in the art at the time of the invention to employ the shared-diffusion layout technique taught by Ohtsuki in implementing electrically compatible source/drain terminals of adjacent SRAM bit cells of Liaw. Such a modification would have predictably reduced semiconductor layout area and increased memory cell density by avoiding unnecessary separation of source/drain regions that may be implemented as a common diffusion region. When this known shared-diffusion technique is applied to adjacent transistors is applied to adjacent transistors positioned at the interface between first and second bit cells of Liaw, the resulting shared diffusion region constitutes a source/drain common to first and second bit cells and is provided at the intersection/interface of the first and second bit cells as claimed. The same reasoning applies to the third and fourth bit cells. Thus, the combination of Liaw and Ohtsuki renders obvious the subject matter of claims 21 and 22.
[see MPEP 2143; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007) [MPEP 2143]
Allowable Subject Matter
Original claims 1-20 are allowed.
Response to Arguments
Applicant's arguments filed 07/21/2026 on have been fully considered but they are not persuasive.
Applicant argues that Liaw does not disclose a source/drain shared by different bit cells. The Examiner agrees that Liaw does not expressly disclose this feature. However, the rejection does not rely on Liaw alone. Liaw teaches adjacent SRAM bit cells, while Ohtsuki teaches the known layout technique of arranging adjacent transistors so that they share a diffusion layer.
Applicant argues that Ohtsuki shares diffusion only between transistors within one dummy cell. This argument is not persuasive because the rejection is based on obviousness, not anticipation. Ohtsuki is relied on for the shared-diffusion layout technique, while Liaw provides the adjacent SRAM bit cells.
It would have been obvious to apply Ohtsuki’s shared-diffusion technique to suitable adjacent transistors of Liaw in order to reduce layout area and increase memory density. The resulting shared diffusion would form a common source/drain at the interface of adjacent bit cells, as claimed.
Applicant also argues that the claimed arrangement reduces resistance through the ground connection. However, claims 21 and 22 do not require the specific extended-via structure or any particular reduction in resistance. Therefore, this argument is not commensurate with the scope of the claims.
Applicant further argues that the modification would change Liaw’s principle of operation. The Examiner is not persuaded because the proposed modification concerns the physical layout of the source/drain regions and does not change the basic data-storge operation of Liaw’s SRAM cells.
Accordingly, the rejection of claims 21 and 22 under 35 U.S.C. 103 over Liaw in view of Ohtsuki is maintained.
Remarks
Regarding the May 26, 2026 interview, Applicant’s remarks are acknowledged. The proposed amendment and cited prior art were discussed. As explained during the interview, particularly in the reissue context, no agreement as to patentability was reached, and the amended claims remain subjected to further consideration.
The present action is made final because the rejection is necessitated by Applicant’s amendment. The same prior art combination is maintained with the rejection modified only as necessary to address the amended claim language.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceeding in which Patent No. 11/127,730 is or was involved. These proceedings would include any trial before the Patent Trial and Appeal Board, interferences, reissues, reexaminations, supplemental examinations, and litigation.
Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is material to patentability of the claims under consideration in this reissue application.
These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04.
Applicant is notified that any subsequent amendment to the specification and/or claims must comply with 37 CFR 1.173(b). In addition, for reissue applications filed before September 16, 2012, when any substantive amendment is filed in the reissue application, which amendment otherwise places the reissue application in condition for allowance, a supplemental oath/declaration will be required. See MPEP § 1414.01.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEONARDO ANDUJAR whose telephone number is (571)272-1912. The examiner can normally be reached Monday to Thursday 10 AM to 8 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Patricia L Engle can be reached at (571)272-6660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Leonardo Andujar/
Primary Examiner
Art Unit 3991 CRU
Conferees:
/Lee Sanderson/
Primary Examiner
Art Unit 3991 CRU
/Patricia L Engle/SPRS, Art Unit 3991
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