CTNF 18/370,621 CTNF 87317 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Information Disclosure Statement The information disclosure statement(s) (IDS) filed on 10/15/2024 and 04/08/2024 has/have been considered by the Examiner and made of record in the application file. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claims 16-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. As to claim 16, it is unclear what is meant by “causing execution of an application on one or more of server or a network interface device.” The examiner is interpreting this as executing an application on a network interface device. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1 and 16 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Aloni (US 8521912 B2) . As to claim 1, Aloni teaches an apparatus comprising: a network interface device comprising: a network interface (see Fig. 1 and associated text, disclosing a NIC with a network interface (see bottom of figure) and an interface to a host), a direct memory access (DMA) circuitry (see figs 1, and 4A, disclosing a processor and/or a DMA engine), a host interface (see Fig. 1 and associated text, disclosing a NIC with a network interface (see bottom of figure) and an interface to a host), memory (see fig. 1 disclosing a NIC memory), one or more processors (see fig. 1) , and circuitry to: based on a configuration of operation specifying a standalone operation, cause the network interface device to operate in standalone to execute one or more applications and based on a configuration of operation specifying a companion operation (see col. 5 and 6, disclosing that the NIC can run code; also see fig. 4 and associated text disclosing that a DMA engine can be code; the examiner is interpreting that the code is executed to function), cause the network interface device to operate in companion to provide at least one host system with access to one or more hardware resources accessible by the network interface device (see col. 3, lines 10-15, disclosing the NIC providing the host access to the network; the examiner is interpreting that the network has some hardware resource). As to claim 16, Aloni teaches a method comprising: an orchestrator performing: causing execution of an application on one or more of server or a network interface device (see col. 5 and 6, disclosing that the NIC can run code; also see fig. 4 and associated text disclosing that a DMA engine can be code; the examiner is interpreting that the code is executed to function), wherein the network interface device comprises a network interface (see Fig. 1 and associated text, disclosing a NIC with a network interface (see bottom of figure) and an interface to a host), a direct memory access (DMA) circuitry (see figs 1, and 4A, disclosing a processor and/or a DMA engine), and a host interface (see Fig. 1 and associated text, disclosing a NIC with a network interface (see bottom of figure) and an interface to a host) and wherein the network interface device operates in a standalone operation to execute one or more applications (see col. 5 and 6, disclosing that the NIC can run code; also see fig. 4 and associated text disclosing that a DMA engine can be code; the examiner is interpreting that the code is executed to function) or operate as a companion to provide at least one host system with access to one or more hardware resources accessible by the network interface device . Allowable Subject Matter 12-151-07 AIA 07-97 12-51-07 Claim s 10-15 are allowed. 12-151-08 AIA 07-43 12-51-08 Claim s 2-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 07-43-02 AIA Claim s 17-20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: As to claim 10, it contains allowable subject matter when the claim is taken as a whole. See the italicized text indicating aspects that in combination with the remainder of the claim differentiate it from prior art: 10. A non-transitory computer-readable medium comprising instructions stored thereon, that if executed by one or more processors, cause the one or more processors to: configure a network interface device to operate as standalone computing platform to execute one or more applications or operate as a companion to provide at least one host system with access to one or more hardware resources accessible by the network interface device, wherein the network interface device is to detect whether a host interface is present and based on lack of access to the host interface, operate as the standalone computing platform and the network interface device comprises a network interface, a direct memory access (DMA) circuitry, and a host interface. The prior art teaches network interface device failovers generally and NICs that have DMA circuitry, but does not teach a network interface device operating as a standalone computing platform to execute applications based on detecting a lack of access to a host interface . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON B BRYAN whose telephone number is (571)270-7091. The examiner can normally be reached Mon-Fri, 8-5 First Friday off. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ashish Thomas can be reached at 5712720631. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JASON B BRYAN/Primary Examiner, Art Unit 2114 Application/Control Number: 18/370,621 Page 2 Art Unit: 2114 Application/Control Number: 18/370,621 Page 3 Art Unit: 2114 Application/Control Number: 18/370,621 Page 4 Art Unit: 2114 Application/Control Number: 18/370,621 Page 5 Art Unit: 2114