Prosecution Insights
Last updated: May 29, 2026
Application No. 18/371,798

STORAGE ABNORMALITY DETECTION DEVICE, STORAGE ABNORMALITY DETECTION METHOD, AND COMPUTER-READABLE STORAGE MEDIUM

Non-Final OA §101§103
Filed
Sep 22, 2023
Priority
Oct 06, 2022 — JP 2022-161973
Examiner
LIN, KATHERINE Y
Art Unit
2113
Tech Center
2100 — Computer Architecture & Software
Assignee
Toyota Jidosha Kabushiki Kaisha
OA Round
2 (Non-Final)
91%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
322 granted / 353 resolved
+36.2% vs TC avg
Moderate +7% lift
Without
With
+7.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
18 currently pending
Career history
384
Total Applications
across all art units

Statute-Specific Performance

§101
19.5%
-20.5% vs TC avg
§103
49.1%
+9.1% vs TC avg
§102
18.9%
-21.1% vs TC avg
§112
4.4%
-35.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 353 resolved cases

Office Action

§101 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 4-7, 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mutnury et al. (US 20190227885 A1) in view of Ye et al. (CN 117093389 A). Mutnury discloses: 1. A storage abnormality detection device comprising: a memory having a total written amount limit; and (par 21) a storage controller that functions as a determination section; and (par 34) an error checking and correcting circuit that functions as a correction section, wherein the correction section, during a processing cycle, (par 29, 34) detects errors occurring in the memory; and (par 29, 34) corrects the detected errors, and (par 29, 34) the determination section, during the processing cycle (par 29, 34) detects errors uncorrectable by the correction section based on detection and correction performed by the correction section; (par 29, 34) However, Mutnury does not explicitly disclose, while Ye teaches: a non-volatile memory (p 18) determines whether errors uncorrectable by the correction section have been detected a predetermined number of times or more in a predetermined period; (Step S1002) determines an abnormality of the memory when determining that errors uncorrectable by the correction section have been detected the predetermined number of times or more in the predetermined period; and (Step S1002) resets the processing cycle. (p 5: restart of the server) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine correctable errors and uncorrectable errors of Mutnury with correctable errors and uncorrectable errors of Ye. One of ordinary skill in the art would have been motivated to do so in order to avoid downtime of a computer. (Ye: p 3) Modified Mutnury discloses: 2. The storage abnormality detection device of claim 1, wherein the determination section determines an abnormality of the memory in cases in which errors uncorrectable by the correction section have been detected the predetermined number of times or more in the predetermined period and also a total written amount of the memory is a predetermined upper limit value or greater. (par 21, 34) 4. The storage abnormality detection device of claim 1, wherein in cases in which the memory is utilized in a function related to vehicle travel, a function related to regulations, or a function related to security, the storage abnormality detection device further comprises a notification section configured to notify an abnormality of the memory in cases in which an abnormality of the memory has been determined by the determination section. (par 29) 5. The storage abnormality detection device of claim 1, wherein the determination section checks the total written amount of the memory prior to performing a write operation to the memory, and in cases in which the total written amount of the memory is less than a predetermined upper limit value, determines an abnormality caused by something other than the limit in cases in which errors uncorrectable by the correction section have been detected the predetermined number of times or more in the predetermined period. (par 21, 34) 9. (New) The storage abnormality detection device of claim 4, However, Mutnury does not explicitly disclose, while Ye teaches: wherein the notification section is configured to notify the abnormality of the memory to an occupant of a vehicle equipped with the memory. (p 6; p 5: SRAO) Claim(s) 6 is/are rejected as being the method implemented by the device of claim(s) 1, and is/are rejected on the same grounds. Claim(s) 7 is/are rejected as being the medium implemented by the device of claim(s) 1, and is/are rejected on the same grounds. Claim(s) 3, 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mutnury et al. (US 20190227885 A1) in view of Ye et al. (CN 117093389 A), and further in view of Dedrick (US 20190278498 A1). Modified Mutnury discloses: 3. The storage abnormality detection device of claim 1, wherein the determination section determines an abnormality of the memory in cases in which errors uncorrectable by the correction section have been detected the predetermined number of times or more in the predetermined period However, Mutnury does not explicitly disclose, while Dedrick teaches: and also a predetermined manufacturer's warranty period or predetermined manufacturer's warranty distance has been exceeded. (par 35) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine uncorrectable error of Mutnury with uncorrectable error of Dedrick. One of ordinary skill in the art would have been motivated to do so in order to resolve the issue of estimating write traffic for SSD. (Dedrick: par 6) Claim 8. The storage abnormality detection device of claim 3, However, Mutnury does not explicitly disclose, while Ye teaches: a vehicle (p 6) However, Mutnury does not explicitly disclose, while Dedrick teaches: wherein the warranty is a warranty of a device equipped with the memory. (par 35) Response to Remarks The amendments overcome the rejection under 101. Applicant has amended the claims to add aspects of non-volatile memory and warranty. Mutnury does not explicitly describe this feature. Ye, which teaches correctable errors and uncorrectable errors, discloses non-volatile memory on p 18. In addition, combination of Ye and Dedrick teach claim 8 reciting a warranty of a vehicle. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KATHERINE LIN whose telephone number is (571)431-0706. The examiner can normally be reached Monday-Friday; 8 a.m. - 5 p.m. EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo can be reached at (571) 272-3655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KATHERINE LIN/Primary Examiner, Art Unit 2113
Read full office action

Prosecution Timeline

Sep 22, 2023
Application Filed
May 08, 2025
Non-Final Rejection mailed — §101, §103
Jun 11, 2025
Applicant Interview (Telephonic)
Jun 12, 2025
Examiner Interview Summary
Jun 27, 2025
Response Filed
Oct 30, 2025
Final Rejection mailed — §101, §103
Dec 16, 2025
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12625760
System and method for machine-to-machine re-imaging
2y 7m to grant Granted May 12, 2026
Patent 12619486
Mechanism of Enabling Fault Handling with PCIe Re-timer
2y 9m to grant Granted May 05, 2026
Patent 12613772
MEMORY DEVICE AND OPERATING METHOD THEREOF
1y 6m to grant Granted Apr 28, 2026
Patent 12608292
MANAGEMENT METHOD AND APPARATUS AND ATE TEST SYSTEM
1y 6m to grant Granted Apr 21, 2026
Patent 12596953
QUANTUM ERROR CORRECTION USING NEURAL NETWORKS
2y 7m to grant Granted Apr 07, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

2-3
Expected OA Rounds
91%
Grant Probability
98%
With Interview (+7.0%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 353 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month