DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/27/25 has been entered.
1. CLAIM INTERPRETATION
35 USC ' 112 f/6th Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “always on module” in claims 1-10 and 19. The Examiner notes the “always on module” is described to be a part of the controller (see fig. 1; AON 112 and paragraphs 17-20 which describes the structure and corresponding algorithms).
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
2. REJECTIONS BASED ON PRIOR ART
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC ' 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7, 11-16, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bar (US 20180260152) in view of Segev (US 11126254).
With respect to claim 1, the Bar reference teaches a storage device to resume full performance after the storage device enters a thermal sleep state where performance on the storage device is suspended, the storage device comprising:
a module to periodically obtain temperatures of the storage device and a memory device; (e.g. temperature sensor 430; and see fig. 2a, which includes non-volatile memory 104 and RAM 116; paragraph 54, where when a triggering event for thermal throttling is detected (e.g., by a temperature sensor 430 (e.g., in the controller 102, memory 104, or other location inside or outside the storage system 100) reporting a value higher than a predefined threshold), the command arbiter 111 can use a fetch control module 410 to pause command arbitration until the temperature goes down or for a pre-defined amount of time as measured by a timer 420 in the command arbiter 111 (or by an external timer)) and
a controller (e.g. controller 102) to determine a calculated temperature from the temperatures of the storage device and the memory device, determine that the calculated temperature is above a thermal threshold, and cause the storage device to enter a thermal sleep state where power to the module is maintained (paragraph 54, where when a triggering event for thermal throttling is detected (e.g., by a temperature sensor 430 (e.g., in the controller 102, memory 104, or other location inside or outside the storage system 100) reporting a value higher than a predefined threshold), the command arbiter 111 can use a fetch control module 410 to pause command arbitration until the temperature goes down or for a pre-defined amount of time as measured by a timer 420 in the command arbiter 111 (or by an external timer); and paragraph 58, where the controller 102 sets the timer 420 for a predetermined time t.sub.3 (act 570) and enters a low power state until the timer 420 expires (act 580). After the timer 420 expires, the controller 102 determines if the temperature is still above critical (act 590). If it isn't, normal processing is resumed (act 560) and the power to a front-end module is reduced to a lowest power consumption state; (paragraph 57, where a “low power state” refers to an operating mode of one or more components [analogous to a “front-end module” as claimed] of the storage system 100 (e.g., the controller 102) in which operation(s) performed by those component(s) that generate heat are reduced or avoided. Because the controller 102 is in control of when it receives commands from the host 252 in this embodiment, the controller 102 can enter the low power state without consulting with the host 252) and the power to a back-end module and to the memory device is shut off; (paragraph 66, where storage system 100 may also turn off internal power to components such as NAND, DRAM, [i.e. the ‘memory device’ as claimed] or parts of the controller 102 [analogous to the ‘back-end module’ as claimed] to reduce power consumption and improve temperature reduction) and
wherein in the thermal sleep state the module starts a cool-off timer and after a cool-off time expires, the module causes power to at least one component on the storage device to be turned on to determine whether the temperature of the storage device is below a first thermal throttling threshold and to cause the storage device to resume normal operations. (paragraph 58, where the controller 102 sets the timer 420 for a predetermined time t.sub.3 (act 570) and enters a low power state until the timer 420 expires (act 580). After the timer 420 expires, the controller 102 determines if the temperature is still above critical (act 590). If it isn't, normal processing is resumed (act 560))
However, the Bar reference does not explicitly teach the module is an always-on (AON) module.
The Segev reference teaches it is conventional to have the module be an always-on (AON) module. (see fig. 3; and column 7, line 54 to column 8, line 7, where part of the controller, such as the controller 108 of FIG. 1, which is responsible for the fast recovery into the full power mode from a deep sleep mode is the Always-On (AON) module. When the storage device is in the deep sleep mode, the AON module is powered fully)
It would have been obvious to a person of ordinary skill in the art before the claimed invention was effectively filed to modify the Bar reference to have wherein the module be an always-on (AON) module, as taught by the Segev reference.
The suggestion/motivation for doing so would have been to allow fast recovery into the full power mode from a deep sleep mode. (Segev, column 7, line 54 to column 8, line 7)
Therefore it would have been obvious to combine the Bar and Segev references for the benefits shown above to obtain the invention as specified in the claim.
With respect to claim 2, the combination of the Bar and Segev references teaches the storage device of claim 1, wherein the AON module sends a drive-ready asynchronous event notification (AEN) message to a host device when the storage device resumes normal operations. (Bar, paragraph 57, where if the temperature of the storage system 100 is below the threshold temperature, normal processing can be resumed (act 560), with the command arbiter 111 fetching new commands from the host 252 for processing)
With respect to claim 3, the combination of the Bar and Segev references teaches the storage device of claim 1, wherein when the cool-off time expires, the AON module causes power to a sensor module to turn on to obtain the temperatures of the storage device and the memory device. (Bar, paragraph 58, where the controller 102 sets the timer 420 for a predetermined time t.sub.3 (act 570) and enters a low power state until the timer 420 expires (act 580). After the timer 420 expires, the controller 102 determines if the temperature is still above critical (act 590). If it isn't, normal processing is resumed (act 560))
With respect to claim 4, the combination of the Bar and Segev references teaches the storage device of claim 1, wherein when the cool-off time expires, if the temperature of the storage device is above the first thermal throttling threshold the AON module restarts the cool-off timer. (Bar, paragraph 58, where after the timer 420 expires, the controller 102 determines if the temperature is still above critical (act 590). If it isn't, normal processing is resumed (act 560). However, if it is, the controller 102 loops back to act 520, and the process begins again with new commands being fetched from the host 252 for a time t.sub.1 (act 520))
With respect to claim 5, the combination of the Bar and Segev references teaches the storage device of claim 1, wherein in the thermal sleep state, the AON module sets off one or more preconfigured cool-off time periods calculated based on internal characteristics of at least one of the storage device and the memory device. (paragraph 54, where when a triggering event for thermal throttling is detected (e.g., by a temperature sensor 430 (e.g., in the controller 102, memory 104, or other location inside or outside the storage system 100) reporting a value higher than a predefined threshold), the command arbiter 111 can use a fetch control module 410 to pause command arbitration until the temperature goes down or for a pre-defined amount of time as measured by a timer 420 in the command arbiter 111 (or by an external timer); and paragraph 58, where the controller 102 sets the timer 420 for a predetermined time t.sub.3 (act 570) and enters a low power state until the timer 420 expires (act 580). After the timer 420 expires, the controller 102 determines if the temperature is still above critical (act 590). If it isn't, normal processing is resumed (act 560)
With respect to claim 6, the combination of the Bar and Segev references teaches the storage device of claim 1, wherein during the thermal sleep state, the AON module causes at least one component of the storage device to return to an active power mode for a period of time, and the AON module sends a message to a host device during the period of time, updating the host device on time left before the storage device resumes normal operations. (Bar, paragraph 69, where even when the storage system 100 pauses fetching commands, the host 252 continues to store new commands in the submission queue (SQ) 310, so the storage system 100 needs to attend to those commands to prevent time-out, even if the storage system's temperature is above critical. However, if the storage system 100 can inform the host 252 that it is pausing fetching of new commands, the host 252 can slow or stop the flow of new commands into its submission queue (SQ))
With respect to claim 7, the combination of the Bar and Segev references teaches the storage device of claim 1, wherein the calculated temperature is determined to be the highest temperature obtained from the storage device and the memory device. (Bar, paragraph 54, where when a triggering event for thermal throttling is detected (e.g., by a temperature sensor 430 (e.g., in the controller 102, memory 104, or other location inside or outside the storage system 100) reporting a value higher than a predefined threshold), the command arbiter 111 can use a fetch control module 410 to pause command arbitration until the temperature goes down or for a pre-defined amount of time as measured by a timer 420 in the command arbiter 111 (or by an external timer))
Claims 11-16 are the method implementation of claims 1-7, and rejected under the same rationale as shown in the rejections above.
Claim 19 is another storage device implementation of claims 1-7, and rejected under the same rationale as shown in the rejections above.
Claims 8-10 and 17-18 are is/are rejected under 35 U.S.C. 103 as being unpatentable over Bar (US 20180260152) in view of Segev (US 11126254) as shown in the rejections above, and further view of Eemani (US 20220301598).
With respect to claim 8, combination of the Bar and Segev references does not explicitly teach the storage device of claim 1, wherein the controller sets thermal throttling thresholds including the first thermal throttling threshold, a second thermal throttling threshold, and the thermal threshold, wherein when the calculated temperature reaches the first thermal throttling threshold, performance of the storage device is reduced by a first percentage, when the calculated temperature reaches the second thermal throttling threshold, the performance of the storage device is reduced by a second percentage, and when the calculated temperature reaches the thermal threshold, the storage device is placed in the thermal sleep state.
The Eemani reference teaches it is conventional to have wherein the controller sets thermal throttling thresholds including the first thermal throttling threshold, a second thermal throttling threshold, and the thermal threshold, wherein when the calculated temperature reaches the first thermal throttling threshold, performance of the storage device is reduced by a first percentage, when the calculated temperature reaches the second thermal throttling threshold, the performance of the storage device is reduced by a second percentage, and when the calculated temperature reaches the thermal threshold, the storage device is placed in the thermal sleep state. (paragraph 38, where the thermal management thresholds can be as follows: TMT1b=65° C.; TMT1=68° C.; TMT2b=75° C.; TMT2=78° C.; TMT3b=82° C.; TMT3=85° C.; TMTSD=93° C. In other examples, these thresholds can have other suitable values (e.g., dependent on drive characteristics and application). In the above description of the thermal management sequences 202, 204, and 206, actions are taken based on increases in NAND temperature)
It would have been obvious to a person of ordinary skill in the art before the claimed invention was effectively filed to modify the combination of the Bar and Segev references to have wherein the controller sets thermal throttling thresholds including the first thermal throttling threshold, a second thermal throttling threshold, and the thermal threshold, wherein when the calculated temperature reaches the first thermal throttling threshold, performance of the storage device is reduced by a first percentage, when the calculated temperature reaches the second thermal throttling threshold, the performance of the storage device is reduced by a second percentage, and when the calculated temperature reaches the thermal threshold, the storage device is placed in the thermal sleep state, as taught by the Eemani reference.
The suggestion/motivation for doing so would have been to have thermal management involving various temperature thresholds and corresponding SSD power states. (Eemani, paragraph 34)
Therefore it would have been obvious to combine the Bar, Segev and Eemani references for the benefits shown above to obtain the invention as specified in the claim.
With respect to claim 9, the combination of the Bar, Segev and Eemani references teaches the storage device of claim 8 wherein when the calculated temperature reaches the second thermal throttling threshold, the controller sends a warning AEN message to a host device, notifying the host device of the thermal state of the storage device. (Bar, paragraph 70, where there are host-side constraints and may be mapped to host temperature thresholds or to warning and critical temperatures advertised by the storage system 100)
With respect to claim 10, the combination of the Bar, Segev, and Eemani references teaches the storage device of claim 8 wherein when the calculated temperature reaches the thermal threshold, the controller sends a critical AEN message to a host device, notifying the host device of the thermal state of the storage device. (Bar, paragraph 70, where there are host-side constraints and may be mapped to host temperature thresholds or to warning and critical temperatures advertised by the storage system 100)
Claims 17-18 are the method implementation of claims 8-10, and rejected under the same rationale as shown in the rejections above.
3. ARGUMENTS CONCERNING PRIOR ART REJECTIONS
Rejections - USC 102/103
Applicant's arguments (see pages 9-12 of the remarks) and amendments filed 10/27/25 have been fully considered but they are not persuasive. The Applicant argues (see bottom of page 10 to top of page 11) that the Bar reference does not teach a controller to "determine that the calculated temperature is above a thermal threshold, and cause the storage device to enter a thermal sleep state where power to the AON module is maintained and the power to a front-end module is reduced to a lowest power consumption state and the power to a back-end module and to the memory device is shut off". The Examiner respectfully disagrees. The Bar reference teaches a controller (e.g. controller 102 as shown in fig. 2a) and further teaches (paragraph 54) that when a triggering event for thermal throttling is detected (e.g., by a temperature sensor 430 (e.g., in the controller 102, memory 104, or other location inside or outside the storage system 100)) reporting a value higher than a predefined threshold), the command arbiter 111 can use a fetch control module 410 to pause command arbitration until the temperature goes down or for a pre-defined amount of time as measured by a timer 420 in the command arbiter 111 (or by an external timer). Bar also teaches (paragraph 58) that the controller 102 sets the timer 420 for a predetermined time t.sub.3 (act 570) and enters a low power state until the timer 420 expires (act 580). Lastly, Bar teaches (paragraph 57) that a “low power state” refers to an operating mode of one or more components [analogous to a “front-end module” as claimed] of the storage system 100 (e.g., the controller 102) in which operation(s) performed by those component(s) that generate heat are reduced or avoided; and (paragraph 66) that the storage system 100 may also turn off internal power to components such as NAND, DRAM, [i.e. the ‘memory device’ as claimed] or parts of the controller 102 [analogous to the ‘back-end module’ as claimed] to reduce power consumption and improve temperature reduction. The Examiner further notes the Segev reference was included to teach the “always on” aspect for the “always on module” as shown in the rejections above. Thus, based on the citations and explanations above, the Examiner contends the combination of the Bar and Segev teaches the argued limitations as broadly and instantly claimed, and has maintained the rejections set forth above. Any other remaining arguments appear to be commensurate in scope with the arguments noted above, and the Examiner notes the responses above.
4. RELEVANT ART CITED BY THE EXAMINER
The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant's art and those arts considered reasonably pertinent to applicant's disclosure. See MPEP 707.05(c).
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. These references include:
Bolt (US 20030149840), which teaches a storage system (14) that stores data from a host system (12) includes a plurality of disk drives (30), and a controller (32) that controls the disk drives (30). At least one of the disk drives (30) is in a stand-by mode and one of the disk drives (30) is in a write/read mode at approximately the same time. In one embodiment, the controller (32) directs data to a first subset (500) of disk drives (30) and a second subset (502) of disk drives (30) simultaneously. In this embodiment, at least one of the subsets (500)(502) can include five disk drives (30). Further, during a data transfer, one third of the disk drives (30) can be in the write/read mode while two-thirds of the disk drives (30) are in the stand-by mode;
Castelaz (US 20110089760), which teaches a system for managing a power system with a plurality of power components that includes power source components and power consumption components includes a central power bus, a plurality of adaptable connectors that each electrically couple to a power component and to the central power bus, and a control processor that receives the state of each power component from the respective adaptable connector and is configured to balance the voltage and current output from each power source component to provide a desired power to a power consumption component based on the received states.
5. CLOSING COMMENTS
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRASITH THAMMAVONG whose telephone number is (571) 270-1040. The examiner can normally be reached Monday - Friday 12-8 PM EST.
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/PRASITH THAMMAVONG/
Primary Examiner, Art Unit 2137