DETAILED ACTION
Claims 12-16 are presented for examination. This office action is response to the submission on 1/20/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 12-16 in the reply filed on 1/20/2026 is acknowledged.
Information Disclosure Statement
The information disclosure statement filed 1/6/2025 fails to comply with 37 CFR 1.98(a)(2), which requires a legible copy of each cited foreign patent document; each non-patent literature publication or that portion which caused it to be listed; and all other information or that portion which caused it to be listed. It has been placed in the application file, but the information referred to therein has not been considered. All copies of NPL have been received, except the NPL below:
Zhong Q. C, Nguyen P. L, Ma Z, Sheng W, “Self-synchronized synchronverters: Inverters without a dedicated synchronization unit,” IEEE Transactions on power electronics, 2013,29(2):617-630.
Drawings
The drawings filed on 9/27/2023 are acceptable for examination proceedings.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 13-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, because of the unclear upload of the equations included in each claim. The term below in claim 13 appears to be in the equation from specification page 12, paragraph [0049], equation (6) however there are what appear to be dots or characters that may have been cut-off when placed in the claim, indicated below on the first term by the arrow added by the examiner. There are similar cut-off characters or dots in other variables of the equation in claim 13 and in the equations included in claims 14-15 as well. Examiner requests corrected claims either with the characters removed or not cut-off. For the purposes of examination, examiner interprets the cut-off characters or dots to be “_” in the equations of claims 13-15.
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Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, because:
The term “~” in claim 16, lines 2, 3, 4, 5, and 7 (appears twice in line 7) is a relative term which renders the claim indefinite. The term “~” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Because the term "~" is unclear, it is not clear what range of response time or percentage of the line cycle is covered in the claim.
The term “approximately” in claim 16, lines 1, 4 and 6 is a relative term which renders the claim indefinite. The term “approximately” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Because the term "
It is unclear whether the terms “(5 sampling cycles, sampling frequency is 50 kHz)” in claim 16 lines 2-3, “(6 sampling cycles, sampling frequency is 50 kHz)” in claim 16 lines 4-5, and “(8 sampling cycles, sampling frequency is 50 kHz)” in claim 16 line 7 are required limitations of the claim or are merely examples. For the purposes of examination, examiner interprets these limitations as required limitations.
It is unclear whether the limitation of “(60Hz line frequency)” in claim 16 lines 3, 5, and 7-8 are required limitations of the claim or are merely examples. For the purposes of examination, examiner interprets these limitations as required limitations.
It is unclear what is meant by “LVRT” in claim 16 lines 2 and 4. For the purposes of examination, examiner interprets this limitation as “low-voltage-ride-through”.
It is unclear what is meant by “grid voltage drop is approximately 20%” in claim 16 line 1 because it is not clear what the grid voltage is dropping from. For the purposes of examination, examiner interprets this claim limitation as “grid voltage drop is approximately 20% from a standard grid voltage”.
It is unclear what is meant by “grid voltage drop is approximately 50%” in claim 16 lines 4-5 because it is not clear what the grid voltage is dropping from. For the purposes of examination, examiner interprets this claim limitation as “grid voltage drop is approximately 50% from the standard grid voltage”.
It is unclear what is meant by “grid voltage drop is approximately 100%” in claim 16 line 1 because it is not clear what the grid voltage is dropping from. For the purposes of examination, examiner interprets this claim limitation as “grid voltage drop is approximately 100% from the standard grid voltage”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Yasser Abdel-Rady Ibrahim Mohamed and E. F. El-Saadany, "An Improved Deadbeat Current Control Scheme With a Novel Adaptive Self-Tuning Load Model for a Three-Phase PWM Voltage-Source Inverter," in IEEE Transactions on Industrial Electronics, vol. 54, no. 2, pp. 747-759, April 2007, doi: 10.1109/TIE.2007.891767. (hereinafter referred to as “Yasser”, citations to examiner provided copy), in view of smaeil Zangeneh Bighash, Seyed Mohammad Sadeghzadeh, Esmaeil Ebrahimzadeh, Frede Blaabjerg, Improving performance of LVRT capability in single-phase grid-tied PV inverters by a model-predictive controller, International Journal of Electrical Power & Energy Systems, Volume 98, 2018, Pages 176-188, ISSN 0142-0615, https://doi.org/10.1016/j.ijepes.2017.11.034. (hereinafter referred to as “Bighash”, citations to applicant provided copy), further in view of B. Zhou, Y. He, Y. Zou, Y. Li and F. Z. Peng, "An Inner-Loop Control Method for the Filter-less, Voltage Sensor-less, and PLL-less Grid-Following Inverter-Based Resource," 2022 IEEE Applied Power Electronics Conference and Exposition (APEC), Houston, TX, USA, 2022, pp. 1425-1429, doi: 10.1109/APEC43599.2022.9773557. (hereinafter referred to as “Zhou”, citations to examiner provided copy).
Claim 12:
Yasser teaches “A deadbeat control method for a Grid-Tied Inverter with Zero-Voltage-Ride-Through (ZVRT) Capability, comprising: measuring, by a controller, at a kth sampling instant, a set of a grid current for each phase of the grid;” (Yasser teaches that the scheme described is a deadbeat control scheme in Yasser [Page 747, Abstract] "In this paper, an improved deadbeat current control scheme with a novel adaptive self-tuning load model for a three-phase pulsewidth-modulated (PWM) voltage-source inverter is proposed."; Yasser teaches a topology using the current controller may be for a grid-connected inverter in Yasser [Page 749, Section II, first paragraph] "A common topology of a current-regulated three-phase VSI is depicted in Fig. 1. The inverter is supplying a three-phase load consisting of a series inductance L, a resistance R, and an ac back EMF vs. The load configuration in Fig. 1 can reasonably represent a variety of applications such as motor drives and grid-connected inverters. To impose an arbitrary current in an inductive load, a current controller is usually adopted to shape the voltage applied on the inductor so that minimum current error is achieved."; Yasser Fig. 1 teaches [AltContent: rect]measuring the current of all 3 phases.
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“and generating, by a modulation block of the controller, PWM signals to control inverter switches, wherein the PWM signal are generated by the modulation block based on the desired inverter voltage references.” (Yasser teaches uploading the command voltage to the PWM generator in Yasser [Page 750 Section III, second paragraph] "The control law in (6) does not account for system delays by assuming that the control period is much longer than the calculation time of (6). Practically, when the control period is chosen to be small, inherent and nonnegligible delays associated with the implementation of the digital control scheme reduce the stability margins, particularly when high feedback gains are used. The control timing sequence of a practical digital current controller can be explained as follows. The kth cycle generated by the PWM generator starts the control process. The synchronous sampling process starts at the kth cycle. The calculation time of the control algorithm should end before the (k+1)th cycle, and the command voltage is uploaded into the PWM generator just before the (k+1)th cycle. During the (k+1)th period of the control process, the control voltages calculated in the previous period are applied to the load via the VSI. The resultant phase currents are sensed using the (k+2)th interrupt.").
Yasser does not appear to explicitly teach “generating, by the controller, a next cycle current reference using the or “generating, by the controller, in one switching cycle or less, in response to the current references, desired inverter voltage references;” However, Bighash does teach these claim limitations.
Bighash teaches “generating, by the controller, a next cycle current reference using the (Bighash teaches that to calculate the next sample current reference, it uses a predicted grid voltage and a real and reactive power reference in Bighash [Page 178 Section 5.2.2]
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“generating, by the controller, in one switching cycle or less, in response to the current references, desired inverter voltage references;” (Bighash teaches determining a voltage vector using the current reference in Bighash [Page 180 Section 5.3.2]
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Yasser and Bighash are analogous art because they are from the same field of endeavor of control of a grid connected inverter. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having teachings of Yasser and Bighash before him/her, to modify the teachings of An Improved Deadbeat Current Control Scheme of Yasser to include the generation of a next sample current reference and generation of a desired inverter voltage reference using the current reference of Bighash because adding the Improving performance of LVRT capability in single-phase grid-tied PV inverters of Bighash would allow for a fast current controller with a faster dynamic response in LVRT compared to existing methods and increase accuracy and adaptability as described in Bighash [Page 176 last paragraph – Page 177] " In order to fill in this gap, this paper presents a fast current controller for a PV system based on a Model-Predictive Controller (MPC). The proposed approach has a fast dynamic response in LVRT duration comparing with the existing methods.” And in Bighash [Page 178, Section 5 first and second paragraphs] “In this paper, a simple, fast and robust MPC based controller is proposed which do not need any gain and parameter adjusting because the proposed method is implemented based on the system model. Compared to the classical PR controllers which are tuned based on the initial condition of the system, the proposed MPC controller is completely adaptive and acts based on the real time condition of the system. For example, in order to design the PR controller, it has been assumed that grid is a strong grid and the proportional and integral gains (KP and Ki) are tuned in a fix parameter for LCL filter. In this case, when the parameter of LCL filter or grid impedance change the PR controller may go toward instability. On the other hand, because the proposed controller is based on switching table and cost function it is robust against the variation of system parameters.
In the proposed current control method, the final control switching will be determined by a cost function. To increase the accuracy and adaptability of MPC in a single phase inverter, some virtual vectors are applied by using a switching table. The control block diagram of the proposed MPC method is given in Fig. 5.”
Neither Yasser or Bighash appear to explicitly teach “predicting, by the controller, a grid voltage using the grid currents;” However, Zhou does teach this claim limitation (Zhou teaches a control method calculating a grid voltage based on a grid current in Zhou [Page 2, Section II, second paragraph] "We always know the left end voltage of the grid impedance, which is v′I from the PWM controller reference. On the right end of the grid impedance, there is v′g which is the true grid voltage. Since the grid impedance is treated as passive components, the current already contains all the information, such as the grid voltage and frequency. We can then take advantage of this relationship to design our control based on current measurement only.").
Yasser, Bighash, and Zhou are analogous art because they are from the same field of endeavor of control of a grid connected inverter. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having teachings of Yasser, Bighash, and Zhou before him/her, to modify the teachings of An Improved Deadbeat Current Control Scheme of Yasser modified to include the generation of a next sample current reference and generation of a desired inverter voltage reference using the current reference of Bighash to include the estimation of voltage by using measured current of Zhou because adding the Inner-Loop Control Method for the Filter-less, Voltage Sensor-less, and PLL-less Grid-Following Inverter-Based Resource of Zhou would allow for determining grid phase and frequency information in one cycle, an improvement over using PLL dynamics which may take up to ten cycles as described in Zhou [Page 2, Section II, second paragraph] "Since the grid impedance is treated as passive components, the current already contains all the information, such as the grid voltage and frequency. We can then take advantage of this relationship to design our control based on current measurement only. Up to this point, we have removed the inverter filters, voltage sensors, and the PLL, which relies on voltage sensing. Also, PLL dynamics is relatively slow, which can take up to ten line cycles to track the grid voltage phase [1]. But the current can give us the grid phase and frequency information in one line cycle if the control is well designed.” Additionally, a person having ordinary skill in the art would recognize that estimating voltage by measuring only current instead of measuring current and voltage would reduce the cost required to implement the control method.
Allowable Subject Matter
Claims 13-15 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Y. Ping, C. Nan and L. Shengrong, "Research on the improved current deadbeat control algorithm of photovoltaic grid-connected inverter," 2011 4th International Conference on Power Electronics Systems and Applications, Hong Kong, China, 2011, pp. 1-3, doi: 10.1109/PESA.2011.5982948. (hereinafter referred to as “Ping”, citations to examiner provided copy) Ping teaches determining a current every cycle in Ping [Page 1, Section II, first paragraph] "In the beginning of each switching cycle time, the grid-connected inverter output current (I) is sampled. And the reference current value of the next cycle (I∗) will be predicted. Therefore, the duty cycle of the switching device can be calculated to control I value in the beginning of next cycle be equal to I∗."; Ping teaches determining the grid current in Ping [Page 1, Section II, right column, third paragraph – page 2] "According to Fig.1, a time-domain equation, with the variable of the grid current IL is expressed:
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to Zachary A Cain whose telephone number is (571)272-4503. The examiner can normally be reached Mon-Fri 7:00-3:30 CST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kenneth M Lo can be reached at (571) 272-9774. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Z.A.C./Examiner, Art Unit 2116
/KENNETH M LO/Supervisory Patent Examiner, Art Unit 2116