Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 25 June 2024 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The abstract of the disclosure is objected to because the words “comprises” should be replaced with --includes--. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-11 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Claim 1 (and dependent claims 2-7) recite “A computer implemented method for solving a classical optimization problem of integer factorization implemented on a digital computer system comprising a classical processor adapted to execute a time evolving block decimation (TEBD) algorithm, the method comprising: inputting a lattice basis A and a target lattice vector t to an input device of the classical processor; implementing a lattice basis reduction algorithm on the lattice basis A in an implementation module, thereby obtaining a reduced orthogonal lattice basis A′; projecting the target lattice vector t on the reduced orthogonal lattice basis A′; building a closest vector B to the target lattice vector t; optimizing the closest vector B using a tropical time-evolving block decimation algorithm by the classical processor; and outputting an integer vector w.”
Claims 1-7, in view of the claim limitations, recite the abstract idea of “inputting a lattice basis A and a target lattice vector t to an input device of the classical processor; implementing a lattice basis reduction algorithm on the lattice basis A in an implementation module, thereby obtaining a reduced orthogonal lattice basis A′; projecting the target lattice vector t on the reduced orthogonal lattice basis A′; building a closest vector B to the target lattice vector t; optimizing the closest vector B using a tropical time-evolving block decimation algorithm by the classical processor; and outputting an integer vector w.”
As a whole, in view of the claim limitations, but for the computer components and systems performing the claimed functions, the broadest reasonable interpretation of the recited “inputting a lattice basis A and a target lattice vector t to an input device of the classical processor; implementing a lattice basis reduction algorithm on the lattice basis A in an implementation module, thereby obtaining a reduced orthogonal lattice basis A′; projecting the target lattice vector t on the reduced orthogonal lattice basis A′; building a closest vector B to the target lattice vector t; optimizing the closest vector B using a tropical time-evolving block decimation algorithm by the classical processor; and outputting an integer vector w.”; therefore, the claims recite mental processes and mathematical concepts. Accordingly, the claims recite a mental process and a mathematical concept, and thus, the claims recite an abstract idea under the first prong of Step 2A.
Regarding claim 2, wherein the integer vector w represents the shortest distance between the lattice basis A and the target lattice vector t. This elaborates the abstract idea without adding technical elements the integrate it into a practical application.
Regarding claim 3, further comprising calculation of smooth-relation pairs from the integer vector w. This shows that adding a further mathematical calculation still falls under the mathematical concepts.
Regarding claim 4, wherein the lattice basis reduction algorithm is a Lenstra-Lenstra-Lovasz lattice basis reduction algorithm. This particular known mathematical algorithm (LLL) does not transform the claim into a practical application or technical improvement.
Regarding claim 5, wherein building a closest vector B comprises determining floating-point coefficients of the optimal closest vector B. This shows further mathematical detail but still remains within the abstract idea.
Regarding claim 6, further comprising rounding down floating-point coefficients of the closest vector B to obtain the integer vector w. Rounding is a conventional mathematical operation; and hence, it does not integrate the exception or amount to significantly more.
Regarding claim 7, further comprising applying a rounding function to the reduced orthogonal lattice basis A′. This shows another mathematical post-processing step; and hence, it still remains within the abstract idea.
Regarding claim 8, a computer system for solving a classical optimization problem of integer factorization implemented on a digital computer system, comprising: a memory for storing data relating to a lattice basis A, a target lattice vector t and executable computer modules; a processor for executing the executable computer modules, wherein the executable computer modules comprising: an implementation module for implementing a lattice basis reduction algorithm on the lattice basis A; and a TEBD module for optimizing the optimal closest vector B using a tropical time-evolving block decimation algorithm by the classical processor. This system claim corresponds to the method. Memory and processor are generic computer components performing their ordinary functions. The modules simply implement the same mathematical steps as Claim 1. No specialized hardware or improvement to computer functionality is claimed.
Regarding claim 9, further comprising a tropicalization module for implementing a tropicalization map T and a de-Tropicalization map D. This adds modules that perform further mathematical transformations; and hence, it remains part of the abstract mathematical algorithm.
Regarding claim 10, further comprising a decomposition module for decomposition of a Hamiltonian into two-variable Hamiltonians. Hamiltonian decomposition is a mathematical technique used in the TEBD optimization. Thus, it elaborates the abstract idea without providing an inventive concept or a practical application.
Regarding claim 11, a computer system for decrypting cyphertext, wherein the computer system comprises a decryption module implementing an algorithm for decrypting the cyphertext, and wherein the algorithm uses a computer implemented method for solving a classical optimization problem of integer factorization implemented on a digital computer system comprising a classical processor adapted to execute a time evolving block decimation (TEBD) algorithm, the computer implemented method comprises: inputting a lattice basis A and a target lattice vector t to an input device of the classical processor; implementing a lattice basis reduction algorithm on the lattice basis A in an implementation module, thereby obtaining a reduced orthogonal lattice basis A′; projecting the target lattice vector t on the reduced orthogonal lattice basis A′; building a closest vector B to the target lattice vector t; optimizing the closest vector B using a tropical time-evolving block decimation algorithm by the classical processor; and outputting an integer vector w. This claim is directed to using the same mathematical factorization algorithm inside a decryption module. It does not integrate the abstract idea into a practical application.
This judicial exception is not integrated into a practical application under the second prong of Step 2A. In particular, the claims recite the additional elements beyond the recited abstract idea of“[a] computer- implemented method” and “the method is carried out by one or more physical processors configured by machine-readable instructions” as recited in claims 8 and 11, individually and when viewed as an ordered combination, and pursuant to the broadest reasonable interpretation, each of the additional elements are computing elements recited at high level of generality implementing the abstract idea on a computer (i.e. apply it), and thus, are no more than applying the abstract idea with generic computer components. Moreover, aside from the aforementioned additional elements, the remaining elements of dependent claims 2-7, 9 and 10 do not integrate the abstract idea into a practical application because these claims merely recite further limitations that provide no more than simply narrowing the recited abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception under Step 2B. As noted above, the aforementioned additional elements beyond the recited abstract idea, as an order combination, are no more than mere instructions to implement the idea using generic computer components (i.e. apply it), and further, generally link the abstract idea to a field of use, which is not sufficient to amount to significantly more than an abstract idea; therefore, the additional elements are not sufficient to amount to significantly more than an abstract idea. Furthermore, as an ordered combination, these elements amount to generic computer components performing repetitive calculations, receiving or transmitting data over a network, which, as held by the courts, are well-understood, routine, and conventional. See MPEP 2106.05(d); July 2015 Update, p. 7. Moreover, aside from the aforementioned additional elements, the remaining elements of dependent claims 2-7, 9 and 10 do not transform the recited abstract idea into a patent eligible invention because these claims merely recite further limitations that provide no more than simply narrowing the recited abstract idea. Looking at these limitations as an ordered combination adds nothing additional that is sufficient to amount to significantly more than the recited abstract idea because they simply provide instructions to use a generic arrangement of generic computer components and recitations of generic computer structure that perform well-understood, routine, and conventional computer functions that are used to “apply” the recited abstract idea. Thus, the elements of the claims, considered both individually and as an ordered combination, are not sufficient to ensure that the claim as a whole amounts to significantly more than the abstract idea itself. Since there are no limitations in these claims that transform the exception into a patent eligible application such that these claims amount to significantly more than the exception itself, claims 1-11 are rejected under 35 U.S.C. 101 as being directed to non-statutory subject matter.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Orus et al (US 12,710,748) disclose an apparatus or system including at least one classical processor and/or at least one quantum processor configured to calculate a first cost of a predetermined cost function associated with both a predetermined optimization problem and a set of variables as parameters, and calculate the cost of the cost function a plurality of times running an optimization by applying gradient descent to a converted set of variables a plurality of times considering the most recent calculated cost of the cost function in each conversion of the set of variables. Mugel et al (US 11,907,325) disclose a computing device or system carrying out the method that provides the cost function equation and processes it to provide the TN that will be used in an iterative process intended to optimize the value of the cost function. All possible configurations of the variables are present in the TN provided since it is not known in advance which configuration provides a better result than another, or which configuration optimizes the most. As it is known in the art, the tensors of a TN are interconnected by ancillary indices that take into account the structure and amount of correlations in the configurational state. Baker et al (US 2023/0040584) disclose a computer implemented method of solving a Hamiltonian can include performing, in a tensor network contracting a plurality of tensors in the network, a Lanczos method acting on the uncontracted tensors, the Lanczos method including evaluating a recursive relation of an equation including using the equation at least two times, forming a block tridiagonal matrix having a block size greater than one, based on the recursive relation, and diagonalizing the block tridiagonal matrix to obtain new tensors and energy levels of the tensor network.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AN H DO whose telephone number is (571)272-2143. The examiner can normally be reached on M-F 7:00am-4:00pm.
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/AN H DO/Primary Examiner, Art Unit 2853
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