DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1, 3-8 and 10-13 are pending in this application. Claims 2 and 9 are withdrawn from consideration.
Election/Restrictions
Applicant's election with traverse of Species II in the reply filed on 08/28/2025 is acknowledged. The traversal is on the ground(s) that “there would be no undue burden on the examiner”. This is not found persuasive because the two species have distinct features and operate in a different manner from each other.
The requirement is still deemed proper and is therefore made FINAL.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Drawings
The drawings are objected to because
Figures 1-3 show Q2 as P-type transistor.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 4 is objected to because of the following informalities:
Claim 4 lines 3-4, “the second terminal of the second switch” should be -- the first terminal of the second switch--. Similar correction is required in lines 6-7.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 8 and 10-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 8 lines 3-4 recites “the transistor is controlled by a voltage of the first capacitor”. On page 11 of specification recites, “After the transistor Q2 is turned off, the capacitor C1 will be no longer to be continuously charged by the DC voltage VDC-IN. Thus, as long as the DC voltage VDC-IN is greater than the predetermined voltage, the capacitor C1 is not charged by the DC voltage VDC-IN”. It is unclear how voltage of C1 affects the transistor Q2 from being on or off. For the purposes of examination, the above limitation is interpreted as –a voltage of the first capacitor is controlled by the transistor--.
Claims 10-13 are rejected for the same reasons as stated above for claim 8.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 101499643 A), and further in view of Zaitsu (US 6535407 B1).
Regarding claim 1, Cai teaches a power protection circuit (abstract, an over-voltage protection circuit), comprising:
a control voltage generation circuit (e.g. circuit comprising Q1) (fig.1) electrically connected between an input terminal (e.g. voltage input end Uin) (fig.1) and a reference terminal (e.g. ground) (fig.1) and generating a control voltage according to an input voltage of the input terminal (page 3, when the input voltage V by the voltage input end Uin … the first switching element Q1 is turned on, and the base of the second switching element Q2 is low level); and
a first switch (i.e. second switching element Q2) (fig.1) having a first terminal (e.g. emitter of Q2) (fig.1), a second terminal (e.g. collector of Q2) (fig.2), and a control terminal (e.g. base of Q2) (fig.1), wherein the first terminal of the first switch is electrically connected to the input terminal (e.g. emitter of Q2 and Uin are connected) (fig.1), the second terminal of the first switch is electrically connected to the output terminal of the power protection circuit (e.g. collector of Q2 is connected to voltage output end Uo via Q3) (fig.1), the control terminal of the first switch is electrically connected to the control voltage generation circuit to receive the control voltage (e.g. base of Q2 is connected to circuit comprising Q1) (fig.1), and when the input voltage is greater than a predetermined value (page 3, when the input voltage V by the voltage input end Uin inputted … greater than the first switching element Q1), the control voltage generation circuit generates the control voltage (page 3, first switching element Q1 is turned on) and the first switch is turned on according to the control voltage (page 3, so the second switch element Q2 is conducted) to make the output terminal of the power protection circuit output an output voltage (page 3, stop supplying power to the power supply circuit).
Cai does not teach, a capacitor electrically connected between an output terminal of the power protection circuit and the reference terminal.
Zaitsu teaches in a similar field of endeavor of DC to DC converter, a capacitor (i.e. output capacitor 10) (fig.1) electrically connected between an output terminal of the power protection circuit (e.g. across resistor 5) (fig.1) and the reference terminal (e.g. ground) (fig.1).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the capacitor electrically connected between an output terminal of the power protection circuit and the reference terminal in Cai, as taught by Zaitsu, as it provides the advantage of providing stabilized output voltage.
Regarding claim 3, Cai and Zaitsu teach the power protection circuit of claim 1, wherein the control voltage generation circuit comprises:
a second switch (Cai, i.e. first switching element Q1) (fig.1) having a first terminal (Cai, e.g. collector of Q1) (fig.1), a second terminal (Cai, e.g. emitter of Q1) (fig.1), and a control terminal (Cai, e.g. base of Q1) (fig.1), wherein the second terminal of the second switch is electrically connected to the reference terminal (Cai, e.g. emitter of Q1 is connected to ground) (fig.1), and the control terminal of the second switch is electrically connected to a voltage dividing node (Cai, e.g. base of Q1 is connected to node A which is voltage dividing node of R1 and R2) (fig.1);
a third resistor (Cai, i.e. resistor R1) (fig.1) electrically connected between the input terminal and the voltage dividing node (Cai, e.g. R1 is connected between Uin and node A) (fig.1); and
a fourth resistor (Cai, i.e. resistor R2) (fig.1) electrically connected between the voltage dividing node and the reference terminal (Cai, e.g. R2 is connected between node A and ground) (fig.1), wherein a divided voltage is generated according to an output voltage of an output terminal of a power converter (Cai, page 2, normal voltage) divided by the third resistor and the fourth resistor (Cai, page 2, the voltage through the first voltage-dividing resistor and the second voltage-dividing resistor partial pressure).
Regarding claim 4, Cai and Zaitsu teach the power protection circuit of claim 3, wherein the control voltage generation circuit further comprises:
a fifth resistor (Cai, i.e. resistor R3) (fig.1) electrically connected between the input terminal and the first terminal of the second switch (Cai, e.g. connected between Uin and collector of Q1 via R4) (fig.1); and
a sixth resistor (Cai, i.e. resistor R4) (fig.1) having a first terminal and a second terminal (Cai, e.g. two side terminals of R4) (fig.1), wherein the first terminal of the sixth resistor is electrically connected to the first terminal of the second switch (Cai, e.g. one end of R4 is connected to collector of Q1) (fig.1), the second terminal of the sixth resistor is electrically connected to the control terminal of the first switch (Cai, e.g. other end of R4 is connected to base of Q2) (fig.1), and when the second switch is turned on according to the divided voltage, the control voltage is generated at the second terminal of the sixth resistor (Cai, Page 2, the first switching element is turned on so that the second switching element is turned on).
Regarding claim 5, Cai and Zaitsu teach the power protection circuit of claim 3, wherein the divided voltage is outputted from the voltage dividing node (Cai, e.g. voltage to base of Q1 from node A) (fig.1).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 101499643 A) and Zaitsu (US 6535407 B1), and further in view of Swagatam (Swagatam, How to replace a transistor or BJT with a MOSFET, January 6, 2021).
Regarding claim 6, Cai and Zaitsu teach the power protection circuit of claim 3.
Cai and Zaitsu do not teach, wherein the second switch is an N-type high electron mobility transistor (HEMT) or an N-type metal-oxide-semiconductor field-effect transistor (MOSFET).
Swagatam teaches in a similar field of endeavor of replacing BJT with a MOSFET, a switch can be an N-type metal-oxide-semiconductor field-effect transistor (MOSFET) (page 1, Until MOSFETs arrived in the field of electronics, transistors or BJTs to be precise ruled thepower switching circuits and applications).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the second switch as an N-type metal-oxide-semiconductor field-effect transistor (MOSFET) in Cai and Zaitsu, as taught by Swagatam, as it provides the advantage of switching heavy loads.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 101499643 A) and Zaitsu (US 6535407 B1), and further in view of Li (Bipolar Junction Transistor, S. S. Li, Semiconductor physical electronics, Plenum Press, New York 1993).
Regarding claim 7, Cai and Zaitsu teach the power protection circuit of claim 1, wherein the first switch is a PNP- type device (Cai, page 2, second switch element Q2 is a PNP-type crystal triode).
Cai and Zaitsu do not teach that the PNP-type device is a PNP-type bipolar transistor.
Li teaches in a similar field of endeavor of bipolar junction transistors, that a triode is replaced with bipolar transistor (page 1, silicon BJTs and FETs have replaced bulky vacuum tubes).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the PNP-type bipolar transistor in Cai and Zaitsu, as taught by Li, as it provides the advantage of miniaturization.
Claims 8 and 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Cai (CN 101499643 A) and Zaitsu (US 6535407 B1), and further in view of Wang (US 20210126548 A1).
Regarding claim 8, Cai and Zaitsu substantially teach the claim limitations as stated above in claim 1. Cai and Zaitsu further teach, a voltage conversion system (Zaitsu, abstract, DC/DC converter).
Cai and Zaitsu do not teach, comprising:
a power converter at least comprising a transistor electrically connected to an output terminal of the power converter and a first capacitor, wherein a voltage of the first capacitor is controlled by the transistor.
Wang teaches in a similar field of endeavor of voltage converter circuit, a power converter (i.e. voltage converter circuit 100) (fig.1A) at least comprising a transistor (i.e. transistors Q2) (fig.1A) electrically connected to an output terminal of the power converter (e.g. source of Q2 is connected to Vout) (fig.1A) and a first capacitor (i.e. capacitor C1) (fig.1A), wherein a voltage of the first capacitor is controlled by the transistor ([0041], the DC power VDC-IN can charge the capacitor C1 through resistor R2 and the transistor Q2).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the PNP-type bipolar transistor in Cai and Zaitsu, as taught by Wang, as it provides the advantage of relatively less number of components and having high transforming efficiency, while occupying small space.
Regarding claim 10, it is rejected for the same reasons as stated above for claims 3 and 4.
Regarding claim 11, it is rejected for the same reasons as stated above for claim 6.
Regarding claim 12, it is rejected for the same reasons as stated above for claim 7.
Regarding claim 13, Cai, Zaitsu and Wang teach the voltage conversion system of claim 8, wherein the voltage conversion system further comprises a DC/DC conversion circuit (Zaitsu, abstract, DC/DC converter); the DC/DC conversion circuit is electrically connected to the output terminal of the power protection circuit (e.g. Zaitsu, terminals at battery 1 (fig.1) are connected to Wang, Vout terminal and ground (fig.1A)).
Conclusion
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/SREEYA SREEVATSA/ Examiner, Art Unit 2838 09/04/2025