DETAILED ACTION
Response to Amendment
1. This written action is responding to the amendment dated on 10/03/2025.
2. The present application, filed on or after March 16, 2013, is being examined under
the first inventor to file provisions of the AIA .
3. Objection to claims 1, 6, 11 and 16 is withdrawn.
4. The 112(b) rejection to claim 11 is withdrawn.
5. The interpretation of claim 11 under the 112(f) is withdrawn.
6. Claims 1, 4-8, 11, and 14-18 are amended.
7. Claims 1-20 are submitted for examination.
8. Claims 1-20 are rejected.
9. The Examiner would like to point out that this action is made final (See MPEP
706.07a).
10.
Applicant’s Argument:
On pages 7-10 of the Remarks/Arguments, Applicant argues that:
1. “Gulati has a priority date of July 31, 2019 from a U.S. Patent Application No. 16/167,513. The present application has a U.S. priority date of October 5, 2022 from a U.S. Patent Application No. 63/413,576. Therefore, Gulati qualifies as prior art with respect to the present application only under 35 U.S.C. § 102(e). It is further respectively noted that 35 U.S.C. § 103(c)(1) states: "Subject matter developed by another person, which qualifies as prior art only under one or more of subsections (e), (f), and (g) of section 102 of this title, shall not preclude patentability under this section where the subject matter and the claimed invention were, at the time the claimed invention was made, owned by the same person or subject to an obligation of assignment to the same person”.
Response to Argument: Examiner respectfully disagrees with Applicant’s arguments because Gulati reference is published on 2-21-2019 which is more than one year before the effective filing date of the instant application which is 10-5-2022. (See MPEP “717.01 Affidavit or Declaration Under 37 CFR 1.130 [R-01.2024]”, specifically “37 CFR 1.130(c) provides that the provisions of 37 CFR 1.130 are not available if the rejection is based upon a disclosure made more than one year before the effective filing date of the claimed invention. A disclosure made more than one year before the effective filing date of the claimed invention is prior art under 35 U.S.C. 102(a)(1) and does not meet the requirements for exception under 35 U.S.C. 102(b)(1)”, and further see “II. SITUATIONS WHERE 37 CFR 1.130 AFFIDAVITS OR DECLARATIONS ARE INAPPROPRIATE”, specifically “(B) If the rejection is based upon a disclosure made more than one year before the effective filing date of the claimed invention. A disclosure made more than one year before the effective filing date of the claimed invention is prior art under 35 U.S.C. 102(a)(1) and may not be excepted under 35 U.S.C. 102(b)(1)”, and furthermore see “35 U.S.C. 102 Conditions for patentability; novelty”. Thus and according to the above recitations of the MPEP, the Gulati reference can be used as a prior art under 35 U.S.C. 102(a)(1).
11.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-9 and 11-19 are rejected under 35 U.S.C. 103 as being unpatentable over Gulati et al. US 2019/0356529 (hereinafter Gulati), in view of Kim et al. US 2020/0264948 (hereinafter Kim).
Regarding claim 1 Gulati teaches a method of operation of a device programming system comprising:
receiving, by a programmer, a target payload having one or more universal flash storage (UFS) content units each with a source hash value (Gulati teaches an initiate provisioning job module may receive a job control package a target payload for programming into programmable devices. The job control package comprises instructions and parameters for provisioning the programmable devices with the target payload, wherein the target payload is the information to be encrypted and programmed into the programmable devices, and wherein the target payload can include data, code, security keys, and other information [279-280]);
writing, by the programmer, one of the UFS content units to a UFS memory device coupled to a UFS baseboard, the UFS baseboard coupled to an embedded multimedia card (eMMC) interface coupled to the programmer (Gulati teaches the programmable devices can include a field programmable gate array, a programmable central processing unit (CPU), an embedded multimedia memory controller (eMMC), a micro CPU, or a similar device [0179] and fig. 8);
retrieving a copy of one of the UFS content units from the UFS memory device at the programmer via the UFS baseboard, the UFS baseboard coupled to a hash circuit (Gulati teaches extracting one or more of device certificates from the programmable devices coupled to programmer [0578]. Retrieving the device certificate and other information associated with the programmable device [0500]);
calculating, by the hash circuit, a live hash value of the one of the UFS content units (Gulati teaches a programmable device can read each piece of the secured firmware content, such as the security boot manager, an application image, etc., and generate a live hash value, such as an md5 hash value [0449]);
calculating, by the programmer, a verification status by matching the live hash value of the UFS content with a first hash signature (Gulati teaches comparing the live hash value to the firmware image hash value that was generated and stored in the programmable device for that piece of firmware images. If the hash values match, the booting process succeeds [0449]); and transferring, by the programmer, the UFS memory device to an output device receptacle based on a successful verification status (Gulati teaches calculating an authentication status of a first device by comparing the first device identifier to the authorized device list, and sorting the first device into an output receptacle of the programing unit based on a device authentication status of the first device [0335]. Gulati does not teach transferring a hash value to another entity. Kim substantially teaches a controller may add check bits such as parity bits, cyclical redundancy check (CRC) bits and hash code bits to data segments and transfer the data segments containing the check bits to a memory device, in order to check for an error on the data segments stored in the first buffer [0102].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to modify Gulati such that the invention further includes transferring a hash value to another entity. One would have been motivated to do so because offloading authentication task to a trusted party allows focusing on core business functionalities rather than managing authentication infrastructure and further for scalability and reducing complexity.
Regarding claim 2 Gulati as modified teaches the method of claim 1, wherein calculating the live hash value includes calculating the live hash value during the retrieval of the copy of one of the UFS content units (Gulati teaches a security controller can include a quantum computer, parallel computing circuitry, field programmable gate arrays (FPGA) configured to process security information, a co-processor, an array logic unit, a microprocessor, or a combination thereof [0065], wherein the system may generate a live hash value, such as an md5 hash value [0449]).
Regarding claim 3 Gulati as modified teaches the method of claim 1, wherein calculating the live hash value includes calculating the live hash value as a CRC-32 hash value (Kim teaches a controller may process the original data by adding check bits such as parity bits, cyclic redundancy check (CRC) bits or hash code bits to the original data, and transfer the processed original data through the channel [0190], and fig. 11 [0102], [0190]).
Regarding claim 4 Gulati as modified teaches the method of claim 1, wherein calculating the live hash value includes copying the live hash value to a buffer in the hash circuit and transferring the live hash value from the buffer to the programmer (Gulati teaches programmable device can generate a live hash value [0449], and further Kim teaches a controller may process the original data by adding check bits such as parity bits, cyclic redundancy check (CRC) bits or hash code bits to the original data, and transfer the processed original data through the channel [0190], and fig. 11).
Regarding claim 5 Gulati as modified teaches the method of claim 1, wherein calculating the live hash value includes calculating the live hash value using a field programmable gate array (FPGA) configured as the hash circuit (Gulati teaches a security controller may include a quantum computer, parallel computing circuitry, field programmable gate arrays (FPGA) configured to process security information [0065], wherein a programmable device can generate a live hash value [0449]).
Regarding claim 6 Gulati teaches a method of operation of a device programming system comprising:
receiving, by a programmer, a target payload having one or more universal flash storage (UFS) content units each with a source hash value (Gulati teaches an initiate provisioning job module may receive a job control package a target payload for programming into programmable devices. The job control package comprises instructions and parameters for provisioning the programmable devices with the target payload, wherein the target payload is the information to be encrypted and programmed into the programmable devices, and wherein the target payload can include data, code, security keys, and other information [279-280]);
writing, by the programmer, one of the UFS content units to a UFS memory device coupled to another unit, the eMMC interface coupled to the programmer, and the UFS interface coupled to the UFS memory device (Gulati teaches the programmable devices can include a field programmable gate array, a programmable central processing unit (CPU), an embedded multimedia memory controller (eMMC), a micro CPU, or a similar device [0179] and fig. 8);
retrieving, by the programmer, a copy of one of the UFS content units from the UFS memory device via a unit having a hash circuit (Gulati teaches the programmable devices can include a field programmable gate array, a programmable central processing unit (CPU), an embedded multimedia memory controller (eMMC), a micro CPU, or a similar device [0179] and fig. 8. Extracting one or more of device certificates from the programmable devices coupled to programmer [0578]. Retrieving the device certificate and other information associated with the programmable device [0500]. A factory security system can provide a plurality of functions such as symmetric encryption, and hash functions [0211-0213]);
calculating, by the hash circuit, a live hash value of the one of the UFS content units (Gulati teaches a programmable device can read each piece of the secured firmware content, such as the security boot manager, an application image, etc., and generate a live hash value, such as an md5 hash value [0449]);
calculating, by the programmer, a verification status by matching the live hash value of the UFS content with the first hash signature (Gulati teaches comparing the live hash value to the firmware image hash value that was generated and stored in the programmable device for that piece of firmware images. If the hash values match, the booting process succeeds [0449]); and
transferring, by the programmer, the UFS memory device to an output device receptacle based on a successful verification status (Gulati teaches calculating an authentication status of a first device by comparing the first device identifier to the authorized device list, and sorting the first device into an output receptacle of the programing unit based on a device authentication status of the first device [0335]. Gulati does not teach a bridge unit having a translation unit for coupling an eMMC interface to a UFS interface, and transferring a hash value to another entity. Kim substantially teaches a controller may add check bits such as parity bits, cyclical redundancy check (CRC) bits and hash code bits to data segments and transfer the data segments containing the check bits to a memory device, in order to check for an error on the data segments stored in the first buffer [0102].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to modify Gulati such that the invention further includes a bridge unit having a translation unit for coupling an eMMC interface to a UFS interface, and transferring a hash value to another entity. One would have been motivated to do so because offloading authentication task to a trusted party allows focusing on core business functionalities rather than managing authentication infrastructure and further for scalability and reducing complexity.
Regarding claim 7 Gulati as modified teaches the method of claim 6, wherein retrieving the copy of one of the UFS content units includes using a UFS smart module coupled to the translation unit and the hash circuit to perform flow control (Gulati teaches a control flow of the provisioning process flow can pass from module to module such as the calculated encrypted payload module [0287], [293], and further Kim teaches the shots, the UFS devices and the UFS cards in the respective UFS systems may communicate with external devices [0171]).
Regarding claim 8 Gulati as modified teaches the method of claim 6, wherein transferring the live hash value includes copying the live hash value to a first in first out (FIFO) memory buffer in the hash circuit and transferring the live hash value from the FIFO buffer to the programmer (Gulati teaches programmable device can generate a live hash value [0449], and further Kim teaches a controller may process the original data by adding check bits such as parity bits, cyclic redundancy check (CRC) bits or hash code bits to the original data, and transfer the processed original data through the channel [0191], and fig. 11).
Regarding claim 9 Gulati as modified teaches the method of claim 6, wherein writing one of the UFS content units to the UFS memory includes translating an eMMC command to a UFS command (Kim teaches the memory controller may be configured to communicate with an external device through one or more of various communication protocols such as universal serial bus (USB), multimedia card (MMC), embedded mmc (eMMC), peripheral component interconnection (PCI), PCI express (PCIe), advanced Technology Attachment (ATA), Serial-ATA, small computer system interface (SCSI), enhanced small disk interface (EDSI), Integrated Drive Electronics (IDE), Firewire, universal flash storage (UFS), WIFI and Bluetooth [0149] and [0171]).
In response to Claim 11: Rejected for the same reason as claim 1
In response to Claim 12: Rejected for the same reason as claim 2
In response to Claim 13: Rejected for the same reason as claim 3
In response to Claim 14: Rejected for the same reason as claim 4
In response to Claim 15: Rejected for the same reason as claim 5
In response to Claim 16: Rejected for the same reason as claim 6
In response to Claim 17: Rejected for the same reason as claim 7
In response to Claim 18: Rejected for the same reason as claim 8
In response to Claim 19: Rejected for the same reason as claim 9
12.
Claims 10 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Gulati and Kim as mentioned above, and further in view of Rosensprung et al. US 2019/0146934 (hereinafter Rosensprung).
Regarding claim 10 Gulati as modified teaches the method of claim 6, wherein retrieving the copy of the one of the UFS content units from the UFS memory device (Gulati teaches extracting one or more of device certificates from the programmable devices coupled to programmer [0578]. Retrieving the device certificate and other information associated with the programmable device [0500]). Gulati does not teach transferring data in 4K blocks. Rosensprung substantially teaches transferring 4K blocks of data to another entity [0165].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to modify Gulati such that the invention further includes transferring data in 4K blocks. One would have been motivated to do so because smaller block size such as 4K provides better performance than large 16K block in a buffer memory.
In response to Claim 20: Rejected for the same reason as claim 10
Conclusion
THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Ayoub Alata whose telephone number is (313) 446-6541. The examiner can normally be reached on M-F: 8:00am-4:30pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jay Kim can be reached at (571) 272-3804. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
/AYOUB ALATA/Primary Examiner, Art Unit 2494