DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-22 of U.S. Patent No. 11,817,854. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the patent would anticipate the claims of the present application in their current form.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 2-5, 11, 12, 19, and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Apfel (USPAP 2010/0066169).
Regarding claim 2, Apfel’s Figs. 1 and 3 show a gate driver comprising:
a first power supply terminal (106) configured to receive a first power supply voltage (Vp) from a power supply;
a second power supply terminal (144) configured to receive a second power supply voltage (ground) from the power supply;
a voltage regulator output (108/110) configured to provide a regulated voltage (DR1/DR2); and
a programmable voltage regulator (102) configured to generate the regulated voltage, the regulated voltage having a level between a first level of the first power supply voltage (Vp) and a second level (ground) of the second power supply voltage, and the regulated voltage being based on a programmable value (output of programmable reference voltages 120/122).
As to claim 3, Apfel’s Figs. 1 and 3 clearly show the gate driver of claim 2 wherein the programmable value is selectable using a programmable voltage reference (120/122).
As to claim 4, Apfel’s Figs. 1 and 3 show the gate driver of claim 3 wherein
the programmable voltage reference is programmed during initialization of the gate driver (such as when it is powered on).
As to claim 5, Apfel’s Figs. 1 and 3 show the gate driver of claim 2 wherein the programmable voltage regulator regulates a positive turn-on voltage (e.g., drive signal DRV1 since transistor 324 is an n-channel FET).
Regarding claim 11, Apfel’s Figs. 1 and 3 show a gate driver system comprising:
a power supply (not shown but implied); and
a first gate driver (132) and a second gate driver (134), each gate driver including a first power supply terminal (1106) and a second power supply terminal (144) connected to the power supply, a voltage regulator output (108/110) configured to provide a regulated voltage (DR1/DR2), and a voltage regulator (102) configured to generate the regulated voltage, the regulated voltage having a level between a first level of a first power supply voltage (Vp) received from the power supply and a second level of a second power supply voltage (ground) received from the power supply, and the regulated voltage being based on a programmable value (120/122).
As to claim 12, Apfel’s Figs. 1 and 3 show the gate driver system of claim 11 wherein the power
supply includes a rectifier diode (127) connected to a first output (106) of the power supply configured to output the first power supply voltage (Vp).
As to claims 19 and 21, these claims are rejected for the same reasons as claim 11 (Apfel’s Figs. 1 and 3 circuit can be adapted to any application that uses a half-bridge driver such as an electromagnetic motor).
Allowable Subject Matter
The double patenting rejection notwithstanding, claims 6-10, 13-18, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new grounds of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM HERNANDEZ whose telephone number is (571)272-8979. The examiner can normally be reached Mon to Fri; 10am to 6pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah M Youssef can be reached at (571) 270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM HERNANDEZ/Primary Examiner, Art Unit 2849