Prosecution Insights
Last updated: April 19, 2026
Application No. 18/378,010

THERMOPLASTIC INTERPOSER

Non-Final OA §102§103
Filed
Oct 09, 2023
Examiner
MCALLISTER, MICHAEL F
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Meta Platforms Technologies, LLC
OA Round
2 (Non-Final)
86%
Grant Probability
Favorable
2-3
OA Rounds
1y 11m
To Grant
92%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
520 granted / 606 resolved
+17.8% vs TC avg
Moderate +6% lift
Without
With
+5.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
9 currently pending
Career history
615
Total Applications
across all art units

Statute-Specific Performance

§103
47.4%
+7.4% vs TC avg
§102
40.9%
+0.9% vs TC avg
§112
8.1%
-31.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 606 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 4, 5, 11, 12 and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Das et al (US 20120162928 hereinafter Das). In regards to claim 1, Das discloses;” An interposer (abstract) comprising: a laminate structure (paragraph 0060 where interposer contains dielectric and conductive layers) comprising two or more thermoplastic ordered polymer (paragraph 0048, 0062) layers; one or more connection points (Fig. 3 (63)), each connection point comprising a through chip via; and an internal region relative to an outer boundary of the laminate structure (Fig. 4 (shown)).” In regards to claim 2, Das discloses;” The interposer of claim 1, the laminate structure further comprising a mezzanine element aligned with the internal region (Fig. 4 (39, 41, paragraph 0058).” In regards to claim 4, Das discloses;” The interposer of claim 1, the laminate structure further comprising an opening at the internal region (Fig. 4 (shows internal section open, Paragraph 0060)).” In regards to claim 5, Das discloses;” The interposer of claim 1; further comprising a metal plating over at least each connection point (Fig. 4 (63,65), paragraph 0060).” In regards to claim 11, Das discloses;” A tri-layer structure comprising: a first printed circuit (Fig. 4 (21)) board; a second printed circuit board Fig. 4 (81), paragraph 0065); and a thermoplastic interposer (Fig. 4 (61)) comprising one or more sheets of ordered polymers (paragraph 0048, 0062 Polytetrafluoroethylene is a thermoplastic), the thermoplastic interposer being positioned between the first printed circuit board and the second printed circuit board and coupled to the first printed circuit board and to the second printed circuit board (Fig. 4 (shown).” In regards to claim 12, Das discloses;” The tri-layer structure of claim 11, the thermoplastic interposer further comprising a mezzanine element within an internal region of a laminate interposer structure (Fig. 4 (39, 41, paragraph 0058).” In regards to claim 16, Das discloses;” The tri-layer structure of claim 11 further comprising: one or more connection points, each connection point comprising a through chip via; and a metal plating over at least each connection point (Fig. 4 (63,65), paragraph 0060).” Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 3, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Das et al (US 20120162928 hereinafter Das) as applied to claims 1, 2, 11 and 12 above, and further in view of HA et al. (US 2021/0014970 hereinafter Ha). In regards to claim 3, Das discloses;” The interposer of claim 2”, but does not directly disclose;” wherein the mezzanine element is thinner than a peripheral portion of the laminate structure.” However, Ha discloses an interposer structure, where the internal elements are thinner than the interposer as shown in Figure 8. It would have been an obvious matter of design choice to ensure the internal elements are thinner due to component sizes, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being, within the level of ordinary skill in the art. \ In re Rose, 105 USPQ 237 (CCPA 1955). Thus using layout as suggested by Ha, with the structure of Das, the claimed invention is disclosed. In regards to claim 14, Das discloses;” The tri-layer structure of claim 12, but does not directly disclose;” wherein the mezzanine element is thinner than a peripheral portion of the laminate structure.” However, Ha discloses an interposer structure, where the internal elements are thinner than the interposer as shown in Figure 8. It would have been an obvious matter of design choice to ensure the internal elements are thinner due to component sizes, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being, within the level of ordinary skill in the art. \ In re Rose, 105 USPQ 237 (CCPA 1955). Thus using layout as suggested by Ha, with the structure of Das, the claimed invention is disclosed. Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Das et al (US 20120162928 hereinafter Das) as applied to claim 12 above, and further in view of PBCCART (2005-2026 Hereinafter PBCCart). In regards to claim 13, Das discloses;” The tri-layer structure of claim 12”, but does not directly disclose;” wherein at least one of the first printed circuit board and second circuit board comprises one or more electronic components thermally coupled to the thermoplastic interposer.” However PBCCart discloses that heat is dissipated from electrical components to metal planes within a PCB. It would have been obvious to one skilled in the art to know that all interconnecting metal such as reference planes and via would have the capability to conduct heat from hot sources to cooler locations. Thus the metal layers of substrate (Fig. 4 (81), paragraph 0069) the heat would be conducted to the interposer (Fig. 4 (61)). Thus the claimed invention is disclosed. Allowable Subject Matter Claims 6-10, 15 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 18-20 are allowed. REASON FOR ALLOWANCE The following is a statement of reasons for the indication of allowable subject matter: The prior art taken singularly or in combination fails to anticipate or fairly suggest the limitation of the independent claim, in such a manner that a rejection under 35 U.S.C. 102 or 103 would be proper. The prior art fails to teach a combination of all the features as presented in independent claim 1 with the allowable feature being:" A stack-PCB architecture comprising: a core frame; two or more printed circuit boards on a first side of the core frame, the printed circuit boards interconnected by one or more first interposers; and two or more complementary elements on second side of the core frame, the second side of the core frame being opposite the first side of the core frame, the two or more complementary elements interconnected by one or more second interposers, wherein at least one of the first interposers or second interposers comprises a thermoplastic interposer comprising a laminate structure of two or more ordered polymer sheets." Therefore, claim 18 is allowed. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL F MCALLISTER whose telephone number is (571)272-2453. The examiner can normally be reached Monday-Friday 7 AM-4 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at 571-272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL F MCALLISTER/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Oct 09, 2023
Application Filed
Dec 16, 2025
Non-Final Rejection — §102, §103
Feb 11, 2026
Examiner Interview Summary
Feb 11, 2026
Applicant Interview (Telephonic)
Feb 24, 2026
Response Filed
Mar 10, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
86%
Grant Probability
92%
With Interview (+5.9%)
1y 11m
Median Time to Grant
Moderate
PTA Risk
Based on 606 resolved cases by this examiner. Grant probability derived from career allow rate.

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