Prosecution Insights
Last updated: October 02, 2026
Application No. 18/379,855

DOHERTY AMPLIFIER

Final Rejection §103
Filed
Oct 13, 2023
Priority
May 14, 2021 — continuation of PCTJP2021018321
Examiner
BARTOL, LANCE TORBJORN
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
49 granted / 61 resolved
+12.3% vs TC avg
Strong +26% interview lift
Without
With
+26.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
22 currently pending
Career history
83
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
52.9%
+12.9% vs TC avg
§102
17.6%
-22.4% vs TC avg
§112
27.3%
-12.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 61 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed August 4, 2026 has been entered. Claims 1 and 3-7 remain pending in the application. Applicant’s amendments to the claims have overcome each and every 35 U.S.C. § 112 rejection previously presented in the Non-Final Office Action mailed May 4, 2026. Response to Arguments Applicant's arguments filed August 4, 2026 have been fully considered but they are not persuasive. Applicant argues, see pages 5-6, that prior art references Lv et al. (Patent Publication Number CN 111,586,896 A), hereafter referred to as Lv, and Shinjo et al. (Patent Publication Number US 2019/0028062 A1), as cited by applicant, hereafter referred to as Shinjo, fail to disclose the phase-frequency characteristic of the phase adjustment circuit corresponding to the phase-frequency characteristic of the synthesis circuit in the design operating frequency band of the Doherty amplifier, and that prior art reference Flemming et al. (Patent Publication Number US 2020/0212864 A1), as cited by applicant, hereafter referred to as Flemming, fails to disclose a fluctuation in pass phase difference between the phase adjustment circuit and the synthesis circuit being within ± 10 degrees in the design operating frequency band. Examiner respectfully disagrees. Regarding applicant’s first argument, examiner notes that the limitation in question, as presented in original claim 2, now in amended claim 1, is fully disclosed by primary reference Flemming, so therefore a supposed lack of disclosure by secondary references Lv and Shinjo does not result in a lack of disclosure by the combination of Flemming, Lv, and Shinjo. Regarding applicant’s second argument, examiner notes that Flemming discloses an equal 90 degree phase shift for its quadrature generator (analogous to the claimed phase adjustment circuit) and its synthesis circuit. Therefore, the disclosed fluctuation in phase difference is 0 degrees, which falls within the claimed range of ± 10 degrees. Therefore, applicant’s arguments are unconvincing and the rejection of claims 1 and 3-7 are maintained. Claim Objections Claims 1 and 3-7 objected to because of the following informality: On claim 1, lines 13-15, replace “and other end of the first inductor is connected to other end of the second inductor and other end of the third inductor” with “and an other end of the first inductor is connected to an other end of the second inductor and an other end of the third inductor”. Claims 3-7 are likewise objected to under this logic by virtue of their dependency on claim 1. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 3-7 are rejected under 35 U.S.C. 103 as being unpatentable over Flemming in view of Shinjo and Lv. Regarding claim 1, Flemming discloses: A Doherty amplifier (Flemming, Fig. 9) comprising: a carrier amplifier (Fig. 9, see “Class AB Carrier Amplifier”) to amplify a first signal (Fig. 9, consider signal through “Class AB Carrier Amplifier”); a peak amplifier (Fig. 9, “Class C Peaking Amplifier”) to amplify a second signal (Fig. 9, consider signal through “Class C Peaking Amplifier”); and a synthesis circuit (Fig. 9, see “Impedance Inverter and 90 Deg Delay” and “Harmonic Rejection (Output Tank Circuit)”) to synthesize the first signal amplified by the carrier amplifier (Fig. 9, see connection between “Class AB Carrier Amplifier” and “Impedance Inverter and 90 Deg Delay”) and the second signal amplified by the peak amplifier (Fig. 9, see connection between “Class C Peaking Amplifier” and “Impedance Inverter and 90 Deg Delay”), and a phase adjustment circuit (Fig. 9, see “Quadrature Generator”) to delay a phase of the second signal and output the second signal after phase adjustment to the peak amplifier (Fig. 9, consider quadrature-phase output of “Quadrature Generator”), wherein the synthesis circuit includes a bandpass filter circuit (Paragraph 48, lines 3-7) that includes inductors (Fig. 9, see inductors of “Impedance Inverter and 90 Deg Delay” and “Harmonic Rejection (Output Tank Circuit)”), and wherein the phase adjustment circuit includes a bandpass filter circuit (Paragraph 48, lines 3-12), and the bandpass filter circuit of the phase adjustment circuit has a phase-frequency characteristic corresponding to a phase-frequency characteristic of the bandpass filter circuit of the synthesis circuit in a design operating frequency band of the Doherty amplifier (Fig. 9, consider that a quadrature-phase signal has a 90 degree phase difference from the in-phase signal, and that the synthesis circuit provides a 90 degree phase delay), but fails to disclose [the synthesis circuit that includes] as a capacitor, a parasitic capacitance at an output side of each of the carrier amplifier and the peak amplifier, wherein the inductors include a first inductor, one end of which is connected to an output side of the carrier amplifier, a second inductor, one end of which is connected to an output side of the peak amplifier, a third inductor, one end of which is connected to a ground, and other end of the first inductor is connected to other end of the second inductor and other end of the third inductor. However, Shinjo teaches [the synthesis circuit] that includes, as a capacitor (Shinjo, Fig. 2, see capacitors), a parasitic capacitance at an output side of each of the carrier amplifier (Fig. 2, see capacitor of 1a) and the peak amplifier (Fig. 2, see capacitor of 2a), but fails to teach wherein the inductors include a first inductor, one end of which is connected to an output side of the carrier amplifier, a second inductor, one end of which is connected to an output side of the peak amplifier, a third inductor, one end of which is connected to a ground, and other end of the first inductor is connected to other end of the second inductor and other end of the third inductor. However, Lv teaches wherein the inductors include a first inductor (Lv, Fig. 3, see left side instance of DBI1), one end of which is connected to an output side of the carrier amplifier (Fig. 3, consider terminal at left side of left side instance of DBI1), a second inductor (Fig. 3, see right side instance of DBI1), one end of which is connected to an output side of the peak amplifier (Fig. 3, consider terminal at right side of right side instance of DBI1), a third inductor (Fig. 3, DBI2), one end of which is connected to a ground (Fig. 3, see connection between DBI2 and ground), and other end of the first inductor is connected to other end of the second inductor and other end of the third inductor (Fig. 3, see connection between DBI1 and DBI2). Flemming and Shinjo, and Lv are all considered to be analogous to the claimed invention because they are in the same field of improving Doherty amplifiers. Therefore, it would have been obvious to one of ordinary skill in the art to modify Flemming to incorporate the teachings of Shinjo and Lv to include the parasitic capacitances of Shinjo in the circuit of Flemming, which would have the effect of improving the efficiency of the amplifier of Flemming (Shinjo, Paragraph 48, lines 17-24), and to include the inductor network of Lv in the circuit of Flemming, which would have the effect of improving the bandwidth and efficiency of the amplifier of Flemming (Lv, Page 4, Paragraph 1, lines 1-7). Regarding claim 3, Flemming further discloses: further comprising: an output matching circuit (Flemming, Fig. 9, see “L-Match Impedance Transformer) to match an impedance of a signal after a synthesis by the synthesis circuit with an impedance of a load (Fig. 9, consider connection between “L-Match Impedance Transformer” and “Impedance Inverter and 90 Deg Delay”). Regarding claim 4, Flemming further discloses: further comprising: a distributor (Flemming, Fig. 9, see “Quadrature Generator”) to distribute electric power of an amplification target signal to two signals (Fig. 9, see connection between “Quadrature Generator” and “Class AB Carrier Amplifier” and “Class C Peaking Amplifier”), output one of the two signals after the power distribution as the first signal (Fig. 9, see connection between “Quadrature Generator” and “Class AB Carrier Amplifier”), and output the other one of the two signals after the power distribution as the second signal (Fig. 9, see connection between “Quadrature Generator” and “Class C Peaking Amplifier”); but fails to disclose a first input matching circuit to match an impedance of an input end of the carrier amplifier with an impedance at an input side of the distributor, the first input matching circuit being connected between the distributor and the carrier amplifier; and a second input matching circuit to match an impedance of an input end of the peak amplifier with the impedance at the input side of the distributor, the second input matching circuit being connected between the distributor and the peak amplifier. However, Shinjo further teaches a first input matching circuit (Shinjo, Fig. 1, 1b) to match an impedance of an input end of the carrier amplifier with an impedance at an input side of the distributor (Paragraph 44, lines 1-5), the first input matching circuit being connected between the distributor and the carrier amplifier (Fig. 1, see connection between 3a and 1a via 1b); and a second input matching circuit (Shinjo, Fig. 1, 2b) to match an impedance of an input end of the peak amplifier with the impedance at the input side of the distributor (Paragraph 45, lines 1-5), the second input matching circuit being connected between the distributor and the peak amplifier (Fig. 1, see connection between 3a and 2a via 2b). Flemming and Shinjo are both considered to be analogous to the claimed invention because they are in the same field of improving Doherty amplifiers. Therefore, it would have been obvious to one of ordinary skill in the art to modify Flemming to incorporate the teachings of Shinjo to include the input matching circuits of Shinjo in the amplifier of Flemming, which would have the effect of providing appropriate impedance matching for the amplifier of Flemming (Shinjo, Paragraphs 44-45). Regarding claim 5, Flemming further discloses: wherein a fluctuation in a pass phase difference between the bandpass filter circuit of the phase adjustment circuit and the bandpass filter circuit of the synthesis circuit is within ± 10 degrees in the design operating frequency band (Flemming, Fig. 9, consider that a quadrature-phase signal has a 90 degree phase difference from the in-phase signal, and that the synthesis circuit of Flemming provides a 90 degree phase delay). Regarding claim 6, Flemming further discloses: wherein the design operating frequency band includes a normalized frequency range of at least 0.9 to 1.1 (Flemming, Fig. 7A, consider operating frequency between ~ 6-8 GHz around a center frequency of 7 GHz, which corresponds to a normalized frequency range of ~ 0.86 – 1.14). Regarding claim 7, Flemming further discloses: wherein the design operating frequency band includes a normalized frequency range of at least 0.9 to 1.1 (Flemming, Fig. 7A, consider operating frequency between ~ 6-8 GHz around a center frequency of 7 GHz, which corresponds to a normalized frequency range of ~ 0.86 – 1.14). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chan et al. (Patent Number US 11,043,920 B2) discloses (Fig. 7) a Doherty amplifier circuit including a bandpass filter. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lance T Bartol whose telephone number is (703)756-1267. The examiner can normally be reached Monday - Thursday 6:30 a.m. - 4:00 p.m. CT, Alternating Fridays 6:30 - 3:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached at 571-272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LANCE TORBJORN BARTOL/Examiner, Art Unit 2843 /ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
Read full office action

Prosecution Timeline

Oct 13, 2023
Application Filed
May 04, 2026
Non-Final Rejection mailed — §103
Jul 14, 2026
Examiner Interview Summary
Jul 14, 2026
Applicant Interview (Telephonic)
Aug 04, 2026
Response Filed
Aug 20, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
99%
With Interview (+26.2%)
3y 2m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 61 resolved cases by this examiner. Grant probability derived from career allowance rate.

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