Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 17-25 are withdrawn from consideration as directed to non-elected invention. Claims 1-16 are being examined.
Election/Restrictions
Applicant’s election of invention Group I, claims 1-16 in the reply filed on 7/17/26 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 17-25 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 7/17/26.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 12 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
As to claim 12, the limitation “the first and second set of one or more qubits exclude qubit allocations…excludes qubit reuse operations” is unclear. More specifically, it is unclear how a set of qubits, logical or physical, excludes an action or process of “allocations”. Applicant’s specification at most disclosed that the quantum circuit(s) (i.e. previously compiled quantum program or product of the compiled quantum program) being generated to exclude assignment of qubits as well as to exclude reuse operations [paragraphs 25, 127, 226, 242 and 264] such that is understood that “the first and second set of one or more qubits” are not product of the generated quantum circuit rather than the qubits of the sets “exclude qubit allocations”. For examination purpose, the limitations are treated in light of the specification as “the quantum circuit were generated to exclude qubit allocations and qubit reuse operations” for the remainder of this office action.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 13 and 14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by “Resources Optimization in Q#” to Daniel.
As to claim 1, Daniel teaches the invention as claimed including a method for executing a quantum circuit by a quantum execution platform [a compiled and running instance of a quantum program, section Basic Resources Estimation in Q#; Section Use Cases], the method comprising:
obtaining the quantum circuit, the quantum circuit defining quantum operations over a plurality of qubits [quantum operation represented by rectangle that takes qubits input, under section Use Cases, "Sequential execution (reuse-encouraged)"] during a plurality of ordered cycles, the plurality of ordered cycles commences at an initial cycle, the quantum circuit comprises first and second qubit allocation instructions, the first qubit allocation
instruction instructing to obtain a first set of one or more qubits at the initial cycle [quantum operation with q0, q1 and aux qubits as the first set at beginning of the sequence, section Use Cases, "Sequential execution (reuse-encouraged)"], the second qubit allocation instruction instructing to obtain a second set of one or more qubits at an intermediate, the intermediate cycle is ordered, in the plurality of ordered cycles, after the initial cycle [quantum operation with q2, q3 and aux qubits as the second set in a subsequent operation after the initial operation, section Use Cases, "Sequential execution (reuse-encouraged)"];
performing an execution of one or more cycles of the quantum circuit, the one or more cycles comprise the initial cycle, said performing comprises allocating, for the initial cycle, one or more qubits from a qubit pool to be utilized by the quantum circuit, the one or more qubits corresponding to the first set of one or more qubits [quantum operation with q0, q1 and aux qubits as the first set at beginning of the sequence, section Use Cases, "Sequential execution (reuse-encouraged)"; reuse of qubits throughout the execution of quantum operation(s) and then return to pool of available qubits when operation is complete, section Optimization]; and
in response to the execution reaching the intermediate cycle, dynamically allocating at least one additional qubit from the qubit pool to be utilized by the quantum circuit, the at least one additional qubit corresponding to the second set of one or more qubits, whereby increasing a number of qubits utilized by the execution to include the at least one additional qubit during or after the intermediate cycle [upon reaching the quantum operation with q2, q3 and aux qubits as the second set in a subsequent operation after the initial operation, the aux qubit is reuse from the initial operation, section Use Cases, "Sequential execution (reuse-encouraged)"; reuse of qubits throughout the execution of quantum operation(s) and then return to pool of available qubits when operation is complete, section Optimization].
As to claim 13, Daniel teaches the invention as claimed including the quantum execution platform comprises a quantum computing cloud or a quantum computer [section Quantum Computers and Resources]
As to claim 14, Daniel teaches the method for executing a quantum circuit by a quantum execution platform in claim 1, therefore Daniel teaches the apparatus for implementing the method.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 7-9, 11 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Daniel as applied to claims 1 and 14 above, further in view of US Patent 11,28,1988 to Naveh et al. (hereafter Naveh).
As to claim 2, Daniel does not specifically teach wherein the at least one additional qubit is allocated to a second quantum circuit during the execution of the initial cycle of the quantum circuit. However, Naveh teaches resources utilized by the modified first sub-circuit may comprise a number of cycles that are included in the modified first sub-circuit. In some exemplary embodiments, the number of cycles included in the modified first sub-circuit may be smaller than a number of cycles included in the first sub-circuit, whereby cycle resources are freed to be utilized in synthesizing the modified second sub-circuit. Alternatively, the number of cycles included in the modified first sub-circuit may be larger than a number of cycles included in the first sub-circuit. In some exemplary embodiments, a set of one or more qubits may be idle during at least one cycle of the modified first sub-circuit, whereby parallel execution during the at least one cycle may be enabled. The modified second sub-circuit may be configured to utilize the idle qubits to perform parallel execution by the quantum circuit [col. 37, lines 47-62] (Note: in the perspective of the second sub-circuit, the idle qubit(s) used/borrow during one of the cycles that is not necessarily the initial cycle). It would have been obvious to one of ordinary skill in the art before the effective filing date to have modify Daniel with Naveh because they are both in the same field of endeavor in reusing quantum bits to reduce overall qubits required for a program [col. 47, lines 9-11] as being considered by Naveh.
As to claim 7, Daniel teaches the invention substantially as claimed including wherein the qubit pool comprises at least one auxiliary qubit [auxiliary qubits are “helper” qubits taken off the shelf for a quantum operation and then returned to the pool of available qubits upon the operation’s completion, section Use Cases, "Sequential execution (reuse-encouraged)"; section Optimization]. Daniel does not specifically teach the qubit pool comprises at least one non-auxiliary qubit. However, Naveh teaches qubit pool that includes auxiliary and other qubits [col. 17, lines 54-67; col. 28, lines 43-46]. It would have been obvious to one of ordinary skill in the art before the effective filing date to have modify Daniel with Naveh because they are both in the same field of endeavor in reusing quantum bits to reduce overall qubits required for a program [col. 47, lines 9-11] as being considered by Naveh.
As to claim 8, Daniel does not specifically teach wherein the first set of one or more qubits comprises at least one of: a clean qubit, a dirty disentangled qubit, and a dirty entangled qubit. However, Naveh teaches cleaned-up, dirty, dirty entangled, unentangled qubits [col. 7, lines 13-14; col. 14, lines 47-55]. It would have been obvious to one of ordinary skill in the art before the effective filing date to have modify Daniel with Naveh because they are both in the same field of endeavor in reusing quantum bits to reduce overall qubits required for a program [col. 47, lines 9-11] as being considered by Naveh.
As to claim 9, Daniel does not specifically teach identifying a gap of a qubit of the plurality of qubits in the quantum circuit, wherein during the gap the qubit is idle, the method further comprises assigning an additional operation to the qubit during the gap, wherein the additional operation comprises an operation of the second quantum circuit. However, Naveh teaches resources utilized by the modified first sub-circuit may comprise a number of cycles that are included in the modified first sub-circuit. In some exemplary embodiments, the number of cycles included in the modified first sub-circuit may be smaller than a number of cycles included in the first sub-circuit, whereby cycle resources are freed to be utilized in synthesizing the modified second sub-circuit. Alternatively, the number of cycles included in the modified first sub-circuit may be larger than a number of cycles included in the first sub-circuit. In some exemplary embodiments, a set of one or more qubits may be idle during at least one cycle of the modified first sub-circuit, whereby parallel execution during the at least one cycle may be enabled. The modified second sub-circuit may be configured to utilize the idle qubits to perform parallel execution by the quantum circuit [col. 37, lines 47-62]. It would have been obvious to one of ordinary skill in the art before the effective filing date to have modify Daniel with Naveh because they are both in the same field of endeavor in reusing quantum bits to reduce overall qubits required for a program [col. 47, lines 9-11] as being considered by Naveh.
As to claim 11, Daniel does not specifically teach obtaining metadata from a software compiler, the metadata indicating connectivity priorities for allocations of physical qubits to the second set of one or more qubits, and allocating the at least one additional qubit to the quantum circuit based on the metadata. However, Naveh teaches compiling the gatelevel representation may comprise performing a connectivity independent optimization on the gate-level representation of the quantum circuit, which may utilize the metadata. Additionally, or alternatively, the compilation may comprise performing a hardware connectivity optimization on the gate-level representation of the quantum circuit, which may be based on the metadata. In some exemplary embodiments, compiling the gate-level representation may comprise identifying a portion of the gate-level implementation that represents a function associated with the functional block, e.g. ,based on the metadata, and utilizing information regarding the functional block at a gate-level analysis… the metadata may define an area of the quantum program that corresponds to a functional block in the functional-level representation of the quantum program. For example, the metadata may indicate a range of cycles and a set of qubits that are utilized during the range of the cycles to implement the functional block. [col. 31, line 59-col. 32, line 4; col. 32, lines 38-41]. It would have been obvious to one of ordinary skill in the art before the effective filing date to have modify Daniel with Naveh because they are both in the same field of endeavor in reusing quantum bits to reduce overall qubits required for a program [col. 47, lines 9-11] as being considered by Naveh.
Claim 15, this claim is rejected for the same reason as claim 2 above.
Allowable Subject Matter
Claim 12 is allowable by overcoming the 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph rejection above.
Claims 3-6 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior arts of record when taken individually or in combination do not expressly teach or render obvious, in the context of the claims taken as a whole, the invention as recited in claims 3-6, 10 and 12.
Releasing of qubits was disclosed by Daniel [section Use Cases, "Sequential execution (reuse-encouraged)"; reuse of qubits throughout the execution of quantum operation(s) and then return to pool of available qubits when operation is complete, section Optimization] and Naveh [col. 13, lines 60-65; col. 37, lines 47-62]. Dynamically reallocates logical qubits during computation was disclosed in “Dynamic Qubit Allocation and Routing for Constrained Topologies by CNOT Circuit Re-synthesis”. The prior art(s) of record when taken individually or in combination do not expressly teach or render obvious the invention as a whole as recited in claims 3-6, 10 and 12.
Neither a reference uncovered that would have provided a basis of evidence for asserting a motivation, nor one of ordinary skill in the art before the effective filing date of the claimed invention, knowing the teaching of the prior arts of record would have combined them to arrive at the present invention as recited in the context of claims 3-6, 10 and 12 as a whole.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to QING YUAN WU whose telephone number is (571)272-3776. The examiner can normally be reached M-F 9AM-6PM EST.
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/QING YUAN WU/Primary Examiner, Art Unit 2199
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