DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the application filed on 10/18/2023.
Examiner Notes
Examiner cites particular paragraphs, figures, and line number in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. As a disclaimer, the use of underlining in direct quotes is done by the examiner for emphasis. Direct quotes are not originally underlined in the published references cited.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3, 7, and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In Claim 3, line 1, it is unclear whether “the availability of the resources” refers to “an availability of resources of the quantum execution platform for an execution of the first portion” in lines 2-3, lines 6-7, or both of claim 2. For the purposes of examination, “the availability of the resources” in line 1 of Claim 3 will be treated as --both of the availability of resources--.
In Claim 7, lines 1-2, “the precedence constraint” lacks proper antecedent basis. For the purposes of examination, the examiner will treat “the precedence constraint” of lines 1-2 of Claim 7 as --a precedence constraint--.
In Claim 15, line 1, it is unclear whether “the availability of the resources” refers to “an availability of resources of the quantum execution platform for an execution of the first portion”, in lines 5-6, or both of Claim 14. For the purposes of examination, “the availability of the resources” in line 1 of Claim 15 will be treated as --both of the availability of resources--.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 8, 12-14, 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Shanmugam Sakthivadivel et al. (U.S. Publication No. 20230040849 A1, hereinafter Sakthivadivel) in view of Izaac et al. (U.S. Publication No. 20240028943 A1, hereinafter Izaac).
Regarding Claim 1:
Sakthivadivel discloses,
“A method comprising: obtaining a quantum program” (In paragraph [0016], “a quantum computing service may receive quantum computing programs from customers, cause the quantum computing programs to be compiled into compiled quantum circuits, and transport the compiled quantum computing programs to quantum hardware providers for execution”.);
“the quantum program comprising one or more functionalities that are intended to be implemented as quantum operations in a quantum circuit” (In paragraph [0016], “a quantum computing service may receive quantum computing programs from customers, cause the quantum computing programs to be compiled into compiled quantum circuits, and transport the compiled quantum computing programs to quantum hardware providers for execution … during compilation, one or more compiled quantum circuit files of one or more quantum functions in a quantum computing program may be generated … For example, the quantum computing service may first receive a first quantum computing program written in a (high-level) source programming language for execution using a quantum processing unit of a quantum hardware provider. In some embodiments, the first quantum computing program may include one or more quantum functions, such as a Bell function to perform a Bell operation. The quantum computing service may store a compiled quantum circuit file for the Bell function (e.g. that is included in the first quantum computing program)”.);
“wherein the quantum program is not executable on a quantum execution platform” (In paragraph [0015], “A quantum computing program, generally written in a (high-level) source programming language, needs to be compiled into an executable version before it is executed on a quantum computer of a quantum hardware provider”.);
(Examiner’s Note: The examiner interprets the claim limitation of the quantum program’s non-executability on a quantum execution platform broadly. The examiner interprets the above claim limitation to include the quantum program as being written in a non-executable high-level language, supported by the examined case specification’s paragraph [0033], “may obtain a high-level quantum program from a user, such as Program 110, and generate a logical Quantum Circuit 140 based thereon. For example, Program 110 may comprise a non-executable representation of a functionality that is intended to be implemented by a quantum circuit”. Moreover, the quantum program being first written in a high-level language form before compilation is inherently not yet executable by the quantum execution platform, as supported above by Sakthivadivel (paragraph [0015]).);
“compiling a first [] of the quantum program to generate a first quantum circuit, the first quantum circuit is executable on the quantum execution platform” (In paragraph [0016], “the quantum computing programs to be compiled into compiled quantum circuits … during compilation, one or more compiled quantum circuit files of one or more quantum functions in a quantum computing program may be generated”. In paragraph [0028], “a compiled quantum circuit file that is directly executable on a given quantum computer”.);
“providing the first quantum circuit to the quantum execution platform to be executed thereby” (In paragraph [0019], “the compiled quantum circuit file of a quantum function to be executed on a given QPU”.);
“compiling a second [] of the quantum program to generate a second quantum circuit, the second quantum circuit is executable on the quantum execution platform” (In paragraph [0018], “a quantum program may be compiled using cached quantum circuit files for portions of the quantum program and, for other portions of the quantum program for which a compiled quantum circuit is not stored in a cache, additional quantum circuits may be compiled”. In paragraph [0019], “the compiled quantum circuit file of a quantum function to be executed on a given QPU may need to be in the executable format (e.g., a binary file format) in accordance with the corresponding quantum hardware type of the given QPU. Thus, in some embodiments, a quantum computing service may store multiple compiled quantum circuit files”. In paragraph [0033], “As described herein, quantum computing service may be able to re-use a previously compiled file (from the first quantum computing program) to compile the second quantum computing program. Thus, repetition of compilation of at least one portion of the second quantum computing program may be avoided”.);
“wherein the first and second [] of the quantum program are disjoint non-overlapping [] of the quantum program” (In paragraph [0016], “the quantum computing service may obtain the compiled quantum circuit file from the cache … and re-use the compiled quantum circuit file to generate a compiled version of the additional quantum computing program. Thus, repetition of quantum circuit compilation of at least one portion of the additional quantum computing program may be avoided”.);
“and providing the second quantum circuit to the quantum execution platform to be executed thereby, thereby performing an iterative compilation and execution of the quantum program” (In paragraph [0085], “During runtime (or execution), the quantum computer may iteratively access the memory address at each step, retrieve an incremental value from the memory address, and execute the compiled quantum computing program using the retrieved incremental value of the parameter”.).
Sakthivadivel does not disclose however Izaac discloses,
first and second portions (In paragraph [00136], “The quantum program can include a plurality of program portions. The program portions can refer to different aspects of the program that can be optimized using multi-level intermediate representations”.
Sakthivadivel recites two quantum programs, however Izaac teaches two portions of a single quantum program. Thus, Izaac is used to substitute Sakthivadivel’s use of two quantum programs, with Izaac’s use of two portions of one quantum program.)
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel by adopting the teaching of portioning a quantum program in Izaac. Izaac is motivated by a similar goal to optimize computing performance by portioning a quantum program, as opposed to using separate quantum programs. “Intermediate representations (IR)” (Izaac [0003]), “IRs are typically used in compiler workflows, in order to … (b) enable optimization of the code during compilation” (Izaac [0008]), “one of the first portion or the second portion is an intermediate numerical representation usable to optimize numerical characteristics of the high-level quantum program representation” (Izaac [0011]), “Providing an optimized version of the quantum program can also be useful where the quantum computer program (or quantum circuit derived therefrom) needs to be stored for later execution” (Izaac [0074]), “operations defined to optimize the quantum instructions 234 based on the particular quantum hardware or simulator that is being used to execute the quantum instructions … These optimization operations can also be implemented as constraints on other optimization operations” (Izaac [0119]). The motivation of Izaac is similar to the examined case, “One technical solution provided by the disclosed subject matter is to perform the compilation process and the execution process iteratively, instead of compiling an entire program and then executing the resulting quantum circuit. In some exemplary embodiments, at each iteration, a different portion of the quantum program may be compiled and executed, thereby increasing a compatibility of the compilation with the real-time constraints, and reducing the probability that an unexpected change in the real-time constraints will reduce the performance of the execution” (examined case [0101]).
Regarding Claim 2:
Sakthivadivel further discloses,
“obtaining first real-time constraints on an availability of resources of the quantum execution platform for an execution of the first []” (The ‘calibration data’ in Sakthivadivel is mapped to the claim limitation ‘real-time constraints’. Note that calibration must occur in real-time to be accurate. In paragraph [0024], “compiled quantum circuit files in the cache may be associated with validity periods in connection with calibration data of corresponding quantum computers of the quantum hardware providers (e.g. QPUs). Calibration is a process to measure parameters of a quantum computer to reduce errors and decoherence in quantum computing. In some embodiments, quantum hardware providers may frequently update, calibrate, and/or modify their respective quantum computers … In some embodiments, a quantum hardware provider may calibrate a QPU when providing an access window that makes the QPU available to execute quantum programs”. Where the availability of resources is provided in a cache in paragraph [0017], “a cache may be generated and used to cache compiled quantum circuits available for use to compile quantum programs submitted by different customers”. And the cache is calibrated to include validity period constraints in paragraph [0024], “Thus, a compiled file created using calibration data for benchmarking results at a given point-in-time may not be valid at a later point in time when the QPU has drifted from the calibration data determined based on the previously determined benchmarking results. As a result, in some embodiments, the quantum computing service may recognize validity periods of the compiled quantum circuit files stored in the cache”.);
“performing said compiling the first [] based on the first real-time constraints” (In paragraph [0024], “a compiled file created using calibration data for benchmarking results at a given point-in-time”.);
“obtaining second real-time constraints on an availability of resources of the quantum execution platform for an execution of the second []; and performing said compiling the second [] based on the second real-time constraints” (In paragraph [0024], “When the same quantum function is compiled for a subsequently received quantum program using updated calibration data, the quantum computing service may cause a new compiled file of the quantum function to be generated”.);
Sakthivadivel does not disclose however Izaac discloses,
first and second portions (In paragraph [0136], “The quantum program can include a plurality of program portions. The program portions can refer to different aspects of the program that can be optimized using multi-level intermediate representations”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel by adopting the teaching of portioning a quantum program in Izaac; motivated by the common goal to optimize computing performance by portioning a quantum program, “one of the first portion or the second portion is an intermediate numerical representation usable to optimize numerical characteristics of the high-level quantum program representation” (Izaac [0011]), “operations defined to optimize the quantum instructions 234 based on the particular quantum hardware or simulator that is being used to execute the quantum instructions” (Izaac [0119]). The motivation by Izaac is similar to the examined case, “a different portion of the quantum program may be compiled and executed, thereby increasing a compatibility of the compilation with the real-time constraints, and reducing the probability that an unexpected change in the real-time constraints will reduce the performance of the execution” (examined case [0101]).
Regarding Claim 8:
Sakthivadivel does not disclose however Izaac discloses,
“wherein said compiling the second portion of the quantum program is performed in parallel to at least a portion of an execution of the first quantum circuit by the quantum execution platform” (In paragraph [0205], “In order to compile more complex quantum programs which include numeric code, a “co-compilation” pipeline can be provided … In the co-compilation pipeline, a high-level quantum programming code (e.g., PennyLane code) can be compiled via a pipeline from the quantum program to the intermediate representation, and numeric code can be compiled via existing intermediate representation pipelines … The code can then be re-stitched back together to create a hybrid model within MLIR. Using such a parallelized pipeline can provide for faster execution time”. In paragraph [0219], “As shown in the MLIR block 530, gradients can be applied to a high-level representation of a quantum program (or hybrid quantum-classical program). This example provides a way of applying gradients to the quantum portion of the quantum program. This example provides a mechanism to vectorize quantum-classical functions, by using an MLIR compiler pass”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel by adopting the teaching of portioning a quantum program in Izaac; motivated by the common goal to optimize computing performance by portioning a quantum program, “one of the first portion or the second portion is an intermediate numerical representation usable to optimize numerical characteristics of the high-level quantum program representation” (Izaac [0011]), “operations defined to optimize the quantum instructions 234 based on the particular quantum hardware or simulator that is being used to execute the quantum instructions” (Izaac [0119]). The motivation by Izaac is similar to the examined case, “a different portion of the quantum program may be compiled and executed, thereby increasing a compatibility of the compilation with the real-time constraints, and reducing the probability that an unexpected change in the real-time constraints will reduce the performance of the execution” (examined case [0101]).
Regarding Claim 12:
Sakthivadivel further discloses,
“wherein the quantum execution platform comprises ” (In paragraph [0025], “quantum hardware providers 122, 124, 126, and 128 may allow quantum computing programs to be executed on quantum computers based on various different types of quantum computing technologies or paradigms”. Additionally, the execution platform may be cloud-based as recited in paragraph [0016], “Various embodiments described herein relate to techniques for reducing the amount of overhead associated with compilation of quantum computing programs in a cloud-based quantum computing service … a quantum computing service may receive quantum computing programs from customers, cause the quantum computing programs to be compiled into compiled quantum circuits, and transport the compiled quantum computing programs to quantum hardware providers for execution”. ).
Regarding Claim 13:
Sakthivadivel discloses,
“An apparatus comprising a processor and coupled memory, said processor being adapted to: obtain a quantum program” (In paragraph [0016], “a quantum computing service may receive quantum computing programs from customers, cause the quantum computing programs to be compiled into compiled quantum circuits, and transport the compiled quantum computing programs to quantum hardware providers for execution”. In paragraph [0089], “computing device 900 includes one or more processors 910 coupled to a system memory 920”.);
“the quantum program comprising one or more functionalities that are intended to be implemented as quantum operations in a quantum circuit” (In paragraph [0016], “a quantum computing service may receive quantum computing programs from customers, cause the quantum computing programs to be compiled into compiled quantum circuits, and transport the compiled quantum computing programs to quantum hardware providers for execution … during compilation, one or more compiled quantum circuit files of one or more quantum functions in a quantum computing program may be generated … For example, the quantum computing service may first receive a first quantum computing program written in a (high-level) source programming language for execution using a quantum processing unit of a quantum hardware provider. In some embodiments, the first quantum computing program may include one or more quantum functions, such as a Bell function to perform a Bell operation. The quantum computing service may store a compiled quantum circuit file for the Bell function (e.g. that is included in the first quantum computing program)”.);
“wherein the quantum program is not executable on a quantum execution platform” (In paragraph [0015], “A quantum computing program, generally written in a (high-level) source programming language, needs to be compiled into an executable version before it is executed on a quantum computer of a quantum hardware provider”.);
“compile a first [] of the quantum program to generate a first quantum circuit, the first quantum circuit is executable on the quantum execution platform” (In paragraph [0016], “the quantum computing programs to be compiled into compiled quantum circuits … during compilation, one or more compiled quantum circuit files of one or more quantum functions in a quantum computing program may be generated”. In paragraph [0028], “a compiled quantum circuit file that is directly executable on a given quantum computer”.);
“provide the first quantum circuit to the quantum execution platform to be executed thereby” (In paragraph [0019], “the compiled quantum circuit file of a quantum function to be executed on a given QPU”.);
“compile a second [] of the quantum program to generate a second quantum circuit, the second quantum circuit is executable on the quantum execution platform” (In paragraph [0018], “a quantum program may be compiled using cached quantum circuit files for portions of the quantum program and, for other portions of the quantum program for which a compiled quantum circuit is not stored in a cache, additional quantum circuits may be compiled”. In paragraph [0019], “the compiled quantum circuit file of a quantum function to be executed on a given QPU may need to be in the executable format (e.g., a binary file format) in accordance with the corresponding quantum hardware type of the given QPU. Thus, in some embodiments, a quantum computing service may store multiple compiled quantum circuit files”. In paragraph [0033], “As described herein, quantum computing service may be able to re-use a previously compiled file (from the first quantum computing program) to compile the second quantum computing program. Thus, repetition of compilation of at least one portion of the second quantum computing program may be avoided”.);
“wherein the first and second [] of the quantum program are disjoint non-overlapping [] of the quantum program” (In paragraph [0016], “the quantum computing service may obtain the compiled quantum circuit file from the cache … and re-use the compiled quantum circuit file to generate a compiled version of the additional quantum computing program. Thus, repetition of quantum circuit compilation of at least one portion of the additional quantum computing program may be avoided”.);
“and provide the second quantum circuit to the quantum execution platform to be executed thereby, thereby performing an iterative compilation and execution of the quantum program” (In paragraph [0085], “During runtime (or execution), the quantum computer may iteratively access the memory address at each step, retrieve an incremental value from the memory address, and execute the compiled quantum computing program using the retrieved incremental value of the parameter”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel by adopting the teaching of portioning a quantum program in Izaac; motivated by the common goal to optimize computing performance by portioning a quantum program, “one of the first portion or the second portion is an intermediate numerical representation usable to optimize numerical characteristics of the high-level quantum program representation” (Izaac [0011]), “operations defined to optimize the quantum instructions 234 based on the particular quantum hardware or simulator that is being used to execute the quantum instructions” (Izaac [0119]). The motivation by Izaac is similar to the examined case, “a different portion of the quantum program may be compiled and executed, thereby increasing a compatibility of the compilation with the real-time constraints, and reducing the probability that an unexpected change in the real-time constraints will reduce the performance of the execution” (examined case [0101]).
Regarding Claim 14:
Sakthivadivel further discloses,
“obtain first real-time constraints on an availability of resources of the quantum execution platform for an execution of the first []” (The ‘calibration data’ in Sakthivadivel is mapped to the claim limitation ‘real-time constraints’. Note that calibration must occur in real-time to be accurate. In paragraph [0024], “compiled quantum circuit files in the cache may be associated with validity periods in connection with calibration data of corresponding quantum computers of the quantum hardware providers (e.g. QPUs). Calibration is a process to measure parameters of a quantum computer to reduce errors and decoherence in quantum computing. In some embodiments, quantum hardware providers may frequently update, calibrate, and/or modify their respective quantum computers … In some embodiments, a quantum hardware provider may calibrate a QPU when providing an access window that makes the QPU available to execute quantum programs”.);
“perform said compile the first [] based on the first real-time constraints” (In paragraph [0024], “a compiled file created using calibration data for benchmarking results at a given point-in-time”.);
“obtain second real-time constraints on an availability of resources of the quantum execution platform for an execution of the second []; and perform said compile the second [] based on the second real-time constraints” (In paragraph [0024], “When the same quantum function is compiled for a subsequently received quantum program using updated calibration data, the quantum computing service may cause a new compiled file of the quantum function to be generated”.).
Sakthivadivel does not disclose however Izaac discloses,
first and second portions (In paragraph [0136], “The quantum program can include a plurality of program portions. The program portions can refer to different aspects of the program that can be optimized using multi-level intermediate representations”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel by adopting the teaching of portioning a quantum program in Izaac; motivated by the common goal to optimize computing performance by portioning a quantum program, “one of the first portion or the second portion is an intermediate numerical representation usable to optimize numerical characteristics of the high-level quantum program representation” (Izaac [0011]), “operations defined to optimize the quantum instructions 234 based on the particular quantum hardware or simulator that is being used to execute the quantum instructions” (Izaac [0119]). The motivation by Izaac is similar to the examined case, “a different portion of the quantum program may be compiled and executed, thereby increasing a compatibility of the compilation with the real-time constraints, and reducing the probability that an unexpected change in the real-time constraints will reduce the performance of the execution” (examined case [0101]).
Regarding Claim 18:
Sakthivadivel does not disclose however Izaac discloses,
“wherein said compile the second portion of the quantum program is performed in parallel to at least a portion of an execution of the first quantum circuit by the quantum execution platform” (In paragraph [0205], “In order to compile more complex quantum programs which include numeric code, a “co-compilation” pipeline can be provided … In the co-compilation pipeline, a high-level quantum programming code (e.g., PennyLane code) can be compiled via a pipeline from the quantum program to the intermediate representation, and numeric code can be compiled via existing intermediate representation pipelines … The code can then be re-stitched back together to create a hybrid model within MLIR. Using such a parallelized pipeline can provide for faster execution time”. In paragraph [0219], “As shown in the MLIR block 530, gradients can be applied to a high-level representation of a quantum program (or hybrid quantum-classical program). This example provides a way of applying gradients to the quantum portion of the quantum program. This example provides a mechanism to vectorize quantum-classical functions, by using an MLIR compiler pass”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel by adopting the teaching of portioning a quantum program in Izaac; motivated by the common goal to optimize computing performance by portioning a quantum program, “one of the first portion or the second portion is an intermediate numerical representation usable to optimize numerical characteristics of the high-level quantum program representation” (Izaac [0011]), “operations defined to optimize the quantum instructions 234 based on the particular quantum hardware or simulator that is being used to execute the quantum instructions” (Izaac [0119]). The motivation by Izaac is similar to the examined case, “a different portion of the quantum program may be compiled and executed, thereby increasing a compatibility of the compilation with the real-time constraints, and reducing the probability that an unexpected change in the real-time constraints will reduce the performance of the execution” (examined case [0101]).
Regarding Claim 20:
Sakthivadivel discloses,
“A computer program product comprising a non-transitory computer readable medium retaining program instructions, which program instructions when read by a processor, cause the processor to: obtain a quantum program” (In paragraph [0016], “a quantum computing service may receive quantum computing programs from customers, cause the quantum computing programs to be compiled into compiled quantum circuits, and transport the compiled quantum computing programs to quantum hardware providers for execution”.);
“the quantum program comprising one or more functionalities that are intended to be implemented as quantum operations in a quantum circuit” (In paragraph [0016], “a quantum computing service may receive quantum computing programs from customers, cause the quantum computing programs to be compiled into compiled quantum circuits, and transport the compiled quantum computing programs to quantum hardware providers for execution … during compilation, one or more compiled quantum circuit files of one or more quantum functions in a quantum computing program may be generated … For example, the quantum computing service may first receive a first quantum computing program written in a (high-level) source programming language for execution using a quantum processing unit of a quantum hardware provider. In some embodiments, the first quantum computing program may include one or more quantum functions, such as a Bell function to perform a Bell operation. The quantum computing service may store a compiled quantum circuit file for the Bell function (e.g. that is included in the first quantum computing program)”.);
“wherein the quantum program is not executable on a quantum execution platform” (In paragraph [0015], “A quantum computing program, generally written in a (high-level) source programming language, needs to be compiled into an executable version before it is executed on a quantum computer of a quantum hardware provider”.);
“compile a first [] of the quantum program to generate a first quantum circuit, the first quantum circuit is executable on the quantum execution platform” (In paragraph [0016], “the quantum computing programs to be compiled into compiled quantum circuits … during compilation, one or more compiled quantum circuit files of one or more quantum functions in a quantum computing program may be generated”. In paragraph [0028], “a compiled quantum circuit file that is directly executable on a given quantum computer”.);
“provide the first quantum circuit to the quantum execution platform to be executed thereby” (In paragraph [0019], “the compiled quantum circuit file of a quantum function to be executed on a given QPU”.);
“compile a second [] of the quantum program to generate a second quantum circuit, the second quantum circuit is executable on the quantum execution platform” (In paragraph [0018], “a quantum program may be compiled using cached quantum circuit files for portions of the quantum program and, for other portions of the quantum program for which a compiled quantum circuit is not stored in a cache, additional quantum circuits may be compiled”. In paragraph [0019], “the compiled quantum circuit file of a quantum function to be executed on a given QPU may need to be in the executable format (e.g., a binary file format) in accordance with the corresponding quantum hardware type of the given QPU. Thus, in some embodiments, a quantum computing service may store multiple compiled quantum circuit files”. In paragraph [0033], “As described herein, quantum computing service may be able to re-use a previously compiled file (from the first quantum computing program) to compile the second quantum computing program. Thus, repetition of compilation of at least one portion of the second quantum computing program may be avoided”.);
“wherein the first and second [] of the quantum program are disjoint non-overlapping [] of the quantum program” (In paragraph [0016], “the quantum computing service may obtain the compiled quantum circuit file from the cache … and re-use the compiled quantum circuit file to generate a compiled version of the additional quantum computing program. Thus, repetition of quantum circuit compilation of at least one portion of the additional quantum computing program may be avoided”.);
“and provide the second quantum circuit to the quantum execution platform to be executed thereby, thereby performing an iterative compilation and execution of the quantum program” (In paragraph [0085], “During runtime (or execution), the quantum computer may iteratively access the memory address at each step, retrieve an incremental value from the memory address, and execute the compiled quantum computing program using the retrieved incremental value of the parameter”.).
Sakthivadivel does not disclose however Izaac discloses,
first and second portions (In paragraph [00136], “The quantum program can include a plurality of program portions. The program portions can refer to different aspects of the program that can be optimized using multi-level intermediate representations”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel by adopting the teaching of portioning a quantum program in Izaac; motivated by the common goal to optimize computing performance by portioning a quantum program, “one of the first portion or the second portion is an intermediate numerical representation usable to optimize numerical characteristics of the high-level quantum program representation” (Izaac [0011]), “operations defined to optimize the quantum instructions 234 based on the particular quantum hardware or simulator that is being used to execute the quantum instructions” (Izaac [0119]). The motivation by Izaac is similar to the examined case, “a different portion of the quantum program may be compiled and executed, thereby increasing a compatibility of the compilation with the real-time constraints, and reducing the probability that an unexpected change in the real-time constraints will reduce the performance of the execution” (examined case [0101]).
Claims 3-5 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Sakthivadivel in view of Izaac as applied to claims 2 and 14 above, and further in view of Smith (U.S. Publication No. 20180260245 A1, hereinafter Smith).
Regarding Claim 3:
Sakthivadivel further discloses,
“wherein the availability of the resources comprises at least one of: a connectivity configuration of [] of the quantum execution platform; a number of the available qubits of the quantum execution platform for a time period; and a number of the available qubits of the quantum execution platform of a specific qubit type for a timeframe” (Sakthivadivel discloses at least ‘a connectivity configuration … of the quantum execution platform’ in paragraph [0081], “quantum computers may include qubits built from superconductors, trapped ions, semiconductors, photonics, etc. The format of the compiled file of a quantum function may need to be compatible with the quantum hardware, such that the compiled file may be “understood” and executable on the quantum computer of the corresponding quantum hardware provider”. The compatibility in Sakthivadivel is mapped to the claimed connectivity configuration. In paragraph [0083], “when the quantum computing program is to be executed using the same (first) quantum hardware provider, the quantum computing service may determine that the first compiled file is in the compatible format”.);
Sakthivadivel in view of Izaac does not explicitly disclose however Smith discloses,
“available qubits” (In paragraph [0036], “The control system 110 may generate schedule of control signals according to a variety of possible optimization criteria … the schedule may be configured to reduce (in some cases, minimize or otherwise optimize) an overall amount of time spent by a quantum computing system implementing the control signals, making execution of a quantum program on the quantum computing system more efficient. For example, in some instances, qubits may be made available for interaction with additional control signals sooner”. Further in context of the whole claim, in paragraph [0050], “an event schedule, when executed in the quantum computing system 150, can coordinate operation of the computing resources (e.g., … the quantum processor 158, etc.) … The resources that are coordinated by the schedule can include, for example, quantum resources such as qubits (e.g., qubits defined in a superconducting quantum circuit, a trapped ion system, a spin system, etc.) … The event schedule can associate a particular time order for each event, and provide a time-based sequence of the events for execution in the quantum computing system”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of qubits indicated as available in Smith; motivated by the common goal of “making execution of a quantum program on the quantum computing system more efficient” (Smith [0036]).
Regarding Claim 4:
Sakthivadivel further discloses,
“wherein the first real-time constraints depend on a previous quantum circuit that is being executed on the quantum execution platform” (In paragraph [0020], “compilation of a compiled quantum circuit may involve at least two compilation steps, such as compilation of a version of a quantum function using a native gate set that is native to a given QPU upon which the compiled quantum circuit is to be executed”. The quantum circuit is executed on a QPU (quantum processing unit). The previously mapped calibration data (to the real-time constraints) depends on the quantum computing components, including the quantum circuit. In paragraph [0024], “compiled quantum circuit files in the cache may be associated with validity periods in connection with calibration data of corresponding quantum computers of the quantum hardware providers (e.g. QPUs). Calibration is a process to measure parameters of a quantum computer to reduce errors and decoherence in quantum computing”.);
“the previous quantum circuit implements a second quantum program” (In paragraph [0024], “the same quantum function is compiled for a subsequently received quantum program using updated calibration data”. The second quantum program is indirectly implemented by the previous quantum circuit via the calibration data, because the calibration data depends on the previous quantum circuit. The logical flow of data being mapped: quantum circuit [Wingdings font/0xE0] calibration data/real-time constraints [Wingdings font/0xE0] new quantum program.).
Regarding Claim 5:
Sakthivadivel further discloses,
“wherein the quantum program and the second quantum program are provided to the quantum execution platform from different entities” (In paragraph [0035], “the format of the compiled file of a quantum function may need to be compatible with the quantum hardware, such that the compiled file may be a binary file that is “understood” and executable directly on the corresponding quantum computer … the second quantum computing program from customer 108 may be targeted to a different quantum computer, e.g., one of quantum hardware provider 128, rather than the same quantum computer of quantum hardware provider 122 for customer 104”. In paragraph [0025], “Quantum computing service 102 may provide one or more customers 104, 106, and 108 access to quantum computing resources of various quantum hardware providers … quantum hardware providers 122, 124, 126, and 128 may allow quantum computing programs to be executed on quantum computers”.).
Regarding Claim 15:
Sakthivadivel further discloses,
“wherein the availability of the resources comprises at least one of: a connectivity configuration of [] of the quantum execution platform; a number of the available qubits of the quantum execution platform for a time period; and a number of the available qubits of the quantum execution platform of a specific qubit type for a timeframe” (Sakthivadivel discloses at least ‘a connectivity configuration … of the quantum execution platform’ in paragraph [0081], “quantum computers may include qubits built from superconductors, trapped ions, semiconductors, photonics, etc. The format of the compiled file of a quantum function may need to be compatible with the quantum hardware, such that the compiled file may be “understood” and executable on the quantum computer of the corresponding quantum hardware provider”. The compatibility in Sakthivadivel is mapped to the claimed connectivity configuration. In paragraph [0083], “when the quantum computing program is to be executed using the same (first) quantum hardware provider, the quantum computing service may determine that the first compiled file is in the compatible format”.).
Sakthivadivel in view of Izaac does not explicitly disclose however Smith discloses,
“available qubits” (In paragraph [0036], “The control system 110 may generate schedule of control signals according to a variety of possible optimization criteria … the schedule may be configured to reduce (in some cases, minimize or otherwise optimize) an overall amount of time spent by a quantum computing system implementing the control signals, making execution of a quantum program on the quantum computing system more efficient. For example, in some instances, qubits may be made available for interaction with additional control signals sooner”. Further in context of the whole claim, in paragraph [0050], “an event schedule, when executed in the quantum computing system 150, can coordinate operation of the computing resources (e.g., … the quantum processor 158, etc.) … The resources that are coordinated by the schedule can include, for example, quantum resources such as qubits (e.g., qubits defined in a superconducting quantum circuit, a trapped ion system, a spin system, etc.) … The event schedule can associate a particular time order for each event, and provide a time-based sequence of the events for execution in the quantum computing system”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of qubits indicated as available in Smith; motivated by the common goal of “making execution of a quantum program on the quantum computing system more efficient” (Smith [0036]).
Regarding Claim 16:
Sakthivadivel further discloses,
“wherein the first real-time constraints depend on a previous quantum circuit that is being executed on the quantum execution platform” (In paragraph [0020], “compilation of a compiled quantum circuit may involve at least two compilation steps, such as compilation of a version of a quantum function using a native gate set that is native to a given QPU upon which the compiled quantum circuit is to be executed”. The quantum circuit is executed on a QPU (quantum processing unit). The previously mapped calibration data (to the real-time constraints) depends on the quantum computing components, including the quantum circuit. In paragraph [0024], “compiled quantum circuit files in the cache may be associated with validity periods in connection with calibration data of corresponding quantum computers of the quantum hardware providers (e.g. QPUs). Calibration is a process to measure parameters of a quantum computer to reduce errors and decoherence in quantum computing”.);
“the previous quantum circuit implements a second quantum program” (In paragraph [0024], “the same quantum function is compiled for a subsequently received quantum program using updated calibration data”. The second quantum program is indirectly implemented by the previous quantum circuit via the calibration data, because the calibration data depends on the previous quantum circuit. The logical flow of data being mapped: quantum circuit [Wingdings font/0xE0] calibration data/real-time constraints [Wingdings font/0xE0] new quantum program.).
Claims 6 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Sakthivadivel in view of Izaac as applied to claim 1 and 13 above, and further in view of Lukin et al. (U.S. Publication No. 20250390780 A1, hereinafter Lukin) and Petroulas (U.S. Publication No. 20230100529 A1, hereinafter Petroulas).
Regarding Claim 6:
Sakthivadivel in view of Izaac does not disclose however Lukin discloses,
“wherein said compiling the first portion of the quantum program comprises: determining a Constraint Satisfaction Problem (CSP) that corresponds to the quantum program” (In paragraph [0006], “methods of and computer program products for compiling a constraint satisfaction problem for execution on a quantum computer are provided”.);
“the constraints comprise global resource constraints of the quantum execution platform” (In paragraph [0106], “This perturbation of the detunings for individual ancillary qubits can be performed with multiple different types of global driving patterns”. In paragraph [0394], “The safest normalization of biases is to constrain that the total weight is less than the cost of a single constraint violation”.);
“wherein a solution of the CSP defines the quantum circuit that implements the quantum program” (In paragraph [0324], “In the discussion below, a number of encoding gadgets are constructed, which are the basic tools used in this disclosure to reformulate a variety of optimization problems as UDG-MWIS. To this end, solutions of a set of elementary constraint satisfaction problems are encoded as the solutions of a MWIS problem on properly constructed unit disk graphs”. In paragraph [0308], “Programmable quantum systems based on Rydberg atom arrays have recently been used for hardware-efficient tests of quantum optimization algorithms with hundreds of qubits. In particular, the maximum independent set problem on so-called unit-disk graphs was shown to be efficiently encodable in such a quantum system”. Where the encoding of the unit disk graph encodable in a quantum system with qubits may be implemented with quantum circuits in paragraph [0086], “Quantum circuits can then be implemented by a sequence of qubit operations acting on individual qubits (single-qubit gates) or on groups of two or more qubits (multi-qubit gates). Finally, the state of the particles can be read out in order to observe the result of the quantum circuit.”);
“generating the first quantum circuit by utilizing a CSP solver to solve the CSP” (In paragraph [0340], “gadgets for formulating constraint satisfaction problems as UDG-MWIS are illustrated”. In paragraph [0318], “The solution for the UDG-MWIS obtained on the quantum device can then be mapped back to a solution for the original computation problem … It is also shown that circuit satisfiability problems can be mapped into UDG-MWIS”. In paragraph [0332], “The cost function associated with this MWIS problem is … with the three degenerate solutions corresponding to the three satisfying assignments, with na being an ancilla qubit”. In paragraph [0333], “one can construct the MWIS representation of all the basic operations in Boolean logic, by providing a gadget that is the MWIS representation of the NOR constraint”. In paragraph [0336], “Consider a set of constraints, C … allowing for at least one satisfying assignment … a MWIS representation of C can be constructed by simply adding all the MWIS cost functions for all individual constraints in C”. In paragraph [0338], “This is a powerful method that allows building MWIS representations of complicated constraints out of simpler ones. The utility of this tool can already be illustrated by noting that the combination of the NOT and the NOR constraints (FIGS. 28A and 28C) is universal. This immediately implies that any circuit satisfiability problem can be encoded into a MWIS problem”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of Constraint Satisfaction Problem elements in Lukin; motivated by the common goal to improve performance of quantum computers with program implementation techniques. For example, “finding solutions with quantum computing would show large improvements over standard computing approaches” (Lukin [0108]), further to “provides a new, systematic approach to encode optimization problems … the method is applied to generic constraint satisfaction problems. … observing strong correlations that suggest the encoding does not negatively impact the performance of quantum algorithms” (Lukin [0315]), where “It is important for near-term implementation on quantum machines to find a low-overhead, explicit mapping” (Lukin [0315]). The motivation of Lukin is similar to the examined case “a Constraint Satisfaction Problem (CSP) defining the possible implementations of the quantum program, may be processed to reduce parameter domains thereof, thereby reducing a computational load of the second software compiler” (examined case [0060]).
Sakthivadivel in view of Izaac and Lukin does not disclose however Petroulas discloses,
“the CSP comprises variables, domains and constraints, each variable of the variables has a corresponding domain in the domains that defines one or more potential values of the variable” (In paragraph [0161], “A constraint program represents the problem as a Constraint Satisfaction problem (CSP), and then solves the CSP with a combination of constraint propagation and search (typically backtracking search)”. In paragraph [0162], “In CP terms, representing a problem means selecting a set of decision variables, each with a domain of values, and a set of constraints over these variables that restricts the values that subsets of variables can take”.);
“the constraints define one or more constraints on values of the variables or portion thereof” (In paragraph [0162], “a set of constraints over these variables that restricts the values that subsets of variables can take”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac and Lukin by adopting the teaching of corresponding domains and variables in Smith; motivated by the common goal to improve the allocation of resources, where “a computing system for effecting an optimised condition … to derive an optimised allocation instruction set” (Petroulas, Abstract), and “computer program for the dynamic optimisation and allocation of resources” (Petroulas, [0001]).
Regarding Claim 17:
Sakthivadivel in view of Izaac does not disclose however Lukin discloses,
“wherein said compile the first portion of the quantum program comprises: determining a Constraint Satisfaction Problem (CSP) that corresponds to the quantum program” (In paragraph [0006], “methods of and computer program products for compiling a constraint satisfaction problem for execution on a quantum computer are provided”.);
“the constraints comprise global resource constraints of the quantum execution platform” (In paragraph [0106], “This perturbation of the detunings for individual ancillary qubits can be performed with multiple different types of global driving patterns”. In paragraph [0394], “The safest normalization of biases is to constrain that the total weight is less than the cost of a single constraint violation”.);
“wherein a solution of the CSP defines the quantum circuit that implements the quantum program” (In paragraph [0324], “In the discussion below, a number of encoding gadgets are constructed, which are the basic tools used in this disclosure to reformulate a variety of optimization problems as UDG-MWIS. To this end, solutions of a set of elementary constraint satisfaction problems are encoded as the solutions of a MWIS problem on properly constructed unit disk graphs”. In paragraph [0308], “Programmable quantum systems based on Rydberg atom arrays have recently been used for hardware-efficient tests of quantum optimization algorithms with hundreds of qubits. In particular, the maximum independent set problem on so-called unit-disk graphs was shown to be efficiently encodable in such a quantum system”. Where the encoding of the unit disk graph encodable in a quantum system with qubits may be implemented with quantum circuits in paragraph [0086], “Quantum circuits can then be implemented by a sequence of qubit operations acting on individual qubits (single-qubit gates) or on groups of two or more qubits (multi-qubit gates). Finally, the state of the particles can be read out in order to observe the result of the quantum circuit”.);
“generating the first quantum circuit by utilizing a CSP solver to solve the CSP” (In paragraph [0340], “gadgets for formulating constraint satisfaction problems as UDG-MWIS are illustrated”. In paragraph [0318], “The solution for the UDG-MWIS obtained on the quantum device can then be mapped back to a solution for the original computation problem … It is also shown that circuit satisfiability problems can be mapped into UDG-MWIS”. In paragraph [0332], “The cost function associated with this MWIS problem is … with the three degenerate solutions corresponding to the three satisfying assignments, with na being an ancilla qubit”. In paragraph [0333], “one can construct the MWIS representation of all the basic operations in Boolean logic, by providing a gadget that is the MWIS representation of the NOR constraint”. In paragraph [0336], “Consider a set of constraints, C … allowing for at least one satisfying assignment … a MWIS representation of C can be constructed by simply adding all the MWIS cost functions for all individual constraints in C”. In paragraph [0338], “This is a powerful method that allows building MWIS representations of complicated constraints out of simpler ones. The utility of this tool can already be illustrated by noting that the combination of the NOT and the NOR constraints (FIGS. 28A and 28C) is universal. This immediately implies that any circuit satisfiability problem can be encoded into a MWIS problem”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of Constraint Satisfaction Problem elements in Lukin; motivated by the common goal to improve performance of quantum computers with program implementation techniques. For example, “finding solutions with quantum computing would show large improvements over standard computing approaches” (Lukin [0108]), further to “provides a new, systematic approach to encode optimization problems … the method is applied to generic constraint satisfaction problems. … observing strong correlations that suggest the encoding does not negatively impact the performance of quantum algorithms” (Lukin [0315]), where “It is important for near-term implementation on quantum machines to find a low-overhead, explicit mapping” (Lukin [0315]). The motivation of Lukin is similar to the examined case “a Constraint Satisfaction Problem (CSP) defining the possible implementations of the quantum program, may be processed to reduce parameter domains thereof, thereby reducing a computational load of the second software compiler” (examined case [0060]).
Sakthivadivel in view of Izaac and Lukin does not disclose however Petroulas discloses,
“the CSP comprises variables, domains and constraints, each variable of the variables has a corresponding domain in the domains that defines one or more potential values of the variable” (In paragraph [0161], “A constraint program represents the problem as a Constraint Satisfaction problem (CSP), and then solves the CSP with a combination of constraint propagation and search (typically backtracking search)”. In paragraph [0162], “In CP terms, representing a problem means selecting a set of decision variables, each with a domain of values, and a set of constraints over these variables that restricts the values that subsets of variables can take”.);
“the constraints define one or more constraints on values of the variables or portion thereof” (In paragraph [0162], “a set of constraints over these variables that restricts the values that subsets of variables can take”.).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Sakthivadivel in view of Izaac, Lukin, and Petroulas as applied to claim 6 above, and further in view of Lesaint et al. (U.S. Publication No. 20110019594 A1, hereinafter Lesaint).
Regarding Claim 7:
Sakthivadivel in view of Izaac does not disclose however Lukin further discloses,
“of the quantum program” (In paragraph [0087], “Quantum algorithms can solve combinatorially hard optimization problems by encoding such problems in the classical ground state of a programmable quantum system”. In paragraph [0308], “Programmable quantum systems based on Rydberg atom arrays have recently been used for hardware-efficient tests of quantum optimization algorithms”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of the quantum program used for the Constraint Satisfaction Problem in Lukin; motivated by the common goal to improve performance of quantum computers with program implementation techniques. For example, “finding solutions with quantum computing would show large improvements over standard computing approaches” (Lukin [0108]), further to “provides a new, systematic approach to encode optimization problems … the method is applied to generic constraint satisfaction problems. … observing strong correlations that suggest the encoding does not negatively impact the performance of quantum algorithms” (Lukin [0315]), where “It is important for near-term implementation on quantum machines to find a low-overhead, explicit mapping” (Lukin [0315]). The motivation of Lukin is similar to the examined case “a Constraint Satisfaction Problem (CSP) defining the possible implementations of the quantum program, may be processed to reduce parameter domains thereof, thereby reducing a computational load of the second software compiler” (examined case [0060]).
Sakthivadivel in view of Izaac, Lukin, and Petroulas does not disclose however Lesaint discloses,
“wherein the constraints of the CSP comprise the precedence constraint between the functionalities []” (In paragraph [0166], “we consider a further specialisation of WCSP, namely, the Variable Weighted Constraint Satisfaction Problem (VWCSP)”. In paragraph [0175], “The CE carries out the above tasks using a VWCSP formulation … When duplicate arcs with different labels are merged into one, the label `p` (i.e., a catalogue constraint) takes precedence over the label `u` (i.e., a user-defined constraint)”, where in paragraph [0190], “Each arc … in P corresponds to a precedence constraint”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac, Lukin, and Petroulas by adopting the teaching of the precedence constraint in Lesaint; motivated by the common goal “to compute optimal solutions for constraint optimisation problems” (Lesaint [0203]).
Claims 9, 11, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Sakthivadivel in view of Izaac as applied to claim 1 above, and further in view of Martinis et al. (U.S. Publication No. 20200258000 A1, hereinafter Martinis).
Regarding Claim 9:
Sakthivadivel in view of Izaac does not disclose however Martinis discloses,
“wherein the quantum operations are to be performed over a plurality of qubits during a plurality of ordered cycles” (In paragraph [0029], “as described in this specification, performs surface code cycles using a particular configuration of paired qubits”. In paragraph [0161], “a subsequent surface code error detection cycle may be performed in an inverted order to the cycle described in steps 1002-1018 above … the system may initialize the multiple measurement qubits, apply Hadamard quantum logic gates to the initialized measurement qubits”.);
“the plurality of ordered cycles include a first subset of cycles and a second subset of cycles” (In paragraph [0161], “perform entangling operations on the second subset of paired data and measurement qubits in parallel; apply Hadamard quantum logic gates to the multiple data qubits, perform entangling operations on the first subset of paired data and measurement qubits in parallel”. The entangling operation, as shown in Fig. 5 as step 504, will cycle for each paired qubit and measurement qubit that exists. In paragraph [0098], “FIG. 5 is a flow diagram of an example process 500 for performing entangling operations using a system of qubits”, where in paragraph [0109], “the system may perform an entangling operation on each paired data and measurement qubit”.);
“the first quantum circuit is configured to perform operations at the first subset of cycles” (In paragraph [0139], “FIG. 10 is a flow diagram of an example process 1000 for performing a surface code error detection cycle on multiple quantum circuits e.g. quantum circuits shown in FIG. 9”. In paragraph [0135], “The example quantum circuit 900 shows the sequence of quantum logic gates needed to perform the surface code error detection cycle 1000 described herein with reference to FIG. 10”.);
“the second quantum circuit is configured to perform operations at the second subset of cycles” (In paragraph [0139], “FIG. 10 is a flow diagram of an example process 1000 for performing a surface code error detection cycle on multiple quantum circuits e.g. quantum circuits shown in FIG. 9”. In paragraph [0146], “The system may then perform entangling operations on the pairs of qubits in each of the multiple subsets in parallel. For example, as described with reference to FIG. 5, performing entangling operations on pairs of qubits in each of the multiple subsets”. In paragraph [0147], “The system applies Hadamard quantum logic gates to the multiple data qubits in the second direction (step 1008)”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of ordered cycle in Martinis; motivated by the common goal to “improve the robustness of the quantum computing system and improve the accuracy of computations performed by the quantum computing system” (Martinis [0023]).
Regarding Claim 11:
Sakthivadivel in view of Izaac does not disclose however Martini further discloses,
“wherein the first subset of cycles includes a first cycle and a second cycle, the second subset of cycles includes a third cycle and a fourth cycle, wherein the first cycle is ordered before the third cycle, wherein the second cycle is ordered after the fourth cycle” (In paragraph [0109], “In some implementations the order in which the system selects subsets to perform entangling operations on may be arbitrary”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of ordered cycle in Martinis; motivated by the common goal to “improve the robustness of the quantum computing system and improve the accuracy of computations performed by the quantum computing system” (Martinis [0023]).
Regarding Claim 19:
Sakthivadivel in view of Izaac does not disclose however Martinis discloses,
“wherein the quantum operations are to be performed over a plurality of qubits during a plurality of ordered cycles” (In paragraph [0029], “as described in this specification, performs surface code cycles using a particular configuration of paired qubits”. In paragraph [0161], “a subsequent surface code error detection cycle may be performed in an inverted order to the cycle described in steps 1002-1018 above … the system may initialize the multiple measurement qubits, apply Hadamard quantum logic gates to the initialized measurement qubits”.);
“the plurality of ordered cycles include a first subset of cycles and a second subset of cycles” (In paragraph [0161], “perform entangling operations on the second subset of paired data and measurement qubits in parallel; apply Hadamard quantum logic gates to the multiple data qubits, perform entangling operations on the first subset of paired data and measurement qubits in parallel”. The entangling operation, as shown in Fig. 5 as step 504, will cycle for each paired qubit and measurement qubit that exists. In paragraph [0098], “FIG. 5 is a flow diagram of an example process 500 for performing entangling operations using a system of qubits”, where in paragraph [0109], “the system may perform an entangling operation on each paired data and measurement qubit”.);
“the first quantum circuit is configured to perform operations at the first subset of cycles” (In paragraph [0139], “FIG. 10 is a flow diagram of an example process 1000 for performing a surface code error detection cycle on multiple quantum circuits e.g. quantum circuits shown in FIG. 9”. In paragraph [0135], “The example quantum circuit 900 shows the sequence of quantum logic gates needed to perform the surface code error detection cycle 1000 described herein with reference to FIG. 10”.);
“the second quantum circuit is configured to perform operations at the second subset of cycles” (In paragraph [0139], “FIG. 10 is a flow diagram of an example process 1000 for performing a surface code error detection cycle on multiple quantum circuits e.g. quantum circuits shown in FIG. 9”. In paragraph [0146], “The system may then perform entangling operations on the pairs of qubits in each of the multiple subsets in parallel. For example, as described with reference to FIG. 5, performing entangling operations on pairs of qubits in each of the multiple subsets”. In paragraph [0147], “The system applies Hadamard quantum logic gates to the multiple data qubits in the second direction (step 1008)”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of ordered cycle in Martinis; motivated by the common goal to “improve the robustness of the quantum computing system and improve the accuracy of computations performed by the quantum computing system” (Martinis [0023]).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Sakthivadivel in view of Izaac and Martinis as applied to claim 9 above, and further in view of Naveh et al. (U.S. Publication No. 20230244973 A1, hereinafter Naveh).
Regarding Claim 10:
Sakthivadivel in view of Izaac does not disclose however Martinis discloses,
“wherein the first subset of cycles includes cycles that are ordered before an intermediate cycle” (The intermediate cycle is mapped to step 504 of Fig. 5, the cycle ordered before is step 502.);
“the second subset of cycles include the intermediate cycle []” (In paragraph [0159], “As described above, performing multiple entangling operations on the first set of paired measurement and data qubits requires three sequential applications of arrays of entangling operations—one application for each subset”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac by adopting the teaching of ordered cycle in Martinis; motivated by the common goal to “improve the robustness of the quantum computing system and improve the accuracy of computations performed by the quantum computing system” (Martinis [0023]).
Sakthivadivel in view of Izaac and Martinis does not disclose however Naveh discloses,
“and one or more cycles that are ordered after the intermediate cycle” (In paragraph [0027], “The intermediate cycle may be a cycle after the quantum program has commenced (i.e., after the initial, first, cycle)”. In paragraph [0064], “QP 300b was modified to postpone the operation of F.sub.2 to a cycle after the intermediate cycle”.).
Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify Sakthivadivel in view of Izaac and Martinis by adopting the teaching of a cycle after an intermediate cycle in Martinis; motivated by the common goal to “improve performance and accuracy of the quantum program” (Naveh [0033]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Beza D Nigatu whose telephone number is (571)272-9643. The examiner can normally be reached Monday - Friday 7:30am-5:00pm, alternate Fridays off.
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/BEZA D NIGATU/Examiner, Art Unit 2192
/S. Sough/SPE, Art Unit 2192
Prosecution Insights